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[CostModel][X86] Add costs for f32/f64 scalar and vector types. 

The f16 half types are still pretty useless as we don't have it as a legal type (we treat them as i16 most of the time)
This commit is contained in:
Simon Pilgrim 2021-08-20 14:30:48 +01:00
parent c1f3bab23b
commit 9efda541bf
2 changed files with 48 additions and 36 deletions
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12
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
View File

@ -2725,6 +2725,8 @@ X86TTIImpl::getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
{ ISD::FMAXNUM, MVT::v2f64, 2 },
{ ISD::FMAXNUM, MVT::v4f64, 2 },
{ ISD::FMAXNUM, MVT::v8f64, 2 },
{ ISD::ISNAN, MVT::v8f64, 1 },
{ ISD::ISNAN, MVT::v16f32, 1 },
};
static const CostTblEntry XOPCostTbl[] = {
{ ISD::BITREVERSE, MVT::v4i64, 4 },
@ -2853,6 +2855,8 @@ X86TTIImpl::getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
{ ISD::FSQRT, MVT::f64, 21 }, // SNB from http://www.agner.org/
{ ISD::FSQRT, MVT::v2f64, 21 }, // SNB from http://www.agner.org/
{ ISD::FSQRT, MVT::v4f64, 43 }, // SNB from http://www.agner.org/
{ ISD::ISNAN, MVT::v4f64, 1 },
{ ISD::ISNAN, MVT::v8f32, 1 },
};
static const CostTblEntry GLMCostTbl[] = {
{ ISD::FSQRT, MVT::f32, 19 }, // sqrtss
@ -2949,12 +2953,16 @@ X86TTIImpl::getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
{ ISD::FMAXNUM, MVT::v2f64, 4 },
{ ISD::FSQRT, MVT::f64, 32 }, // Nehalem from http://www.agner.org/
{ ISD::FSQRT, MVT::v2f64, 32 }, // Nehalem from http://www.agner.org/
{ ISD::ISNAN, MVT::f64, 1 },
{ ISD::ISNAN, MVT::v2f64, 1 },
};
static const CostTblEntry SSE1CostTbl[] = {
{ ISD::FMAXNUM, MVT::f32, 4 },
{ ISD::FMAXNUM, MVT::v4f32, 4 },
{ ISD::FSQRT, MVT::f32, 28 }, // Pentium III from http://www.agner.org/
{ ISD::FSQRT, MVT::v4f32, 56 }, // Pentium III from http://www.agner.org/
{ ISD::ISNAN, MVT::f32, 1 },
{ ISD::ISNAN, MVT::v4f32, 1 },
};
static const CostTblEntry BMI64CostTbl[] = { // 64-bit targets
{ ISD::CTTZ, MVT::i64, 1 },
@ -3044,6 +3052,10 @@ X86TTIImpl::getTypeBasedIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
case Intrinsic::cttz:
ISD = ISD::CTTZ;
break;
case Intrinsic::isnan:
ISD = ISD::ISNAN;
OpTy = ICA.getArgTypes()[0];
break;
case Intrinsic::maxnum:
case Intrinsic::minnum:
// FMINNUM has same costs so don't duplicate.

72
llvm/test/Analysis/CostModel/X86/fpclassify.ll
View File

@ -24,56 +24,56 @@ declare <16 x i1> @llvm.isnan.v16f64(<16 x double>)
define i32 @isnan(i32 %arg) {
; SSE-LABEL: 'isnan'
; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call i1 @llvm.isnan.f16(half undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %V4F16 = call <4 x i1> @llvm.isnan.v4f16(<4 x half> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8F16 = call <8 x i1> @llvm.isnan.v8f16(<8 x half> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %V16F16 = call <16 x i1> @llvm.isnan.v16f16(<16 x half> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 94 for instruction: %V3216 = call <32 x i1> @llvm.isnan.v32f16(<32 x half> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F16 = call <4 x i1> @llvm.isnan.v4f16(<4 x half> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F16 = call <8 x i1> @llvm.isnan.v8f16(<8 x half> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16F16 = call <16 x i1> @llvm.isnan.v16f16(<16 x half> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V3216 = call <32 x i1> @llvm.isnan.v32f16(<32 x half> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call i1 @llvm.isnan.f32(float undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V2F32 = call <2 x i1> @llvm.isnan.v2f32(<2 x float> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %V4F32 = call <4 x i1> @llvm.isnan.v4f32(<4 x float> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8F32 = call <8 x i1> @llvm.isnan.v8f32(<8 x float> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %V16F32 = call <16 x i1> @llvm.isnan.v16f32(<16 x float> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = call <2 x i1> @llvm.isnan.v2f32(<2 x float> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call <4 x i1> @llvm.isnan.v4f32(<4 x float> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F32 = call <8 x i1> @llvm.isnan.v8f32(<8 x float> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F32 = call <16 x i1> @llvm.isnan.v16f32(<16 x float> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call i1 @llvm.isnan.f64(double undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V2F64 = call <2 x i1> @llvm.isnan.v2f64(<2 x double> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %V4F64 = call <4 x i1> @llvm.isnan.v4f64(<4 x double> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8F64 = call <8 x i1> @llvm.isnan.v8f64(<8 x double> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 47 for instruction: %V16F64 = call <16 x i1> @llvm.isnan.v16f64(<16 x double> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = call <2 x i1> @llvm.isnan.v2f64(<2 x double> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4F64 = call <4 x i1> @llvm.isnan.v4f64(<4 x double> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8F64 = call <8 x i1> @llvm.isnan.v8f64(<8 x double> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V16F64 = call <16 x i1> @llvm.isnan.v16f64(<16 x double> undef)
; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
; AVX-LABEL: 'isnan'
; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call i1 @llvm.isnan.f16(half undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4F16 = call <4 x i1> @llvm.isnan.v4f16(<4 x half> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8F16 = call <8 x i1> @llvm.isnan.v8f16(<8 x half> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V16F16 = call <16 x i1> @llvm.isnan.v16f16(<16 x half> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 66 for instruction: %V3216 = call <32 x i1> @llvm.isnan.v32f16(<32 x half> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F16 = call <4 x i1> @llvm.isnan.v4f16(<4 x half> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F16 = call <8 x i1> @llvm.isnan.v8f16(<8 x half> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16F16 = call <16 x i1> @llvm.isnan.v16f16(<16 x half> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V3216 = call <32 x i1> @llvm.isnan.v32f16(<32 x half> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call i1 @llvm.isnan.f32(float undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F32 = call <2 x i1> @llvm.isnan.v2f32(<2 x float> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4F32 = call <4 x i1> @llvm.isnan.v4f32(<4 x float> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8F32 = call <8 x i1> @llvm.isnan.v8f32(<8 x float> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V16F32 = call <16 x i1> @llvm.isnan.v16f32(<16 x float> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = call <2 x i1> @llvm.isnan.v2f32(<2 x float> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call <4 x i1> @llvm.isnan.v4f32(<4 x float> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = call <8 x i1> @llvm.isnan.v8f32(<8 x float> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F32 = call <16 x i1> @llvm.isnan.v16f32(<16 x float> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call i1 @llvm.isnan.f64(double undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F64 = call <2 x i1> @llvm.isnan.v2f64(<2 x double> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4F64 = call <4 x i1> @llvm.isnan.v4f64(<4 x double> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8F64 = call <8 x i1> @llvm.isnan.v8f64(<8 x double> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V16F64 = call <16 x i1> @llvm.isnan.v16f64(<16 x double> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = call <2 x i1> @llvm.isnan.v2f64(<2 x double> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = call <4 x i1> @llvm.isnan.v4f64(<4 x double> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8F64 = call <8 x i1> @llvm.isnan.v8f64(<8 x double> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16F64 = call <16 x i1> @llvm.isnan.v16f64(<16 x double> undef)
; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
; AVX512-LABEL: 'isnan'
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F16 = call i1 @llvm.isnan.f16(half undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4F16 = call <4 x i1> @llvm.isnan.v4f16(<4 x half> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8F16 = call <8 x i1> @llvm.isnan.v8f16(<8 x half> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V16F16 = call <16 x i1> @llvm.isnan.v16f16(<16 x half> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V3216 = call <32 x i1> @llvm.isnan.v32f16(<32 x half> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4F16 = call <4 x i1> @llvm.isnan.v4f16(<4 x half> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V8F16 = call <8 x i1> @llvm.isnan.v8f16(<8 x half> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V16F16 = call <16 x i1> @llvm.isnan.v16f16(<16 x half> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V3216 = call <32 x i1> @llvm.isnan.v32f16(<32 x half> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F32 = call i1 @llvm.isnan.f32(float undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F32 = call <2 x i1> @llvm.isnan.v2f32(<2 x float> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4F32 = call <4 x i1> @llvm.isnan.v4f32(<4 x float> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8F32 = call <8 x i1> @llvm.isnan.v8f32(<8 x float> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V16F32 = call <16 x i1> @llvm.isnan.v16f32(<16 x float> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F32 = call <2 x i1> @llvm.isnan.v2f32(<2 x float> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F32 = call <4 x i1> @llvm.isnan.v4f32(<4 x float> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F32 = call <8 x i1> @llvm.isnan.v8f32(<8 x float> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16F32 = call <16 x i1> @llvm.isnan.v16f32(<16 x float> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %F64 = call i1 @llvm.isnan.f64(double undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2F64 = call <2 x i1> @llvm.isnan.v2f64(<2 x double> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4F64 = call <4 x i1> @llvm.isnan.v4f64(<4 x double> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8F64 = call <8 x i1> @llvm.isnan.v8f64(<8 x double> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V16F64 = call <16 x i1> @llvm.isnan.v16f64(<16 x double> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2F64 = call <2 x i1> @llvm.isnan.v2f64(<2 x double> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4F64 = call <4 x i1> @llvm.isnan.v4f64(<4 x double> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8F64 = call <8 x i1> @llvm.isnan.v8f64(<8 x double> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16F64 = call <16 x i1> @llvm.isnan.v16f64(<16 x double> undef)
; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
%F16 = call i1 @llvm.isnan.f16(half undef)