maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[AMDGPU] Revert "[AMDGPU] Add options for waitcnt pass debugging; add instr count in debug output." 

Patch caused a buildbot failure; http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/15733/steps/build_Lld/logs/stdio :
lib/Target/AMDGPU/SIInsertWaitcnts.cpp:396:11: error: private field 'InstCnt' is not used [-Werror,-Wunused-private-field]
  int32_t InstCnt = 0;
          ^
1 error generated.
"
This reverts commit 71627f79010aafe74fdcba901bba28dd7caa0869.

llvm-svn: 320086
This commit is contained in:
Mark Searles 2017-12-07 21:14:41 +00:00
parent 690f0e2f4e
commit 9ebdbb433a
2 changed files with 8 additions and 103 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

70
llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
View File

@ -54,26 +54,6 @@
using namespace llvm; using namespace llvm;
static cl::opt<unsigned> ForceZeroFlag(
"amdgpu-waitcnt-forcezero",
cl::desc("Force all waitcnt instrs to be emitted as s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)"),
cl::init(0), cl::Hidden);
static cl::opt<unsigned> ForceExpFlag(
"amdgpu-waitcnt-forceexp",
cl::desc("Force emit a s_waitcnt expcnt(0) before the first <n> instrs"),
cl::init(0), cl::Hidden);
static cl::opt<unsigned> ForceLgkmFlag(
"amdgpu-waitcnt-forcelgkm",
cl::desc("Force emit a s_waitcnt lgkmcnt(0) before the first <n> instrs"),
cl::init(0), cl::Hidden);
static cl::opt<unsigned> ForceVmFlag(
"amdgpu-waitcnt-forcevm",
cl::desc("Force emit a s_waitcnt vmcnt(0) before the first <n> instrs"),
cl::init(0), cl::Hidden);
namespace { namespace {
// Class of object that encapsulates latest instruction counter score // Class of object that encapsulates latest instruction counter score
@ -393,10 +373,6 @@ private:
std::vector<std::unique_ptr<BlockWaitcntBrackets>> KillWaitBrackets; std::vector<std::unique_ptr<BlockWaitcntBrackets>> KillWaitBrackets;
int32_t InstCnt = 0;
bool ForceZero = false;
int32_t ForceSwaitcnt[NUM_INST_CNTS];
public: public:
static char ID; static char ID;
@ -421,14 +397,6 @@ public:
llvm::make_unique<BlockWaitcntBrackets>(*Bracket)); llvm::make_unique<BlockWaitcntBrackets>(*Bracket));
} }
bool ForceEmit() const {
for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
T = (enum InstCounterType)(T + 1))
if (ForceSwaitcnt[T] > 0)
return true;
return false;
}
bool mayAccessLDSThroughFlat(const MachineInstr &MI) const; bool mayAccessLDSThroughFlat(const MachineInstr &MI) const;
MachineInstr *generateSWaitCntInstBefore(MachineInstr &MI, MachineInstr *generateSWaitCntInstBefore(MachineInstr &MI,
BlockWaitcntBrackets *ScoreBrackets); BlockWaitcntBrackets *ScoreBrackets);
@ -1055,6 +1023,9 @@ MachineInstr *SIInsertWaitcnts::generateSWaitCntInstBefore(
} // End of for loop that looks at all dest operands. } // End of for loop that looks at all dest operands.
} }
// TODO: Tie force zero to a compiler triage option.
bool ForceZero = false;
// Check to see if this is an S_BARRIER, and if an implicit S_WAITCNT 0 // Check to see if this is an S_BARRIER, and if an implicit S_WAITCNT 0
// occurs before the instruction. Doing it here prevents any additional // occurs before the instruction. Doing it here prevents any additional
// S_WAITCNTs from being emitted if the instruction was marked as // S_WAITCNTs from being emitted if the instruction was marked as
@ -1087,7 +1058,7 @@ MachineInstr *SIInsertWaitcnts::generateSWaitCntInstBefore(
} }
// Does this operand processing indicate s_wait counter update? // Does this operand processing indicate s_wait counter update?
if (EmitSwaitcnt || ForceEmit()) { if (EmitSwaitcnt) {
int CntVal[NUM_INST_CNTS]; int CntVal[NUM_INST_CNTS];
bool UseDefaultWaitcntStrategy = true; bool UseDefaultWaitcntStrategy = true;
@ -1128,7 +1099,7 @@ MachineInstr *SIInsertWaitcnts::generateSWaitCntInstBefore(
} }
// If we are not waiting on any counter we can skip the wait altogether. // If we are not waiting on any counter we can skip the wait altogether.
if (EmitSwaitcnt != 0 || ForceEmit()) { if (EmitSwaitcnt != 0) {
MachineInstr *OldWaitcnt = ScoreBrackets->getWaitcnt(); MachineInstr *OldWaitcnt = ScoreBrackets->getWaitcnt();
int Imm = (!OldWaitcnt) ? 0 : OldWaitcnt->getOperand(0).getImm(); int Imm = (!OldWaitcnt) ? 0 : OldWaitcnt->getOperand(0).getImm();
if (!OldWaitcnt || (AMDGPU::decodeVmcnt(IV, Imm) != if (!OldWaitcnt || (AMDGPU::decodeVmcnt(IV, Imm) !=
@ -1164,31 +1135,11 @@ MachineInstr *SIInsertWaitcnts::generateSWaitCntInstBefore(
CompilerGeneratedWaitcntSet.insert(SWaitInst); CompilerGeneratedWaitcntSet.insert(SWaitInst);
} }
if (!EmitSwaitcnt) {
for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
T = (enum InstCounterType)(T + 1)) {
if (ForceSwaitcnt[T] > 0 ) {
DEBUG(dbgs() << "ForceSwaitcnt[" << T << "]: "
<< ForceSwaitcnt[T] << '\n';);
}
}
}
const MachineOperand &Op = const MachineOperand &Op =
MachineOperand::CreateImm(AMDGPU::encodeWaitcnt( MachineOperand::CreateImm(AMDGPU::encodeWaitcnt(
IV, IV, CntVal[VM_CNT], CntVal[EXP_CNT], CntVal[LGKM_CNT]));
(ForceSwaitcnt[VM_CNT] > 0) ? 0 : CntVal[VM_CNT],
(ForceSwaitcnt[EXP_CNT] > 0) ? 0 : CntVal[EXP_CNT],
(ForceSwaitcnt[LGKM_CNT] > 0) ? 0 : CntVal[LGKM_CNT]));
SWaitInst->addOperand(MF, Op); SWaitInst->addOperand(MF, Op);
if (!EmitSwaitcnt) {
for (enum InstCounterType T = VM_CNT; T < NUM_INST_CNTS;
T = (enum InstCounterType)(T + 1)) {
--ForceSwaitcnt[T];
}
}
if (CntVal[EXP_CNT] == 0) { if (CntVal[EXP_CNT] == 0) {
ScoreBrackets->setMixedExpTypes(false); ScoreBrackets->setMixedExpTypes(false);
} }
@ -1567,7 +1518,7 @@ void SIInsertWaitcnts::insertWaitcntInBlock(MachineFunction &MF,
BlockWaitcntBrackets *ScoreBrackets = BlockWaitcntBracketsMap[&Block].get(); BlockWaitcntBrackets *ScoreBrackets = BlockWaitcntBracketsMap[&Block].get();
DEBUG({ DEBUG({
dbgs() << "*** Block" << Block.getNumber() << " ***"; dbgs() << "Block" << Block.getNumber();
ScoreBrackets->dump(); ScoreBrackets->dump();
}); });
@ -1640,7 +1591,7 @@ void SIInsertWaitcnts::insertWaitcntInBlock(MachineFunction &MF,
DEBUG({ SWaitInst->print(dbgs() << '\n'); }); DEBUG({ SWaitInst->print(dbgs() << '\n'); });
} }
DEBUG({ DEBUG({
dbgs() << "Instr" << ++InstCnt << ": " << Inst; Inst.print(dbgs());
ScoreBrackets->dump(); ScoreBrackets->dump();
}); });
@ -1745,11 +1696,6 @@ bool SIInsertWaitcnts::runOnMachineFunction(MachineFunction &MF) {
const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>(); const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
AMDGPUASI = ST->getAMDGPUAS(); AMDGPUASI = ST->getAMDGPUAS();
ForceZero = ForceZeroFlag;
ForceSwaitcnt[VM_CNT] = ForceVmFlag;
ForceSwaitcnt[EXP_CNT] = ForceExpFlag;
ForceSwaitcnt[LGKM_CNT] = ForceLgkmFlag;
HardwareLimits.VmcntMax = AMDGPU::getVmcntBitMask(IV); HardwareLimits.VmcntMax = AMDGPU::getVmcntBitMask(IV);
HardwareLimits.ExpcntMax = AMDGPU::getExpcntBitMask(IV); HardwareLimits.ExpcntMax = AMDGPU::getExpcntBitMask(IV);
HardwareLimits.LgkmcntMax = AMDGPU::getLgkmcntBitMask(IV); HardwareLimits.LgkmcntMax = AMDGPU::getLgkmcntBitMask(IV);

41
llvm/test/CodeGen/AMDGPU/waitcnt-debug.mir
View File

@ -1,41 +0,0 @@
# RUN: llc -mtriple=amdgcn -verify-machineinstrs -run-pass si-insert-waitcnts -amdgpu-waitcnt-forcelgkm=1 -o - %s | FileCheck -check-prefixes=GCN,LGKM %s
# RUN: llc -mtriple=amdgcn -verify-machineinstrs -run-pass si-insert-waitcnts -amdgpu-waitcnt-forceexp=2 -o - %s | FileCheck -check-prefixes=GCN,EXP %s
# RUN: llc -mtriple=amdgcn -verify-machineinstrs -run-pass si-insert-waitcnts -amdgpu-waitcnt-forcevm=3 -o - %s | FileCheck -check-prefixes=GCN,VM %s
# RUN: llc -mtriple=amdgcn -verify-machineinstrs -run-pass si-insert-waitcnts -amdgpu-waitcnt-forcezero=1 -amdgpu-waitcnt-forcevm=2 -o - %s | FileCheck -check-prefixes=GCN,ZERO %s
# check that the waitcnt pass options that force insertion of waitcnt instructions are working as expected
...
# GCN-LABEL: name: waitcnt-debug
# LGKM: S_WAITCNT 127
# LGKM-NEXT: S_NOP 0
# LGKM-NEXT: S_NOP 0
# EXP: S_WAITCNT 3855
# EXP-NEXT: S_NOP 0
# EXP-NEXT: S_WAITCNT 3855
# EXP-NEXT: S_NOP 0
# VM: S_WAITCNT 3952
# VM-NEXT: S_NOP 0
# VM-NEXT: S_WAITCNT 3952
# VM-NEXT: S_NOP 0
# VM-NEXT: S_WAITCNT 3952
# VM-NEXT: S_NOP 0
# ZERO: S_WAITCNT 0
# ZERO-NEXT: S_WAITCNT 0
# ZERO-NEXT: S_NOP 0
# ZERO-NEXT: S_WAITCNT 0
# ZERO-NEXT: S_NOP 0
name: waitcnt-debug
liveins:
body: |
bb.0:
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
...