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[PowerPC] Add some missing VSX bitcast patterns 

llvm-svn: 205352
This commit is contained in:
Hal Finkel 2014-04-01 19:24:27 +00:00
parent 911517848d
commit 9e0baa6d3a
2 changed files with 16 additions and 0 deletions
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8
llvm/lib/Target/PowerPC/PPCInstrVSX.td
View File

@ -758,6 +758,8 @@ def : Pat<(fma (fneg v4f32:$A), v4f32:$C, v4f32:$B),
def : Pat<(fma v4f32:$A, (fneg v4f32:$C), v4f32:$B), def : Pat<(fma v4f32:$A, (fneg v4f32:$C), v4f32:$B),
(XVNMSUBASP $B, $C, $A)>; (XVNMSUBASP $B, $C, $A)>;
def : Pat<(v2f64 (bitconvert v4f32:$A)),
(COPY_TO_REGCLASS $A, VSRC)>;
def : Pat<(v2f64 (bitconvert v4i32:$A)), def : Pat<(v2f64 (bitconvert v4i32:$A)),
(COPY_TO_REGCLASS $A, VSRC)>; (COPY_TO_REGCLASS $A, VSRC)>;
def : Pat<(v2f64 (bitconvert v8i16:$A)), def : Pat<(v2f64 (bitconvert v8i16:$A)),
@ -765,6 +767,8 @@ def : Pat<(v2f64 (bitconvert v8i16:$A)),
def : Pat<(v2f64 (bitconvert v16i8:$A)), def : Pat<(v2f64 (bitconvert v16i8:$A)),
(COPY_TO_REGCLASS $A, VSRC)>; (COPY_TO_REGCLASS $A, VSRC)>;
def : Pat<(v4f32 (bitconvert v2f64:$A)),
(COPY_TO_REGCLASS $A, VRRC)>;
def : Pat<(v4i32 (bitconvert v2f64:$A)), def : Pat<(v4i32 (bitconvert v2f64:$A)),
(COPY_TO_REGCLASS $A, VRRC)>; (COPY_TO_REGCLASS $A, VRRC)>;
def : Pat<(v8i16 (bitconvert v2f64:$A)), def : Pat<(v8i16 (bitconvert v2f64:$A)),
@ -772,6 +776,8 @@ def : Pat<(v8i16 (bitconvert v2f64:$A)),
def : Pat<(v16i8 (bitconvert v2f64:$A)), def : Pat<(v16i8 (bitconvert v2f64:$A)),
(COPY_TO_REGCLASS $A, VRRC)>; (COPY_TO_REGCLASS $A, VRRC)>;
def : Pat<(v2i64 (bitconvert v4f32:$A)),
(COPY_TO_REGCLASS $A, VSRC)>;
def : Pat<(v2i64 (bitconvert v4i32:$A)), def : Pat<(v2i64 (bitconvert v4i32:$A)),
(COPY_TO_REGCLASS $A, VSRC)>; (COPY_TO_REGCLASS $A, VSRC)>;
def : Pat<(v2i64 (bitconvert v8i16:$A)), def : Pat<(v2i64 (bitconvert v8i16:$A)),
@ -779,6 +785,8 @@ def : Pat<(v2i64 (bitconvert v8i16:$A)),
def : Pat<(v2i64 (bitconvert v16i8:$A)), def : Pat<(v2i64 (bitconvert v16i8:$A)),
(COPY_TO_REGCLASS $A, VSRC)>; (COPY_TO_REGCLASS $A, VSRC)>;
def : Pat<(v4f32 (bitconvert v2i64:$A)),
(COPY_TO_REGCLASS $A, VRRC)>;
def : Pat<(v4i32 (bitconvert v2i64:$A)), def : Pat<(v4i32 (bitconvert v2i64:$A)),
(COPY_TO_REGCLASS $A, VRRC)>; (COPY_TO_REGCLASS $A, VRRC)>;
def : Pat<(v8i16 (bitconvert v2i64:$A)), def : Pat<(v8i16 (bitconvert v2i64:$A)),

8
llvm/test/CodeGen/PowerPC/vsx.ll
View File

@ -641,3 +641,11 @@ define <2 x i32> @test80(i32 %v) {
; CHECK: blr ; CHECK: blr
} }
define <2 x double> @test81(<4 x float> %b) {
%w = bitcast <4 x float> %b to <2 x double>
ret <2 x double> %w
; CHECK-LABEL: @test81
; CHECK: blr
}