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Revert r244308 since it's introducing test regressions on Linux: 

- TestLldbGdbServer.py both clang & gcc, i386 and x86_64
 - TestConstVariables.py gcc, i386 and x86_64
 - 112 failures clang, i386

llvm-svn: 244514
This commit is contained in:
Oleksiy Vyalov 2015-08-10 21:49:50 +00:00
parent e5101e2016
commit 9dcdd2ee03
23 changed files with 1795 additions and 3865 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

101
lldb/include/lldb/Core/RegisterValue.h
View File

@ -19,9 +19,8 @@
#include "lldb/lldb-public.h"
#include "lldb/lldb-private.h"
#include "lldb/Host/Endian.h"
#include "llvm/ADT/APInt.h"
#include "lldb/Core/Scalar.h"
//#define ENABLE_128_BIT_SUPPORT 1
namespace lldb_private {
class RegisterValue
@ -38,7 +37,9 @@ namespace lldb_private {
eTypeUInt16,
eTypeUInt32,
eTypeUInt64,
#if defined (ENABLE_128_BIT_SUPPORT)
eTypeUInt128,
#endif
eTypeFloat,
eTypeDouble,
eTypeLongDouble,
@ -48,62 +49,63 @@ namespace lldb_private {
RegisterValue () :
m_type (eTypeInvalid)
{
m_scalar = (unsigned long)0;
}
explicit
RegisterValue (uint8_t inst) :
m_type (eTypeUInt8)
{
m_scalar = inst;
m_data.uint8 = inst;
}
explicit
RegisterValue (uint16_t inst) :
m_type (eTypeUInt16)
{
m_scalar = inst;
m_data.uint16 = inst;
}
explicit
RegisterValue (uint32_t inst) :
m_type (eTypeUInt32)
{
m_scalar = inst;
m_data.uint32 = inst;
}
explicit
RegisterValue (uint64_t inst) :
m_type (eTypeUInt64)
{
m_scalar = inst;
m_data.uint64 = inst;
}
#if defined (ENABLE_128_BIT_SUPPORT)
explicit
RegisterValue (llvm::APInt inst) :
RegisterValue (__uint128_t inst) :
m_type (eTypeUInt128)
{
m_scalar = llvm::APInt(inst);
m_data.uint128 = inst;
}
#endif
explicit
RegisterValue (float value) :
m_type (eTypeFloat)
{
m_scalar = value;
m_data.ieee_float = value;
}
explicit
RegisterValue (double value) :
m_type (eTypeDouble)
{
m_scalar = value;
m_data.ieee_double = value;
}
explicit
RegisterValue (long double value) :
m_type (eTypeLongDouble)
{
m_scalar = value;
m_data.ieee_long_double = value;
}
explicit
@ -165,7 +167,7 @@ namespace lldb_private {
{
if (success_ptr)
*success_ptr = true;
return m_scalar.UChar(fail_value);
return m_data.uint8;
}
if (success_ptr)
*success_ptr = true;
@ -181,8 +183,10 @@ namespace lldb_private {
uint64_t
GetAsUInt64 (uint64_t fail_value = UINT64_MAX, bool *success_ptr = NULL) const;
llvm::APInt
GetAsUInt128 (llvm::APInt& fail_value, bool *success_ptr = NULL) const;
#if defined (ENABLE_128_BIT_SUPPORT)
__uint128_t
GetAsUInt128 (__uint128_t fail_value = ~((__uint128_t)0), bool *success_ptr = NULL) const;
#endif
float
GetAsFloat (float fail_value = 0.0f, bool *success_ptr = NULL) const;
@ -215,92 +219,95 @@ namespace lldb_private {
operator = (uint8_t uint)
{
m_type = eTypeUInt8;
m_scalar = uint;
m_data.uint8 = uint;
}
void
operator = (uint16_t uint)
{
m_type = eTypeUInt16;
m_scalar = uint;
m_data.uint16 = uint;
}
void
operator = (uint32_t uint)
{
m_type = eTypeUInt32;
m_scalar = uint;
m_data.uint32 = uint;
}
void
operator = (uint64_t uint)
{
m_type = eTypeUInt64;
m_scalar = uint;
m_data.uint64 = uint;
}
#if defined (ENABLE_128_BIT_SUPPORT)
void
operator = (llvm::APInt uint)
operator = (__uint128_t uint)
{
m_type = eTypeUInt128;
m_scalar = llvm::APInt(uint);
m_data.uint128 = uint;
}
#endif
void
operator = (float f)
{
m_type = eTypeFloat;
m_scalar = f;
m_data.ieee_float = f;
}
void
operator = (double f)
{
m_type = eTypeDouble;
m_scalar = f;
m_data.ieee_double = f;
}
void
operator = (long double f)
{
m_type = eTypeLongDouble;
m_scalar = f;
m_data.ieee_long_double = f;
}
void
SetUInt8 (uint8_t uint)
{
m_type = eTypeUInt8;
m_scalar = uint;
m_data.uint8 = uint;
}
void
SetUInt16 (uint16_t uint)
{
m_type = eTypeUInt16;
m_scalar = uint;
m_data.uint16 = uint;
}
void
SetUInt32 (uint32_t uint, Type t = eTypeUInt32)
{
m_type = t;
m_scalar = uint;
m_data.uint32 = uint;
}
void
SetUInt64 (uint64_t uint, Type t = eTypeUInt64)
{
m_type = t;
m_scalar = uint;
m_data.uint64 = uint;
}
#if defined (ENABLE_128_BIT_SUPPORT)
void
SetUInt128 (llvm::APInt uint)
SetUInt128 (__uint128_t uint)
{
m_type = eTypeUInt128;
m_scalar = llvm::APInt(uint);
m_data.uint128 = uint;
}
#endif
bool
SetUInt (uint64_t uint, uint32_t byte_size);
@ -308,21 +315,21 @@ namespace lldb_private {
SetFloat (float f)
{
m_type = eTypeFloat;
m_scalar = f;
m_data.ieee_float = f;
}
void
SetDouble (double f)
{
m_type = eTypeDouble;
m_scalar = f;
m_data.ieee_double = f;
}
void
SetLongDouble (long double f)
{
m_type = eTypeLongDouble;
m_scalar = f;
m_data.ieee_long_double = f;
}
void
@ -360,7 +367,7 @@ namespace lldb_private {
GetByteOrder () const
{
if (m_type == eTypeBytes)
return buffer.byte_order;
return m_data.buffer.byte_order;
return lldb::endian::InlHostByteOrder();
}
@ -379,13 +386,25 @@ namespace lldb_private {
protected:
RegisterValue::Type m_type;
Scalar m_scalar;
struct
union
{
uint8_t bytes[kMaxRegisterByteSize]; // This must be big enough to hold any register for any supported target.
uint8_t length;
lldb::ByteOrder byte_order;
} buffer;
uint8_t uint8;
uint16_t uint16;
uint32_t uint32;
uint64_t uint64;
#if defined (ENABLE_128_BIT_SUPPORT)
__uint128_t uint128;
#endif
float ieee_float;
double ieee_double;
long double ieee_long_double;
struct
{
uint8_t bytes[kMaxRegisterByteSize]; // This must be big enough to hold any register for any supported target.
uint8_t length;
lldb::ByteOrder byte_order;
} buffer;
} m_data;
};
} // namespace lldb_private

144
lldb/include/lldb/Core/Scalar.h
View File

@ -11,11 +11,6 @@
#define liblldb_Scalar_h_
#include "lldb/lldb-private.h"
#include "llvm/ADT/APInt.h"
#include "llvm/ADT/APFloat.h"
#define NUM_OF_WORDS_INT128 2
#define BITWIDTH_INT128 128
namespace lldb_private {
@ -31,10 +26,6 @@ public:
enum Type
{
e_void = 0,
e_schar,
e_uchar,
e_sshort,
e_ushort,
e_sint,
e_uint,
e_slong,
@ -43,74 +34,22 @@ public:
e_ulonglong,
e_float,
e_double,
e_long_double,
e_uint128,
e_sint128
e_long_double
};
//------------------------------------------------------------------
// Constructors and Destructors
//------------------------------------------------------------------
Scalar();
Scalar(char v) : m_type(e_schar), m_float((float)0) { m_integer = llvm::APInt(sizeof(char) * 8, v, true);}
Scalar(unsigned char v) : m_type(e_uchar), m_float((float)0) { m_integer = llvm::APInt(sizeof(char) * 8, v);}
Scalar(short v) : m_type(e_sshort), m_float((float)0) { m_integer = llvm::APInt(sizeof(short) * 8, v, true);}
Scalar(unsigned short v) : m_type(e_ushort), m_float((float)0) { m_integer = llvm::APInt(sizeof(short) * 8, v);}
Scalar(int v) : m_type(e_sint), m_float((float)0) { m_integer = llvm::APInt(sizeof(int) * 8, v, true);}
Scalar(unsigned int v) : m_type(e_uint), m_float((float)0) { m_integer = llvm::APInt(sizeof(int) * 8, v);}
Scalar(long v) : m_type(e_slong), m_float((float)0) { m_integer = llvm::APInt(sizeof(long) * 8, v, true);}
Scalar(unsigned long v) : m_type(e_ulong), m_float((float)0) { m_integer = llvm::APInt(sizeof(long) * 8, v);}
Scalar(long long v) : m_type(e_slonglong), m_float((float)0) { m_integer = llvm::APInt(sizeof(long long) * 8, v, true);}
Scalar(unsigned long long v): m_type(e_ulonglong), m_float((float)0) { m_integer = llvm::APInt(sizeof(long long) * 8, v);}
Scalar(float v) : m_type(e_float), m_float(v) { m_float = llvm::APFloat(v); }
Scalar(double v) : m_type(e_double), m_float(v) { m_float = llvm::APFloat(v); }
Scalar(long double v, bool ieee_quad)
: m_type(e_long_double), m_float((float)0), m_ieee_quad(ieee_quad)
{
if(ieee_quad)
m_float = llvm::APFloat(llvm::APFloat::IEEEquad, llvm::APInt(BITWIDTH_INT128, NUM_OF_WORDS_INT128, ((type128 *)&v)->x));
else
m_float = llvm::APFloat(llvm::APFloat::x87DoubleExtended, llvm::APInt(BITWIDTH_INT128, NUM_OF_WORDS_INT128, ((type128 *)&v)->x));
}
Scalar(llvm::APInt v) :
m_type(),
m_float((float)0)
{
m_integer = llvm::APInt(v);
switch(m_integer.getBitWidth())
{
case 8:
if(m_integer.isSignedIntN(sizeof(schar_t) * 8))
m_type = e_schar;
else
m_type = e_uchar;
break;
case 16:
if(m_integer.isSignedIntN(sizeof(sshort_t) * 8))
m_type = e_sshort;
else
m_type = e_ushort;
break;
case 32:
if(m_integer.isSignedIntN(sizeof(sint_t) * 8))
m_type = e_sint;
else
m_type = e_uint;
break;
case 64:
if(m_integer.isSignedIntN(sizeof(slonglong_t) * 8))
m_type = e_slonglong;
else
m_type = e_ulonglong;
break;
case 128:
if(m_integer.isSignedIntN(BITWIDTH_INT128))
m_type = e_sint128;
else
m_type = e_uint128;
break;
}
}
Scalar(int v) : m_type(e_sint), m_data() { m_data.sint = v; }
Scalar(unsigned int v) : m_type(e_uint), m_data() { m_data.uint = v; }
Scalar(long v) : m_type(e_slong), m_data() { m_data.slong = v; }
Scalar(unsigned long v) : m_type(e_ulong), m_data() { m_data.ulong = v; }
Scalar(long long v) : m_type(e_slonglong), m_data() { m_data.slonglong = v; }
Scalar(unsigned long long v): m_type(e_ulonglong), m_data() { m_data.ulonglong = v; }
Scalar(float v) : m_type(e_float), m_data() { m_data.flt = v; }
Scalar(double v) : m_type(e_double), m_data() { m_data.dbl = v; }
Scalar(long double v) : m_type(e_long_double), m_data() { m_data.ldbl = v; }
Scalar(const Scalar& rhs);
//Scalar(const RegisterValue& reg_value);
virtual ~Scalar();
@ -122,18 +61,15 @@ public:
ExtractBitfield (uint32_t bit_size,
uint32_t bit_offset);
bool
SetBit(uint32_t bit);
bool
ClearBit(uint32_t bit);
void *
GetBytes() const;
size_t
GetByteSize() const;
static size_t
GetMaxByteSize()
{
return sizeof(ValueData);
}
bool
GetData (DataExtractor &data, size_t limit_byte_size = UINT32_MAX) const;
@ -147,7 +83,7 @@ public:
IsZero() const;
void
Clear() { m_type = e_void; m_integer.clearAllBits(); }
Clear() { m_type = e_void; m_data.ulonglong = 0; }
const char *
GetTypeAsCString() const;
@ -158,7 +94,7 @@ public:
bool
IsValid() const
{
return (m_type >= e_schar) && (m_type <= e_long_double);
return (m_type >= e_sint) && (m_type <= e_long_double);
}
bool
@ -188,10 +124,6 @@ public:
// need to be created. As a result, we currently don't need a variety of
// overloaded set value accessors.
//----------------------------------------------------------------------
Scalar& operator= (char v);
Scalar& operator= (unsigned char v);
Scalar& operator= (short v);
Scalar& operator= (unsigned short v);
Scalar& operator= (const int i);
Scalar& operator= (unsigned int v);
Scalar& operator= (long v);
@ -201,7 +133,6 @@ public:
Scalar& operator= (float v);
Scalar& operator= (double v);
Scalar& operator= (long double v);
Scalar& operator= (llvm::APInt v);
Scalar& operator= (const Scalar& rhs); // Assignment operator
Scalar& operator+= (const Scalar& rhs);
Scalar& operator<<= (const Scalar& rhs); // Shift left
@ -263,18 +194,6 @@ public:
unsigned long long
RawULongLong () const;
unsigned char
UChar(unsigned char fail_value = 0) const;
char
SChar(char fail_value = 0) const;
unsigned short
UShort(unsigned short fail_value = 0) const;
short
SShort(short fail_value = 0) const;
unsigned int
UInt(unsigned int fail_value = 0) const;
@ -290,12 +209,6 @@ public:
unsigned long long
ULongLong(unsigned long long fail_value = 0) const;
llvm::APInt
SInt128(llvm::APInt& fail_value) const;
llvm::APInt
UInt128(llvm::APInt& fail_value) const;
float
Float(float fail_value = 0.0f) const;
@ -342,10 +255,6 @@ public:
}
protected:
typedef char schar_t;
typedef unsigned char uchar_t;
typedef short sshort_t;
typedef unsigned short ushort_t;
typedef int sint_t;
typedef unsigned int uint_t;
typedef long slong_t;
@ -356,13 +265,24 @@ protected:
typedef double double_t;
typedef long double long_double_t;
union ValueData
{
int sint;
unsigned int uint;
long slong;
unsigned long ulong;
long long slonglong;
unsigned long long ulonglong;
float flt;
double dbl;
long double ldbl;
};
//------------------------------------------------------------------
// Classes that inherit from Scalar can see and modify these
//------------------------------------------------------------------
Scalar::Type m_type;
llvm::APInt m_integer;
llvm::APFloat m_float;
bool m_ieee_quad = false;
ValueData m_data;
private:
friend const Scalar operator+ (const Scalar& lhs, const Scalar& rhs);

7
lldb/include/lldb/Core/Value.h
View File

@ -101,7 +101,6 @@ public:
// Casts a vector, if valid, to an unsigned int of matching or largest supported size.
// Truncates to the beginning of the vector if required.
// Returns a default constructed Scalar if the Vector data is internally inconsistent.
llvm::APInt rhs = llvm::APInt(BITWIDTH_INT128, NUM_OF_WORDS_INT128, ((type128 *)bytes)->x);
Scalar
GetAsScalar() const
{
@ -112,7 +111,11 @@ public:
else if (length == 2) scalar = *(const uint16_t *)bytes;
else if (length == 4) scalar = *(const uint32_t *)bytes;
else if (length == 8) scalar = *(const uint64_t *)bytes;
else if (length >= 16) scalar = rhs;
#if defined (ENABLE_128_BIT_SUPPORT)
else if (length >= 16) scalar = *(const __uint128_t *)bytes;
#else
else if (length >= 16) scalar = *(const uint64_t *)bytes;
#endif
}
return scalar;
}

2
lldb/include/lldb/lldb-private-types.h
View File

@ -102,8 +102,6 @@ namespace lldb_private
// pass it.
};
typedef struct type128 { uint64_t x[2]; } type128;
} // namespace lldb_private
#endif // #if defined(__cplusplus)

588
lldb/source/Core/RegisterValue.cpp
View File

@ -215,10 +215,10 @@ RegisterValue::SetFromMemoryData (const RegisterInfo *reg_info,
}
else if (value_type == eTypeBytes)
{
buffer.byte_order = src_byte_order;
m_data.buffer.byte_order = src_byte_order;
// Make sure to set the buffer length of the destination buffer to avoid
// problems due to uninitalized variables.
buffer.length = src_len;
// problems due to uninitialized variables.
m_data.buffer.length = src_len;
}
const uint32_t bytes_copied = src_data.CopyByteOrderedData (0, // src offset
@ -240,23 +240,25 @@ RegisterValue::GetScalarValue (Scalar &scalar) const
case eTypeInvalid: break;
case eTypeBytes:
{
switch (buffer.length)
switch (m_data.buffer.length)
{
default: break;
case 1: scalar = *(uint8_t *)buffer.bytes; return true;
case 2: scalar = *(uint16_t *)buffer.bytes; return true;
case 4: scalar = *(uint32_t *)buffer.bytes; return true;
case 8: scalar = *(uint64_t *)buffer.bytes; return true;
case 1: scalar = m_data.uint8; return true;
case 2: scalar = m_data.uint16; return true;
case 4: scalar = m_data.uint32; return true;
case 8: scalar = m_data.uint64; return true;
}
}
case eTypeUInt8:
case eTypeUInt16:
case eTypeUInt32:
case eTypeUInt64:
case eTypeUInt128:
case eTypeFloat:
case eTypeDouble:
case eTypeLongDouble: scalar = m_scalar; return true;
case eTypeUInt8: scalar = m_data.uint8; return true;
case eTypeUInt16: scalar = m_data.uint16; return true;
case eTypeUInt32: scalar = m_data.uint32; return true;
case eTypeUInt64: scalar = m_data.uint64; return true;
#if defined (ENABLE_128_BIT_SUPPORT)
case eTypeUInt128: break;
#endif
case eTypeFloat: scalar = m_data.ieee_float; return true;
case eTypeDouble: scalar = m_data.ieee_double; return true;
case eTypeLongDouble: scalar = m_data.ieee_long_double; return true;
}
return false;
}
@ -287,8 +289,10 @@ RegisterValue::SetType (const RegisterInfo *reg_info)
m_type = eTypeUInt32;
else if (byte_size <= 8)
m_type = eTypeUInt64;
#if defined (ENABLE_128_BIT_SUPPORT)
else if (byte_size <= 16)
m_type = eTypeUInt128;
#endif
break;
case eEncodingIEEE754:
@ -338,9 +342,8 @@ RegisterValue::SetValueFromData (const RegisterInfo *reg_info, DataExtractor &sr
src_len = reg_info->byte_size;
// Zero out the value in case we get partial data...
memset (buffer.bytes, 0, sizeof (buffer.bytes));
type128 int128;
memset (m_data.buffer.bytes, 0, sizeof (m_data.buffer.bytes));
switch (SetType (reg_info))
{
case eTypeInvalid:
@ -350,36 +353,33 @@ RegisterValue::SetValueFromData (const RegisterInfo *reg_info, DataExtractor &sr
case eTypeUInt16: SetUInt16 (src.GetMaxU32 (&src_offset, src_len)); break;
case eTypeUInt32: SetUInt32 (src.GetMaxU32 (&src_offset, src_len)); break;
case eTypeUInt64: SetUInt64 (src.GetMaxU64 (&src_offset, src_len)); break;
#if defined (ENABLE_128_BIT_SUPPORT)
case eTypeUInt128:
{
__uint128_t data1 = src.GetU64 (&src_offset);
__uint128_t data2 = src.GetU64 (&src_offset);
if (src.GetByteSize() == eByteOrderBig)
{
int128.x[1] = src.GetU64 (&src_offset + 1);
int128.x[0] = src.GetU64 (&src_offset);
}
SetUInt128 (data1 << 64 + data2);
else
{
int128.x[0] = src.GetU64 (&src_offset);
int128.x[1] = src.GetU64 (&src_offset + 1);
}
SetUInt128 (llvm::APInt(128, 2, int128.x));
SetUInt128 (data2 << 64 + data1);
}
break;
#endif
case eTypeFloat: SetFloat (src.GetFloat (&src_offset)); break;
case eTypeDouble: SetDouble(src.GetDouble (&src_offset)); break;
case eTypeLongDouble: SetFloat (src.GetLongDouble (&src_offset)); break;
case eTypeBytes:
{
buffer.length = reg_info->byte_size;
buffer.byte_order = src.GetByteOrder();
assert (buffer.length <= kMaxRegisterByteSize);
if (buffer.length > kMaxRegisterByteSize)
buffer.length = kMaxRegisterByteSize;
m_data.buffer.length = reg_info->byte_size;
m_data.buffer.byte_order = src.GetByteOrder();
assert (m_data.buffer.length <= kMaxRegisterByteSize);
if (m_data.buffer.length > kMaxRegisterByteSize)
m_data.buffer.length = kMaxRegisterByteSize;
if (src.CopyByteOrderedData (src_offset, // offset within "src" to start extracting data
src_len, // src length
buffer.bytes, // dst buffer
buffer.length, // dst length
buffer.byte_order) == 0)// dst byte order
m_data.buffer.bytes, // dst buffer
m_data.buffer.length, // dst length
m_data.buffer.byte_order) == 0)// dst byte order
{
error.SetErrorString ("data copy failed data.");
return error;
@ -459,9 +459,6 @@ RegisterValue::SetValueFromCString (const RegisterInfo *reg_info, const char *va
}
bool success = false;
const uint32_t byte_size = reg_info->byte_size;
static float flt_val;
static double dbl_val;
static long double ldbl_val;
switch (reg_info->encoding)
{
case eEncodingInvalid:
@ -513,31 +510,22 @@ RegisterValue::SetValueFromCString (const RegisterInfo *reg_info, const char *va
case eEncodingIEEE754:
if (byte_size == sizeof (float))
{
if (::sscanf (value_str, "%f", &flt_val) == 1)
{
m_scalar = flt_val;
if (::sscanf (value_str, "%f", &m_data.ieee_float) == 1)
m_type = eTypeFloat;
}
else
error.SetErrorStringWithFormat ("'%s' is not a valid float string value", value_str);
}
else if (byte_size == sizeof (double))
{
if (::sscanf (value_str, "%lf", &dbl_val) == 1)
{
m_scalar = dbl_val;
if (::sscanf (value_str, "%lf", &m_data.ieee_double) == 1)
m_type = eTypeDouble;
}
else
error.SetErrorStringWithFormat ("'%s' is not a valid float string value", value_str);
}
else if (byte_size == sizeof (long double))
{
if (::sscanf (value_str, "%Lf", &ldbl_val) == 1)
{
m_scalar = ldbl_val;
if (::sscanf (value_str, "%Lf", &m_data.ieee_long_double) == 1)
m_type = eTypeLongDouble;
}
else
error.SetErrorStringWithFormat ("'%s' is not a valid float string value", value_str);
}
@ -569,11 +557,81 @@ RegisterValue::SignExtend (uint32_t sign_bitpos)
break;
case eTypeUInt8:
if (sign_bitpos == (8-1))
return true;
else if (sign_bitpos < (8-1))
{
uint8_t sign_bit = 1u << sign_bitpos;
if (m_data.uint8 & sign_bit)
{
const uint8_t mask = ~(sign_bit) + 1u;
m_data.uint8 |= mask;
}
return true;
}
break;
case eTypeUInt16:
if (sign_bitpos == (16-1))
return true;
else if (sign_bitpos < (16-1))
{
uint16_t sign_bit = 1u << sign_bitpos;
if (m_data.uint16 & sign_bit)
{
const uint16_t mask = ~(sign_bit) + 1u;
m_data.uint16 |= mask;
}
return true;
}
break;
case eTypeUInt32:
if (sign_bitpos == (32-1))
return true;
else if (sign_bitpos < (32-1))
{
uint32_t sign_bit = 1u << sign_bitpos;
if (m_data.uint32 & sign_bit)
{
const uint32_t mask = ~(sign_bit) + 1u;
m_data.uint32 |= mask;
}
return true;
}
break;
case eTypeUInt64:
if (sign_bitpos == (64-1))
return true;
else if (sign_bitpos < (64-1))
{
uint64_t sign_bit = 1ull << sign_bitpos;
if (m_data.uint64 & sign_bit)
{
const uint64_t mask = ~(sign_bit) + 1ull;
m_data.uint64 |= mask;
}
return true;
}
break;
#if defined (ENABLE_128_BIT_SUPPORT)
case eTypeUInt128:
return m_scalar.SignExtend(sign_bitpos);
if (sign_bitpos == (128-1))
return true;
else if (sign_bitpos < (128-1))
{
__uint128_t sign_bit = (__uint128_t)1u << sign_bitpos;
if (m_data.uint128 & sign_bit)
{
const uint128_t mask = ~(sign_bit) + 1u;
m_data.uint128 |= mask;
}
return true;
}
break;
#endif
case eTypeFloat:
case eTypeDouble:
case eTypeLongDouble:
@ -591,19 +649,21 @@ RegisterValue::CopyValue (const RegisterValue &rhs)
{
case eTypeInvalid:
return false;
case eTypeUInt8:
case eTypeUInt16:
case eTypeUInt32:
case eTypeUInt64:
case eTypeUInt128:
case eTypeFloat:
case eTypeDouble:
case eTypeLongDouble: m_scalar = rhs.m_scalar; break;
case eTypeUInt8: m_data.uint8 = rhs.m_data.uint8; break;
case eTypeUInt16: m_data.uint16 = rhs.m_data.uint16; break;
case eTypeUInt32: m_data.uint32 = rhs.m_data.uint32; break;
case eTypeUInt64: m_data.uint64 = rhs.m_data.uint64; break;
#if defined (ENABLE_128_BIT_SUPPORT)
case eTypeUInt128: m_data.uint128 = rhs.m_data.uint128; break;
#endif
case eTypeFloat: m_data.ieee_float = rhs.m_data.ieee_float; break;
case eTypeDouble: m_data.ieee_double = rhs.m_data.ieee_double; break;
case eTypeLongDouble: m_data.ieee_long_double = rhs.m_data.ieee_long_double; break;
case eTypeBytes:
assert (rhs.buffer.length <= kMaxRegisterByteSize);
::memcpy (buffer.bytes, rhs.buffer.bytes, kMaxRegisterByteSize);
buffer.length = rhs.buffer.length;
buffer.byte_order = rhs.buffer.byte_order;
assert (rhs.m_data.buffer.length <= kMaxRegisterByteSize);
::memcpy (m_data.buffer.bytes, rhs.m_data.buffer.bytes, kMaxRegisterByteSize);
m_data.buffer.length = rhs.m_data.buffer.length;
m_data.buffer.byte_order = rhs.m_data.buffer.byte_order;
break;
}
return true;
@ -618,15 +678,15 @@ RegisterValue::GetAsUInt16 (uint16_t fail_value, bool *success_ptr) const
switch (m_type)
{
default: break;
case eTypeUInt8:
case eTypeUInt16: return m_scalar.UShort(fail_value);
case eTypeUInt8: return m_data.uint8;
case eTypeUInt16: return m_data.uint16;
case eTypeBytes:
{
switch (buffer.length)
switch (m_data.buffer.length)
{
default: break;
case 1:
case 2: return *(uint16_t *)buffer.bytes;
case 1: return m_data.uint8;
case 2: return m_data.uint16;
}
}
break;
@ -644,20 +704,29 @@ RegisterValue::GetAsUInt32 (uint32_t fail_value, bool *success_ptr) const
switch (m_type)
{
default: break;
case eTypeUInt8:
case eTypeUInt16:
case eTypeUInt32:
case eTypeUInt8: return m_data.uint8;
case eTypeUInt16: return m_data.uint16;
case eTypeUInt32: return m_data.uint32;
case eTypeFloat:
if (sizeof(float) == sizeof(uint32_t))
return m_data.uint32;
break;
case eTypeDouble:
case eTypeLongDouble: return m_scalar.UInt(fail_value);
if (sizeof(double) == sizeof(uint32_t))
return m_data.uint32;
break;
case eTypeLongDouble:
if (sizeof(long double) == sizeof(uint32_t))
return m_data.uint32;
break;
case eTypeBytes:
{
switch (buffer.length)
switch (m_data.buffer.length)
{
default: break;
case 1:
case 2:
case 4: return *(uint32_t *)buffer.bytes;
case 1: return m_data.uint8;
case 2: return m_data.uint16;
case 4: return m_data.uint32;
}
}
break;
@ -675,22 +744,31 @@ RegisterValue::GetAsUInt64 (uint64_t fail_value, bool *success_ptr) const
switch (m_type)
{
default: break;
case eTypeUInt8:
case eTypeUInt16:
case eTypeUInt32:
case eTypeUInt64:
case eTypeUInt8: return m_data.uint8;
case eTypeUInt16: return m_data.uint16;
case eTypeUInt32: return m_data.uint32;
case eTypeUInt64: return m_data.uint64;
case eTypeFloat:
if (sizeof(float) == sizeof(uint64_t))
return m_data.uint64;
break;
case eTypeDouble:
case eTypeLongDouble: return m_scalar.ULongLong(fail_value);
if (sizeof(double) == sizeof(uint64_t))
return m_data.uint64;
break;
case eTypeLongDouble:
if (sizeof(long double) == sizeof(uint64_t))
return m_data.uint64;
break;
case eTypeBytes:
{
switch (buffer.length)
switch (m_data.buffer.length)
{
default: break;
case 1:
case 2:
case 4:
case 8: return *(uint64_t *)buffer.bytes;
case 1: return m_data.uint8;
case 2: return m_data.uint16;
case 4: return m_data.uint32;
case 8: return m_data.uint64;
}
}
break;
@ -700,36 +778,43 @@ RegisterValue::GetAsUInt64 (uint64_t fail_value, bool *success_ptr) const
return fail_value;
}
llvm::APInt
RegisterValue::GetAsUInt128 (llvm::APInt& fail_value, bool *success_ptr) const
#if defined (ENABLE_128_BIT_SUPPORT)
__uint128_t
RegisterValue::GetAsUInt128 (__uint128_t fail_value, bool *success_ptr) const
{
if (success_ptr)
*success_ptr = true;
switch (m_type)
{
default: break;
case eTypeUInt8:
case eTypeUInt16:
case eTypeUInt32:
case eTypeUInt64:
case eTypeUInt128:
case eTypeUInt8: return m_data.uint8;
case eTypeUInt16: return m_data.uint16;
case eTypeUInt32: return m_data.uint32;
case eTypeUInt64: return m_data.uint64;
case eTypeUInt128: return m_data.uint128;
case eTypeFloat:
if (sizeof(float) == sizeof(__uint128_t))
return m_data.uint128;
break;
case eTypeDouble:
case eTypeLongDouble: return m_scalar.UInt128(fail_value);
if (sizeof(double) == sizeof(__uint128_t))
return m_data.uint128;
break;
case eTypeLongDouble:
if (sizeof(long double) == sizeof(__uint128_t))
return m_data.uint128;
break;
case eTypeBytes:
{
switch (buffer.length)
switch (m_data.buffer.length)
{
default:
break;
case 1:
case 2:
case 4:
case 8:
case 16:
{
return llvm::APInt(BITWIDTH_INT128, NUM_OF_WORDS_INT128, ((type128 *)buffer.bytes)->x);
}
default:
break;
case 1: return m_data.uint8;
case 2: return m_data.uint16;
case 4: return m_data.uint32;
case 8: return m_data.uint64;
case 16: return m_data.uint128;
}
}
break;
@ -738,7 +823,7 @@ RegisterValue::GetAsUInt128 (llvm::APInt& fail_value, bool *success_ptr) const
*success_ptr = false;
return fail_value;
}
#endif
float
RegisterValue::GetAsFloat (float fail_value, bool *success_ptr) const
{
@ -748,12 +833,28 @@ RegisterValue::GetAsFloat (float fail_value, bool *success_ptr) const
{
default: break;
case eTypeUInt32:
if (sizeof(float) == sizeof(m_data.uint32))
return m_data.ieee_float;
break;
case eTypeUInt64:
if (sizeof(float) == sizeof(m_data.uint64))
return m_data.ieee_float;
break;
#if defined (ENABLE_128_BIT_SUPPORT)
case eTypeUInt128:
case eTypeFloat:
if (sizeof(float) == sizeof(m_data.uint128))
return m_data.ieee_float;
break;
#endif
case eTypeFloat: return m_data.ieee_float;
case eTypeDouble:
if (sizeof(float) == sizeof(double))
return m_data.ieee_float;
break;
case eTypeLongDouble:
return m_scalar.Float(fail_value);
if (sizeof(float) == sizeof(long double))
return m_data.ieee_float;
break;
}
if (success_ptr)
*success_ptr = false;
@ -771,12 +872,27 @@ RegisterValue::GetAsDouble (double fail_value, bool *success_ptr) const
break;
case eTypeUInt32:
if (sizeof(double) == sizeof(m_data.uint32))
return m_data.ieee_double;
break;
case eTypeUInt64:
if (sizeof(double) == sizeof(m_data.uint64))
return m_data.ieee_double;
break;
#if defined (ENABLE_128_BIT_SUPPORT)
case eTypeUInt128:
case eTypeFloat:
case eTypeDouble:
if (sizeof(double) == sizeof(m_data.uint128))
return m_data.ieee_double;
#endif
case eTypeFloat: return m_data.ieee_float;
case eTypeDouble: return m_data.ieee_double;
case eTypeLongDouble:
return m_scalar.Double(fail_value);
if (sizeof(double) == sizeof(long double))
return m_data.ieee_double;
break;
}
if (success_ptr)
*success_ptr = false;
@ -794,12 +910,24 @@ RegisterValue::GetAsLongDouble (long double fail_value, bool *success_ptr) const
break;
case eTypeUInt32:
if (sizeof(long double) == sizeof(m_data.uint32))
return m_data.ieee_long_double;
break;
case eTypeUInt64:
if (sizeof(long double) == sizeof(m_data.uint64))
return m_data.ieee_long_double;
break;
#if defined (ENABLE_128_BIT_SUPPORT)
case eTypeUInt128:
case eTypeFloat:
case eTypeDouble:
case eTypeLongDouble:
return m_scalar.LongDouble();
if (sizeof(long double) == sizeof(m_data.uint128))
return m_data.ieee_long_double;
#endif
case eTypeFloat: return m_data.ieee_float;
case eTypeDouble: return m_data.ieee_double;
case eTypeLongDouble: return m_data.ieee_long_double;
break;
}
if (success_ptr)
*success_ptr = false;
@ -812,15 +940,17 @@ RegisterValue::GetBytes () const
switch (m_type)
{
case eTypeInvalid: break;
case eTypeUInt8:
case eTypeUInt16:
case eTypeUInt32:
case eTypeUInt64:
case eTypeUInt128:
case eTypeFloat:
case eTypeDouble:
case eTypeLongDouble: return m_scalar.GetBytes();
case eTypeBytes: return buffer.bytes;
case eTypeUInt8: return &m_data.uint8;
case eTypeUInt16: return &m_data.uint16;
case eTypeUInt32: return &m_data.uint32;
case eTypeUInt64: return &m_data.uint64;
#if defined (ENABLE_128_BIT_SUPPORT)
case eTypeUInt128: return &m_data.uint128;
#endif
case eTypeFloat: return &m_data.ieee_float;
case eTypeDouble: return &m_data.ieee_double;
case eTypeLongDouble: return &m_data.ieee_long_double;
case eTypeBytes: return m_data.buffer.bytes;
}
return NULL;
}
@ -831,15 +961,17 @@ RegisterValue::GetBytes ()
switch (m_type)
{
case eTypeInvalid: break;
case eTypeUInt8:
case eTypeUInt16:
case eTypeUInt32:
case eTypeUInt64:
case eTypeUInt128:
case eTypeFloat:
case eTypeDouble:
case eTypeLongDouble: return m_scalar.GetBytes();
case eTypeBytes: return buffer.bytes;
case eTypeUInt8: return &m_data.uint8;
case eTypeUInt16: return &m_data.uint16;
case eTypeUInt32: return &m_data.uint32;
case eTypeUInt64: return &m_data.uint64;
#if defined (ENABLE_128_BIT_SUPPORT)
case eTypeUInt128: return &m_data.uint128;
#endif
case eTypeFloat: return &m_data.ieee_float;
case eTypeDouble: return &m_data.ieee_double;
case eTypeLongDouble: return &m_data.ieee_long_double;
case eTypeBytes: return m_data.buffer.bytes;
}
return NULL;
}
@ -850,15 +982,17 @@ RegisterValue::GetByteSize () const
switch (m_type)
{
case eTypeInvalid: break;
case eTypeUInt8:
case eTypeUInt16:
case eTypeUInt32:
case eTypeUInt64:
case eTypeUInt128:
case eTypeFloat:
case eTypeDouble:
case eTypeLongDouble: return m_scalar.GetByteSize();
case eTypeBytes: return buffer.length;
case eTypeUInt8: return sizeof(m_data.uint8);
case eTypeUInt16: return sizeof(m_data.uint16);
case eTypeUInt32: return sizeof(m_data.uint32);
case eTypeUInt64: return sizeof(m_data.uint64);
#if defined (ENABLE_128_BIT_SUPPORT)
case eTypeUInt128: return sizeof(m_data.uint128);
#endif
case eTypeFloat: return sizeof(m_data.ieee_float);
case eTypeDouble: return sizeof(m_data.ieee_double);
case eTypeLongDouble: return sizeof(m_data.ieee_long_double);
case eTypeBytes: return m_data.buffer.length;
}
return 0;
}
@ -887,10 +1021,12 @@ RegisterValue::SetUInt (uint64_t uint, uint32_t byte_size)
{
SetUInt64 (uint);
}
#if defined (ENABLE_128_BIT_SUPPORT)
else if (byte_size <= 16)
{
SetUInt128 (llvm::APInt(64, uint));
SetUInt128 (uint);
}
#endif
else
return false;
return true;
@ -900,21 +1036,21 @@ void
RegisterValue::SetBytes (const void *bytes, size_t length, lldb::ByteOrder byte_order)
{
// If this assertion fires off we need to increase the size of
// buffer.bytes, or make it something that is allocated on
// m_data.buffer.bytes, or make it something that is allocated on
// the heap. Since the data buffer is in a union, we can't make it
// a collection class like SmallVector...
if (bytes && length > 0)
{
assert (length <= sizeof (buffer.bytes) && "Storing too many bytes in a RegisterValue.");
assert (length <= sizeof (m_data.buffer.bytes) && "Storing too many bytes in a RegisterValue.");
m_type = eTypeBytes;
buffer.length = length;
memcpy (buffer.bytes, bytes, length);
buffer.byte_order = byte_order;
m_data.buffer.length = length;
memcpy (m_data.buffer.bytes, bytes, length);
m_data.buffer.byte_order = byte_order;
}
else
{
m_type = eTypeInvalid;
buffer.length = 0;
m_data.buffer.length = 0;
}
}
@ -927,23 +1063,25 @@ RegisterValue::operator == (const RegisterValue &rhs) const
switch (m_type)
{
case eTypeInvalid: return true;
case eTypeUInt8:
case eTypeUInt16:
case eTypeUInt32:
case eTypeUInt64:
case eTypeUInt128:
case eTypeFloat:
case eTypeDouble:
case eTypeLongDouble: return m_scalar == rhs.m_scalar;
case eTypeUInt8: return m_data.uint8 == rhs.m_data.uint8;
case eTypeUInt16: return m_data.uint16 == rhs.m_data.uint16;
case eTypeUInt32: return m_data.uint32 == rhs.m_data.uint32;
case eTypeUInt64: return m_data.uint64 == rhs.m_data.uint64;
#if defined (ENABLE_128_BIT_SUPPORT)
case eTypeUInt128: return m_data.uint128 == rhs.m_data.uint128;
#endif
case eTypeFloat: return m_data.ieee_float == rhs.m_data.ieee_float;
case eTypeDouble: return m_data.ieee_double == rhs.m_data.ieee_double;
case eTypeLongDouble: return m_data.ieee_long_double == rhs.m_data.ieee_long_double;
case eTypeBytes:
if (buffer.length != rhs.buffer.length)
if (m_data.buffer.length != rhs.m_data.buffer.length)
return false;
else
{
uint8_t length = buffer.length;
uint8_t length = m_data.buffer.length;
if (length > kMaxRegisterByteSize)
length = kMaxRegisterByteSize;
return memcmp (buffer.bytes, rhs.buffer.bytes, length) == 0;
return memcmp (m_data.buffer.bytes, rhs.m_data.buffer.bytes, length) == 0;
}
break;
}
@ -959,25 +1097,27 @@ RegisterValue::operator != (const RegisterValue &rhs) const
switch (m_type)
{
case eTypeInvalid: return false;
case eTypeUInt8:
case eTypeUInt16:
case eTypeUInt32:
case eTypeUInt64:
case eTypeUInt128:
case eTypeFloat:
case eTypeDouble:
case eTypeLongDouble: return m_scalar != rhs.m_scalar;
case eTypeUInt8: return m_data.uint8 != rhs.m_data.uint8;
case eTypeUInt16: return m_data.uint16 != rhs.m_data.uint16;
case eTypeUInt32: return m_data.uint32 != rhs.m_data.uint32;
case eTypeUInt64: return m_data.uint64 != rhs.m_data.uint64;
#if defined (ENABLE_128_BIT_SUPPORT)
case eTypeUInt128: return m_data.uint128 != rhs.m_data.uint128;
#endif
case eTypeFloat: return m_data.ieee_float != rhs.m_data.ieee_float;
case eTypeDouble: return m_data.ieee_double != rhs.m_data.ieee_double;
case eTypeLongDouble: return m_data.ieee_long_double != rhs.m_data.ieee_long_double;
case eTypeBytes:
if (buffer.length != rhs.buffer.length)
if (m_data.buffer.length != rhs.m_data.buffer.length)
{
return true;
}
else
{
uint8_t length = buffer.length;
uint8_t length = m_data.buffer.length;
if (length > kMaxRegisterByteSize)
length = kMaxRegisterByteSize;
return memcmp (buffer.bytes, rhs.buffer.bytes, length) != 0;
return memcmp (m_data.buffer.bytes, rhs.m_data.buffer.bytes, length) != 0;
}
break;
}
@ -992,35 +1132,63 @@ RegisterValue::ClearBit (uint32_t bit)
case eTypeInvalid:
break;
case eTypeUInt8:
case eTypeUInt16:
case eTypeUInt32:
case eTypeUInt64:
case eTypeUInt128:
if (bit < (GetByteSize() * 8))
case eTypeUInt8:
if (bit < 8)
{
return m_scalar.ClearBit(bit);
m_data.uint8 &= ~(1u << bit);
return true;
}
break;
case eTypeUInt16:
if (bit < 16)
{
m_data.uint16 &= ~(1u << bit);
return true;
}
break;
case eTypeUInt32:
if (bit < 32)
{
m_data.uint32 &= ~(1u << bit);
return true;
}
break;
case eTypeUInt64:
if (bit < 64)
{
m_data.uint64 &= ~(1ull << (uint64_t)bit);
return true;
}
break;
#if defined (ENABLE_128_BIT_SUPPORT)
case eTypeUInt128:
if (bit < 64)
{
m_data.uint128 &= ~((__uint128_t)1ull << (__uint128_t)bit);
return true;
}
#endif
case eTypeFloat:
case eTypeDouble:
case eTypeLongDouble:
break;
case eTypeBytes:
if (buffer.byte_order == eByteOrderBig || buffer.byte_order == eByteOrderLittle)
if (m_data.buffer.byte_order == eByteOrderBig || m_data.buffer.byte_order == eByteOrderLittle)
{
uint32_t byte_idx;
if (buffer.byte_order == eByteOrderBig)
byte_idx = buffer.length - (bit / 8) - 1;
if (m_data.buffer.byte_order == eByteOrderBig)
byte_idx = m_data.buffer.length - (bit / 8) - 1;
else
byte_idx = bit / 8;
const uint32_t byte_bit = bit % 8;
if (byte_idx < buffer.length)
if (byte_idx < m_data.buffer.length)
{
buffer.bytes[byte_idx] &= ~(1u << byte_bit);
m_data.buffer.bytes[byte_idx] &= ~(1u << byte_bit);
return true;
}
}
@ -1039,34 +1207,62 @@ RegisterValue::SetBit (uint32_t bit)
break;
case eTypeUInt8:
case eTypeUInt16:
case eTypeUInt32:
case eTypeUInt64:
case eTypeUInt128:
if (bit < (GetByteSize() * 8))
if (bit < 8)
{
return m_scalar.SetBit(bit);
m_data.uint8 |= (1u << bit);
return true;
}
break;
case eTypeUInt16:
if (bit < 16)
{
m_data.uint16 |= (1u << bit);
return true;
}
break;
case eTypeUInt32:
if (bit < 32)
{
m_data.uint32 |= (1u << bit);
return true;
}
break;
case eTypeUInt64:
if (bit < 64)
{
m_data.uint64 |= (1ull << (uint64_t)bit);
return true;
}
break;
#if defined (ENABLE_128_BIT_SUPPORT)
case eTypeUInt128:
if (bit < 64)
{
m_data.uint128 |= ((__uint128_t)1ull << (__uint128_t)bit);
return true;
}
#endif
case eTypeFloat:
case eTypeDouble:
case eTypeLongDouble:
break;
case eTypeBytes:
if (buffer.byte_order == eByteOrderBig || buffer.byte_order == eByteOrderLittle)
if (m_data.buffer.byte_order == eByteOrderBig || m_data.buffer.byte_order == eByteOrderLittle)
{
uint32_t byte_idx;
if (buffer.byte_order == eByteOrderBig)
byte_idx = buffer.length - (bit / 8) - 1;
if (m_data.buffer.byte_order == eByteOrderBig)
byte_idx = m_data.buffer.length - (bit / 8) - 1;
else
byte_idx = bit / 8;
const uint32_t byte_bit = bit % 8;
if (byte_idx < buffer.length)
if (byte_idx < m_data.buffer.length)
{
buffer.bytes[byte_idx] |= (1u << byte_bit);
m_data.buffer.bytes[byte_idx] |= (1u << byte_bit);
return true;
}
}

3278
lldb/source/Core/Scalar.cpp
View File

File diff suppressed because it is too large Load Diff

2
lldb/source/Core/ValueObject.cpp
View File

@ -1897,7 +1897,7 @@ ValueObject::SetValueFromCString (const char *value_str, Error& error)
// If the value is already a scalar, then let the scalar change itself:
m_value.GetScalar().SetValueFromCString (value_str, encoding, byte_size);
}
else if (byte_size <= 16)
else if (byte_size <= Scalar::GetMaxByteSize())
{
// If the value fits in a scalar, then make a new scalar and again let the
// scalar code do the conversion, then figure out where to put the new value.

66
lldb/source/Plugins/Instruction/MIPS/EmulateInstructionMIPS.cpp
View File

@ -33,7 +33,7 @@
#include "llvm/ADT/STLExtras.h"
#include "Plugins/Process/Utility/InstructionUtils.h"
#include "Plugins/Process/Utility/RegisterContext_mips.h" //mips32 has same registers nos as mips64
#include "Plugins/Process/Utility/RegisterContext_mips64.h" //mips32 has same registers nos as mips64
using namespace lldb;
using namespace lldb_private;
@ -302,38 +302,38 @@ EmulateInstructionMIPS::GetRegisterName (unsigned reg_num, bool alternate_name)
case gcc_dwarf_bad_mips: return "bad";
case gcc_dwarf_cause_mips: return "cause";
case gcc_dwarf_pc_mips: return "pc";
case gcc_dwarf_f0_mips: return "f0";
case gcc_dwarf_f1_mips: return "f1";
case gcc_dwarf_f2_mips: return "f2";
case gcc_dwarf_f3_mips: return "f3";
case gcc_dwarf_f4_mips: return "f4";
case gcc_dwarf_f5_mips: return "f5";
case gcc_dwarf_f6_mips: return "f6";
case gcc_dwarf_f7_mips: return "f7";
case gcc_dwarf_f8_mips: return "f8";
case gcc_dwarf_f9_mips: return "f9";
case gcc_dwarf_f10_mips: return "f10";
case gcc_dwarf_f11_mips: return "f11";
case gcc_dwarf_f12_mips: return "f12";
case gcc_dwarf_f13_mips: return "f13";
case gcc_dwarf_f14_mips: return "f14";
case gcc_dwarf_f15_mips: return "f15";
case gcc_dwarf_f16_mips: return "f16";
case gcc_dwarf_f17_mips: return "f17";
case gcc_dwarf_f18_mips: return "f18";
case gcc_dwarf_f19_mips: return "f19";
case gcc_dwarf_f20_mips: return "f20";
case gcc_dwarf_f21_mips: return "f21";
case gcc_dwarf_f22_mips: return "f22";
case gcc_dwarf_f23_mips: return "f23";
case gcc_dwarf_f24_mips: return "f24";
case gcc_dwarf_f25_mips: return "f25";
case gcc_dwarf_f26_mips: return "f26";
case gcc_dwarf_f27_mips: return "f27";
case gcc_dwarf_f28_mips: return "f28";
case gcc_dwarf_f29_mips: return "f29";
case gcc_dwarf_f30_mips: return "f30";
case gcc_dwarf_f31_mips: return "f31";
case gcc_dwarf_f0_mips: return "fp_reg[0]";
case gcc_dwarf_f1_mips: return "fp_reg[1]";
case gcc_dwarf_f2_mips: return "fp_reg[2]";
case gcc_dwarf_f3_mips: return "fp_reg[3]";
case gcc_dwarf_f4_mips: return "fp_reg[4]";
case gcc_dwarf_f5_mips: return "fp_reg[5]";
case gcc_dwarf_f6_mips: return "fp_reg[6]";
case gcc_dwarf_f7_mips: return "fp_reg[7]";
case gcc_dwarf_f8_mips: return "fp_reg[8]";
case gcc_dwarf_f9_mips: return "fp_reg[9]";
case gcc_dwarf_f10_mips: return "fp_reg[10]";
case gcc_dwarf_f11_mips: return "fp_reg[11]";
case gcc_dwarf_f12_mips: return "fp_reg[12]";
case gcc_dwarf_f13_mips: return "fp_reg[13]";
case gcc_dwarf_f14_mips: return "fp_reg[14]";
case gcc_dwarf_f15_mips: return "fp_reg[15]";
case gcc_dwarf_f16_mips: return "fp_reg[16]";
case gcc_dwarf_f17_mips: return "fp_reg[17]";
case gcc_dwarf_f18_mips: return "fp_reg[18]";
case gcc_dwarf_f19_mips: return "fp_reg[19]";
case gcc_dwarf_f20_mips: return "fp_reg[20]";
case gcc_dwarf_f21_mips: return "fp_reg[21]";
case gcc_dwarf_f22_mips: return "fp_reg[22]";
case gcc_dwarf_f23_mips: return "fp_reg[23]";
case gcc_dwarf_f24_mips: return "fp_reg[24]";
case gcc_dwarf_f25_mips: return "fp_reg[25]";
case gcc_dwarf_f26_mips: return "fp_reg[26]";
case gcc_dwarf_f27_mips: return "fp_reg[27]";
case gcc_dwarf_f28_mips: return "fp_reg[28]";
case gcc_dwarf_f29_mips: return "fp_reg[29]";
case gcc_dwarf_f30_mips: return "fp_reg[30]";
case gcc_dwarf_f31_mips: return "fp_reg[31]";
case gcc_dwarf_fcsr_mips: return "fcsr";
case gcc_dwarf_fir_mips: return "fir";
}

66
lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
View File

@ -33,7 +33,7 @@
#include "llvm/ADT/STLExtras.h"
#include "Plugins/Process/Utility/InstructionUtils.h"
#include "Plugins/Process/Utility/RegisterContext_mips.h"
#include "Plugins/Process/Utility/RegisterContext_mips64.h"
using namespace lldb;
using namespace lldb_private;
@ -302,38 +302,38 @@ EmulateInstructionMIPS64::GetRegisterName (unsigned reg_num, bool alternate_name
case gcc_dwarf_bad_mips64: return "bad";
case gcc_dwarf_cause_mips64: return "cause";
case gcc_dwarf_pc_mips64: return "pc";
case gcc_dwarf_f0_mips64: return "f0";
case gcc_dwarf_f1_mips64: return "f1";
case gcc_dwarf_f2_mips64: return "f2";
case gcc_dwarf_f3_mips64: return "f3";
case gcc_dwarf_f4_mips64: return "f4";
case gcc_dwarf_f5_mips64: return "f5";
case gcc_dwarf_f6_mips64: return "f6";
case gcc_dwarf_f7_mips64: return "f7";
case gcc_dwarf_f8_mips64: return "f8";
case gcc_dwarf_f9_mips64: return "f9";
case gcc_dwarf_f10_mips64: return "f10";
case gcc_dwarf_f11_mips64: return "f11";
case gcc_dwarf_f12_mips64: return "f12";
case gcc_dwarf_f13_mips64: return "f13";
case gcc_dwarf_f14_mips64: return "f14";
case gcc_dwarf_f15_mips64: return "f15";
case gcc_dwarf_f16_mips64: return "f16";
case gcc_dwarf_f17_mips64: return "f17";
case gcc_dwarf_f18_mips64: return "f18";
case gcc_dwarf_f19_mips64: return "f19";
case gcc_dwarf_f20_mips64: return "f20";
case gcc_dwarf_f21_mips64: return "f21";
case gcc_dwarf_f22_mips64: return "f22";
case gcc_dwarf_f23_mips64: return "f23";
case gcc_dwarf_f24_mips64: return "f24";
case gcc_dwarf_f25_mips64: return "f25";
case gcc_dwarf_f26_mips64: return "f26";
case gcc_dwarf_f27_mips64: return "f27";
case gcc_dwarf_f28_mips64: return "f28";
case gcc_dwarf_f29_mips64: return "f29";
case gcc_dwarf_f30_mips64: return "f30";
case gcc_dwarf_f31_mips64: return "f31";
case gcc_dwarf_f0_mips64: return "fp_reg[0]";
case gcc_dwarf_f1_mips64: return "fp_reg[1]";
case gcc_dwarf_f2_mips64: return "fp_reg[2]";
case gcc_dwarf_f3_mips64: return "fp_reg[3]";
case gcc_dwarf_f4_mips64: return "fp_reg[4]";
case gcc_dwarf_f5_mips64: return "fp_reg[5]";
case gcc_dwarf_f6_mips64: return "fp_reg[6]";
case gcc_dwarf_f7_mips64: return "fp_reg[7]";
case gcc_dwarf_f8_mips64: return "fp_reg[8]";
case gcc_dwarf_f9_mips64: return "fp_reg[9]";
case gcc_dwarf_f10_mips64: return "fp_reg[10]";
case gcc_dwarf_f11_mips64: return "fp_reg[11]";
case gcc_dwarf_f12_mips64: return "fp_reg[12]";
case gcc_dwarf_f13_mips64: return "fp_reg[13]";
case gcc_dwarf_f14_mips64: return "fp_reg[14]";
case gcc_dwarf_f15_mips64: return "fp_reg[15]";
case gcc_dwarf_f16_mips64: return "fp_reg[16]";
case gcc_dwarf_f17_mips64: return "fp_reg[17]";
case gcc_dwarf_f18_mips64: return "fp_reg[18]";
case gcc_dwarf_f19_mips64: return "fp_reg[19]";
case gcc_dwarf_f20_mips64: return "fp_reg[20]";
case gcc_dwarf_f21_mips64: return "fp_reg[21]";
case gcc_dwarf_f22_mips64: return "fp_reg[22]";
case gcc_dwarf_f23_mips64: return "fp_reg[23]";
case gcc_dwarf_f24_mips64: return "fp_reg[24]";
case gcc_dwarf_f25_mips64: return "fp_reg[25]";
case gcc_dwarf_f26_mips64: return "fp_reg[26]";
case gcc_dwarf_f27_mips64: return "fp_reg[27]";
case gcc_dwarf_f28_mips64: return "fp_reg[28]";
case gcc_dwarf_f29_mips64: return "fp_reg[29]";
case gcc_dwarf_f30_mips64: return "fp_reg[30]";
case gcc_dwarf_f31_mips64: return "fp_reg[31]";
case gcc_dwarf_fcsr_mips64: return "fcsr";
case gcc_dwarf_fir_mips64: return "fir";
}

4
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux.cpp
View File

@ -136,7 +136,7 @@ NativeRegisterContextLinux::ReadFPR()
{
void* buf = GetFPRBuffer();
if (!buf)
return Error("FPR buffer is NULL");
return Error("GPR buffer is NULL");
size_t buf_size = GetFPRSize();
return DoReadFPR(buf, buf_size);
@ -147,7 +147,7 @@ NativeRegisterContextLinux::WriteFPR()
{
void* buf = GetFPRBuffer();
if (!buf)
return Error("FPR buffer is NULL");
return Error("GPR buffer is NULL");
size_t buf_size = GetFPRSize();
return DoWriteFPR(buf, buf_size);

370
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.cpp
View File

@ -25,10 +25,6 @@
#include "Plugins/Process/Linux/Procfs.h"
#include "Plugins/Process/Utility/RegisterContextLinux_mips64.h"
#include "Plugins/Process/Utility/RegisterContextLinux_mips.h"
#define NT_MIPS_MSA 0x600
#define CONFIG5_FRE (1 << 8)
#define SR_FR (1 << 26)
#define NUM_REGISTERS 32
#include <sys/ptrace.h>
#include <asm/ptrace.h>
@ -122,13 +118,12 @@ namespace
gpr_sp_mips,
gpr_r30_mips,
gpr_ra_mips,
gpr_sr_mips,
gpr_mullo_mips,
gpr_mulhi_mips,
gpr_badvaddr_mips,
gpr_cause_mips,
gpr_pc_mips,
gpr_config5_mips,
gpr_badvaddr_mips,
gpr_sr_mips,
gpr_cause_mips,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
@ -173,60 +168,12 @@ namespace
fpr_f31_mips,
fpr_fcsr_mips,
fpr_fir_mips,
fpr_config5_mips,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_fp_regnums_mips) / sizeof(g_fp_regnums_mips[0])) - 1 == k_num_fpr_registers_mips,
"g_fp_regnums_mips has wrong number of register infos");
// mips MSA registers.
const uint32_t
g_msa_regnums_mips[] =
{
msa_w0_mips,
msa_w1_mips,
msa_w2_mips,
msa_w3_mips,
msa_w4_mips,
msa_w5_mips,
msa_w6_mips,
msa_w7_mips,
msa_w8_mips,
msa_w9_mips,
msa_w10_mips,
msa_w11_mips,
msa_w12_mips,
msa_w13_mips,
msa_w14_mips,
msa_w15_mips,
msa_w16_mips,
msa_w17_mips,
msa_w18_mips,
msa_w19_mips,
msa_w20_mips,
msa_w21_mips,
msa_w22_mips,
msa_w23_mips,
msa_w24_mips,
msa_w25_mips,
msa_w26_mips,
msa_w27_mips,
msa_w28_mips,
msa_w29_mips,
msa_w30_mips,
msa_w31_mips,
msa_fcsr_mips,
msa_fir_mips,
msa_mcsr_mips,
msa_mir_mips,
msa_config5_mips,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_msa_regnums_mips) / sizeof(g_msa_regnums_mips[0])) - 1 == k_num_msa_registers_mips,
"g_msa_regnums_mips has wrong number of register infos");
// mips64 general purpose registers.
const uint32_t
g_gp_regnums_mips64[] =
@ -263,13 +210,14 @@ namespace
gpr_sp_mips64,
gpr_r30_mips64,
gpr_ra_mips64,
gpr_sr_mips64,
gpr_mullo_mips64,
gpr_mulhi_mips64,
gpr_badvaddr_mips64,
gpr_cause_mips64,
gpr_pc_mips64,
gpr_config5_mips64,
gpr_badvaddr_mips64,
gpr_sr_mips64,
gpr_cause_mips64,
gpr_ic_mips64,
gpr_dummy_mips64,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
@ -314,64 +262,16 @@ namespace
fpr_f31_mips64,
fpr_fcsr_mips64,
fpr_fir_mips64,
fpr_config5_mips64,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_fp_regnums_mips64) / sizeof(g_fp_regnums_mips64[0])) - 1 == k_num_fpr_registers_mips64,
"g_fp_regnums_mips64 has wrong number of register infos");
// mips64 MSA registers.
const uint32_t
g_msa_regnums_mips64[] =
{
msa_w0_mips64,
msa_w1_mips64,
msa_w2_mips64,
msa_w3_mips64,
msa_w4_mips64,
msa_w5_mips64,
msa_w6_mips64,
msa_w7_mips64,
msa_w8_mips64,
msa_w9_mips64,
msa_w10_mips64,
msa_w11_mips64,
msa_w12_mips64,
msa_w13_mips64,
msa_w14_mips64,
msa_w15_mips64,
msa_w16_mips64,
msa_w17_mips64,
msa_w18_mips64,
msa_w19_mips64,
msa_w20_mips64,
msa_w21_mips64,
msa_w22_mips64,
msa_w23_mips64,
msa_w24_mips64,
msa_w25_mips64,
msa_w26_mips64,
msa_w27_mips64,
msa_w28_mips64,
msa_w29_mips64,
msa_w30_mips64,
msa_w31_mips64,
msa_fcsr_mips64,
msa_fir_mips64,
msa_mcsr_mips64,
msa_mir_mips64,
msa_config5_mips64,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_msa_regnums_mips64) / sizeof(g_msa_regnums_mips64[0])) - 1 == k_num_msa_registers_mips64,
"g_msa_regnums_mips64 has wrong number of register infos");
// Number of register sets provided by this context.
enum
{
k_num_register_sets = 3
k_num_register_sets = 2
};
// Register sets for mips.
@ -379,8 +279,7 @@ namespace
g_reg_sets_mips[k_num_register_sets] =
{
{ "General Purpose Registers", "gpr", k_num_gpr_registers_mips, g_gp_regnums_mips },
{ "Floating Point Registers", "fpu", k_num_fpr_registers_mips, g_fp_regnums_mips },
{ "MSA Registers", "msa", k_num_msa_registers_mips, g_msa_regnums_mips }
{ "Floating Point Registers", "fpu", k_num_fpr_registers_mips, g_fp_regnums_mips }
};
// Register sets for mips64.
@ -388,8 +287,7 @@ namespace
g_reg_sets_mips64[k_num_register_sets] =
{
{ "General Purpose Registers", "gpr", k_num_gpr_registers_mips64, g_gp_regnums_mips64 },
{ "Floating Point Registers", "fpu", k_num_fpr_registers_mips64, g_fp_regnums_mips64 },
{ "MSA Registers", "msa", k_num_msa_registers_mips64, g_msa_regnums_mips64 },
{ "Floating Point Registers", "fpu", k_num_fpr_registers_mips64, g_fp_regnums_mips64 }
};
} // end of anonymous namespace
@ -402,7 +300,7 @@ NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(const ArchSpec&
return new NativeRegisterContextLinux_mips64(target_arch, native_thread, concrete_frame_idx);
}
#define REG_CONTEXT_SIZE (GetRegisterInfoInterface ().GetGPRSize () + sizeof(FPR_linux_mips) + sizeof(MSA_linux_mips))
#define REG_CONTEXT_SIZE (GetRegisterInfoInterface ().GetGPRSize () + sizeof(FPR_mips))
// ----------------------------------------------------------------------------
// NativeRegisterContextLinux_mips64 members.
@ -440,8 +338,6 @@ NativeRegisterContextLinux_mips64::NativeRegisterContextLinux_mips64 (const Arch
m_reg_info.last_gpr = k_last_gpr_mips;
m_reg_info.first_fpr = k_first_fpr_mips;
m_reg_info.last_fpr = k_last_fpr_mips;
m_reg_info.first_msa = k_first_msa_mips;
m_reg_info.last_msa = k_last_msa_mips;
break;
case llvm::Triple::mips64:
case llvm::Triple::mips64el:
@ -451,27 +347,18 @@ NativeRegisterContextLinux_mips64::NativeRegisterContextLinux_mips64 (const Arch
m_reg_info.last_gpr = k_last_gpr_mips64;
m_reg_info.first_fpr = k_first_fpr_mips64;
m_reg_info.last_fpr = k_last_fpr_mips64;
m_reg_info.first_msa = k_first_msa_mips64;
m_reg_info.last_msa = k_last_msa_mips64;
break;
default:
assert(false && "Unhandled target architecture.");
break;
}
// Initialize m_iovec to point to the buffer and buffer size
// using the conventions of Berkeley style UIO structures, as required
// by PTRACE extensions.
m_iovec.iov_base = &m_msa;
m_iovec.iov_len = sizeof(MSA_linux_mips);
// Clear out the FPR state.
::memset(&m_fpr, 0, sizeof(FPR_mips));
// init h/w watchpoint addr map
for (int index = 0;index <= MAX_NUM_WP; index++)
hw_addr_map[index] = LLDB_INVALID_ADDRESS;
::memset(&m_gpr, 0, sizeof(GPR_linux_mips));
::memset(&m_fpr, 0, sizeof(FPR_linux_mips));
::memset(&m_msa, 0, sizeof(MSA_linux_mips));
}
uint32_t
@ -573,38 +460,16 @@ NativeRegisterContextLinux_mips64::ReadRegister (const RegisterInfo *reg_info, R
return error;
}
if (IsMSA(reg) && !IsMSAAvailable())
if (IsFPR(reg))
{
error.SetErrorString ("MSA not available on this processor");
return error;
}
if (IsMSA(reg) || IsFPR(reg))
{
uint8_t *src;
type128 int128;
error = ReadCP1();
error = ReadFPR();
if (!error.Success())
{
error.SetErrorString ("failed to read co-processor 1 register");
error.SetErrorString ("failed to read floating point register");
return error;
}
if (IsFPR(reg))
{
assert (reg_info->byte_offset < sizeof(UserArea));
src = (uint8_t *)&m_fpr + reg_info->byte_offset - (sizeof(m_gpr));
}
else
{
assert (reg_info->byte_offset < sizeof(UserArea));
src = (uint8_t *)&m_msa + reg_info->byte_offset - (sizeof(m_gpr) + sizeof(m_fpr));
}
int128.x[0] = *(uint64_t *)src;
int128.x[1] = *(uint64_t *)(src + 8);
llvm::APInt rhs = llvm::APInt(128, 2, int128.x);
assert (reg_info->byte_offset < sizeof(FPR_mips));
uint8_t *src = (uint8_t *)&m_fpr + reg_info->byte_offset;
switch (reg_info->byte_size)
{
case 4:
@ -613,9 +478,6 @@ NativeRegisterContextLinux_mips64::ReadRegister (const RegisterInfo *reg_info, R
case 8:
reg_value.SetUInt64(*(uint64_t *)src);
break;
case 16:
reg_value.SetUInt128(rhs);
break;
default:
assert(false && "Unhandled data size.");
error.SetErrorStringWithFormat ("unhandled byte size: %" PRIu32, reg_info->byte_size);
@ -649,32 +511,10 @@ NativeRegisterContextLinux_mips64::WriteRegister (const RegisterInfo *reg_info,
if (reg_index == LLDB_INVALID_REGNUM)
return Error ("no lldb regnum for %s", reg_info && reg_info->name ? reg_info->name : "<unknown register>");
if (IsMSA(reg_index) && !IsMSAAvailable())
if (IsFPR(reg_index))
{
error.SetErrorString ("MSA not available on this processor");
return error;
}
if (IsFPR(reg_index) || IsMSA(reg_index))
{
uint8_t *dst;
const uint64_t *src;
// Initialise the FP and MSA buffers by reading all co-processor 1 registers
ReadCP1();
if (IsFPR(reg_index))
{
assert (reg_info->byte_offset < sizeof(UserArea));
dst = (uint8_t *)&m_fpr + reg_info->byte_offset - (sizeof(m_gpr));
}
else
{
assert (reg_info->byte_offset < sizeof(UserArea));
dst = (uint8_t *)&m_msa + reg_info->byte_offset - (sizeof(m_gpr) + sizeof(m_fpr));
}
llvm::APInt lhs;
llvm::APInt fail_value = llvm::APInt::getMaxValue(128);
assert (reg_info->byte_offset < sizeof(FPR_mips));
uint8_t *dst = (uint8_t *)&m_fpr + reg_info->byte_offset;
switch (reg_info->byte_size)
{
case 4:
@ -683,21 +523,15 @@ NativeRegisterContextLinux_mips64::WriteRegister (const RegisterInfo *reg_info,
case 8:
*(uint64_t *)dst = reg_value.GetAsUInt64();
break;
case 16:
lhs = reg_value.GetAsUInt128(fail_value);
src = lhs.getRawData();
*(uint64_t *)dst = *src;
*(uint64_t *)(dst + 8) = *(src + 1);
break;
default:
assert(false && "Unhandled data size.");
error.SetErrorStringWithFormat ("unhandled byte size: %" PRIu32, reg_info->byte_size);
break;
}
error = WriteCP1();
error = WriteFPR();
if (!error.Success())
{
error.SetErrorString ("failed to write co-processor 1 register");
error.SetErrorString ("failed to write floating point register");
return error;
}
}
@ -728,10 +562,10 @@ NativeRegisterContextLinux_mips64::ReadAllRegisterValues (lldb::DataBufferSP &da
return error;
}
error = ReadCP1();
error = ReadFPR();
if (!error.Success())
{
error.SetErrorString ("ReadCP1() failed");
error.SetErrorString ("ReadFPR() failed");
return error;
}
@ -742,13 +576,10 @@ NativeRegisterContextLinux_mips64::ReadAllRegisterValues (lldb::DataBufferSP &da
return error;
}
::memcpy (dst, &m_gpr, GetRegisterInfoInterface ().GetGPRSize ());
::memcpy (dst, &m_gpr_mips64, GetRegisterInfoInterface ().GetGPRSize ());
dst += GetRegisterInfoInterface ().GetGPRSize ();
::memcpy (dst, &m_fpr, GetFPRSize ());
dst += GetFPRSize ();
::memcpy (dst, &m_msa, sizeof(MSA_linux_mips));
::memcpy (dst, &m_fpr, sizeof(FPR_mips));
return error;
}
@ -777,14 +608,10 @@ NativeRegisterContextLinux_mips64::WriteAllRegisterValues (const lldb::DataBuffe
error.SetErrorStringWithFormat ("NativeRegisterContextLinux_mips64::%s DataBuffer::GetBytes() returned a null pointer", __FUNCTION__);
return error;
}
::memcpy (&m_gpr, src, GetRegisterInfoInterface ().GetGPRSize ());
::memcpy (&m_gpr_mips64, src, GetRegisterInfoInterface ().GetGPRSize ());
src += GetRegisterInfoInterface ().GetGPRSize ();
::memcpy (&m_fpr, src, GetFPRSize ());
src += GetFPRSize ();
::memcpy (&m_msa, src, sizeof(MSA_linux_mips));
::memcpy (&m_fpr, src, sizeof(FPR_mips));
error = WriteGPR();
if (!error.Success())
@ -793,10 +620,10 @@ NativeRegisterContextLinux_mips64::WriteAllRegisterValues (const lldb::DataBuffe
return error;
}
error = WriteCP1();
error = WriteFPR();
if (!error.Success())
{
error.SetErrorStringWithFormat ("NativeRegisterContextLinux_mips64::%s WriteCP1() failed", __FUNCTION__);
error.SetErrorStringWithFormat ("NativeRegisterContextLinux_mips64::%s WriteFPR() failed", __FUNCTION__);
return error;
}
@ -804,47 +631,22 @@ NativeRegisterContextLinux_mips64::WriteAllRegisterValues (const lldb::DataBuffe
}
Error
NativeRegisterContextLinux_mips64::ReadCP1()
NativeRegisterContextLinux_mips64::ReadFPR()
{
Error error;
void* buf = GetFPRBuffer();
if (!buf)
return Error("FPR buffer is NULL");
uint8_t *src, *dst;
Error error = NativeRegisterContextLinux::ReadFPR();
lldb::ByteOrder byte_order = GetByteOrder();
uint32_t IsBigEndian = (byte_order == lldb::eByteOrderBig);
if (IsMSAAvailable())
if (IsFR0())
{
error = NativeRegisterContextLinux::ReadRegisterSet(&m_iovec, sizeof(MSA_linux_mips), NT_MIPS_MSA);
src = (uint8_t *)&m_msa + (IsBigEndian * 8);
dst = (uint8_t *)&m_fpr;
for ( int i = 0; i < NUM_REGISTERS; i++)
{
// Copy fp values from msa buffer fetched via ptrace
*(uint64_t *) dst = *(uint64_t *) src;
src = src + 16;
dst = dst + 8;
}
m_fpr.fir = m_msa.fir;
m_fpr.fcsr = m_msa.fcsr;
m_fpr.config5 = m_msa.config5;
}
else
{
error = NativeRegisterContextLinux::ReadFPR();
}
if (IsFR0() || IsFRE())
{
src = (uint8_t *)&m_fpr + 4 + (IsBigEndian * 4);
dst = (uint8_t *)&m_fpr + 8 + (IsBigEndian * 4);
for (int i = 0; i < (NUM_REGISTERS / 2); i++)
for (int i = 0; i < 16; i++)
{
// copy odd single from top of neighbouring even double
uint8_t * src = (uint8_t *)buf + 4 + (i * 16);
uint8_t * dst = (uint8_t *)buf + 8 + (i * 16);
*(uint32_t *) dst = *(uint32_t *) src;
src = src + 16;
dst = dst + 16;
}
}
@ -852,77 +654,37 @@ NativeRegisterContextLinux_mips64::ReadCP1()
}
Error
NativeRegisterContextLinux_mips64::WriteCP1()
NativeRegisterContextLinux_mips64::WriteFPR()
{
Error error;
void* buf = GetFPRBuffer();
if (!buf)
return Error("FPR buffer is NULL");
uint8_t *src, *dst;
lldb::ByteOrder byte_order = GetByteOrder();
uint32_t IsBigEndian = (byte_order == lldb::eByteOrderBig);
if (IsFR0() || IsFRE())
if (IsFR0())
{
src = (uint8_t *)&m_fpr + 8 + (IsBigEndian * 4);
dst = (uint8_t *)&m_fpr + 4 + (IsBigEndian * 4);
for (int i = 0; i < (NUM_REGISTERS / 2); i++)
{
for (int i = 0; i < 16; i++)
{
// copy odd single to top of neighbouring even double
uint8_t * src = (uint8_t *)buf + 8 + (i * 16);
uint8_t * dst = (uint8_t *)buf + 4 + (i * 16);
*(uint32_t *) dst = *(uint32_t *) src;
src = src + 16;
dst = dst + 16;
}
}
}
if (IsMSAAvailable())
{
dst = (uint8_t *)&m_msa + (IsBigEndian * 8);
src = (uint8_t *)&m_fpr;
for (int i = 0; i < NUM_REGISTERS; i++)
{
// Copy fp values to msa buffer for ptrace
*(uint64_t *) dst = *(uint64_t *) src;
dst = dst + 16;
src = src + 8;
}
m_msa.fir = m_fpr.fir;
m_msa.fcsr = m_fpr.fcsr;
m_msa.config5 = m_fpr.config5;
error = NativeRegisterContextLinux::WriteRegisterSet(&m_iovec, sizeof(MSA_linux_mips), NT_MIPS_MSA);
}
else
{
error = NativeRegisterContextLinux::WriteFPR();
}
return error;
return NativeRegisterContextLinux::WriteFPR();
}
bool
NativeRegisterContextLinux_mips64::IsFR0()
{
const RegisterInfo *const reg_info_p = GetRegisterInfoAtIndex (gpr_sr_mips64);
const RegisterInfo *const reg_info_p = GetRegisterInfoAtIndex (36); // Status Register is at index 36 of the register array
RegisterValue reg_value;
ReadRegister (reg_info_p, reg_value);
uint64_t value = reg_value.GetAsUInt64();
return (!(value & SR_FR));
}
bool
NativeRegisterContextLinux_mips64::IsFRE()
{
const RegisterInfo *const reg_info_p = GetRegisterInfoAtIndex (gpr_config5_mips64);
RegisterValue reg_value;
ReadRegister (reg_info_p, reg_value);
uint64_t config5 = reg_value.GetAsUInt64();
return (config5 & CONFIG5_FRE);
return (!(value & 0x4000000));
}
bool
@ -1107,25 +869,6 @@ GetVacantWatchIndex (struct pt_watch_regs *regs, lldb::addr_t addr, uint32_t siz
return 0;
}
bool
NativeRegisterContextLinux_mips64::IsMSA(uint32_t reg_index) const
{
return (m_reg_info.first_msa <= reg_index && reg_index <= m_reg_info.last_msa);
}
bool
NativeRegisterContextLinux_mips64::IsMSAAvailable()
{
Error error = NativeRegisterContextLinux::ReadRegisterSet(&m_msa, sizeof(MSA_linux_mips), NT_MIPS_MSA);
if (error.Success() && m_msa.mir)
{
return true;
}
return false;
}
Error
NativeRegisterContextLinux_mips64::IsWatchpointHit (uint32_t wp_index, bool &is_hit)
{
@ -1285,14 +1028,13 @@ NativeRegisterContextLinux_mips64::DoReadRegisterValue(uint32_t offset,
uint32_t size,
RegisterValue &value)
{
GPR_linux_mips regs;
::memset(&regs, 0, sizeof(GPR_linux_mips));
elf_gregset_t regs;
Error error = NativeProcessLinux::PtraceWrapper(PTRACE_GETREGS, m_thread.GetID(), NULL, &regs, sizeof regs);
if (error.Success())
{
lldb_private::ArchSpec arch;
if (m_thread.GetProcess()->GetArchitecture(arch))
value.SetBytes((void *)(((unsigned char *)(&regs)) + offset), 8, arch.GetByteOrder());
value.SetBytes((void *)(((unsigned char *)(regs)) + offset), 8, arch.GetByteOrder());
else
error.SetErrorString("failed to get architecture");
}

31
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_mips64.h
View File

@ -13,8 +13,8 @@
#define lldb_NativeRegisterContextLinux_mips64_h
#include "Plugins/Process/Linux/NativeRegisterContextLinux.h"
#include "Plugins/Process/Utility/RegisterContext_mips.h"
#include "Plugins/Process/Utility/lldb-mips-linux-register-enums.h"
#include "Plugins/Process/Utility/RegisterContext_mips64.h"
#include "Plugins/Process/Utility/lldb-mips64-register-enums.h"
#define MAX_NUM_WP 8
@ -52,10 +52,10 @@ namespace process_linux {
WriteAllRegisterValues (const lldb::DataBufferSP &data_sp) override;
Error
ReadCP1();
ReadFPR() override;
Error
WriteCP1();
WriteFPR() override;
Error
IsWatchpointHit (uint32_t wp_index, bool &is_hit) override;
@ -107,26 +107,17 @@ namespace process_linux {
bool
IsFR0();
bool
IsFRE();
bool
IsFPR(uint32_t reg_index) const;
bool
IsMSA(uint32_t reg_index) const;
bool
IsMSAAvailable();
void*
GetGPRBuffer() override { return &m_gpr; }
GetGPRBuffer() override { return &m_gpr_mips64; }
void*
GetFPRBuffer() override { return &m_fpr; }
size_t
GetFPRSize() override { return sizeof(FPR_linux_mips); }
GetFPRSize() override { return sizeof(FPR_mips); }
private:
// Info about register ranges.
@ -139,21 +130,15 @@ namespace process_linux {
uint32_t last_gpr;
uint32_t first_fpr;
uint32_t last_fpr;
uint32_t first_msa;
uint32_t last_msa;
};
RegInfo m_reg_info;
GPR_linux_mips m_gpr;
uint64_t m_gpr_mips64[k_num_gpr_registers_mips64];
FPR_linux_mips m_fpr;
MSA_linux_mips m_msa;
FPR_mips m_fpr;
lldb::addr_t hw_addr_map[MAX_NUM_WP];
IOVEC_mips m_iovec;
};
} // namespace process_linux

4
lldb/source/Plugins/Process/Utility/RegisterContextFreeBSD_mips64.cpp
View File

@ -57,7 +57,7 @@ typedef struct _GPR
uint64_t pc;
uint64_t ic;
uint64_t dummy;
} GPR_freebsd_mips;
} GPR;
//---------------------------------------------------------------------------
// Include RegisterInfos_mips64 to declare our g_register_infos_mips64 structure.
@ -74,7 +74,7 @@ RegisterContextFreeBSD_mips64::RegisterContextFreeBSD_mips64(const ArchSpec &tar
size_t
RegisterContextFreeBSD_mips64::GetGPRSize() const
{
return sizeof(GPR_freebsd_mips);
return sizeof(GPR);
}
const RegisterInfo *

58
lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.cpp
View File

@ -10,17 +10,59 @@
#include <vector>
#include <stddef.h>
// For GDB, GCC and DWARF Register numbers
#include "RegisterContextLinux_mips.h"
// Internal codes for mips registers
#include "lldb-mips-linux-register-enums.h"
// For GP and FP buffers
#include "RegisterContext_mips.h"
#include "lldb-mips64-register-enums.h"
#include "RegisterContext_mips64.h"
using namespace lldb_private;
using namespace lldb;
// GP registers
typedef struct _GPR
{
uint32_t zero;
uint32_t r1;
uint32_t r2;
uint32_t r3;
uint32_t r4;
uint32_t r5;
uint32_t r6;
uint32_t r7;
uint32_t r8;
uint32_t r9;
uint32_t r10;
uint32_t r11;
uint32_t r12;
uint32_t r13;
uint32_t r14;
uint32_t r15;
uint32_t r16;
uint32_t r17;
uint32_t r18;
uint32_t r19;
uint32_t r20;
uint32_t r21;
uint32_t r22;
uint32_t r23;
uint32_t r24;
uint32_t r25;
uint32_t r26;
uint32_t r27;
uint32_t gp;
uint32_t sp;
uint32_t r30;
uint32_t ra;
uint32_t mullo;
uint32_t mulhi;
uint32_t pc;
uint32_t badvaddr;
uint32_t sr;
uint32_t cause;
} GPR;
//---------------------------------------------------------------------------
// Include RegisterInfos_mips to declare our g_register_infos_mips structure.
//---------------------------------------------------------------------------
@ -36,7 +78,7 @@ RegisterContextLinux_mips::RegisterContextLinux_mips(const ArchSpec &target_arch
size_t
RegisterContextLinux_mips::GetGPRSize() const
{
return sizeof(GPR_linux_mips);
return sizeof(GPR);
}
const RegisterInfo *
@ -58,9 +100,3 @@ RegisterContextLinux_mips::GetRegisterCount () const
{
return static_cast<uint32_t> (sizeof (g_register_infos_mips) / sizeof (g_register_infos_mips [0]));
}
uint32_t
RegisterContextLinux_mips::GetUserRegisterCount () const
{
return static_cast<uint32_t> (k_num_user_registers_mips);
}

3
lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips.h
View File

@ -27,9 +27,6 @@ public:
uint32_t
GetRegisterCount () const override;
uint32_t
GetUserRegisterCount () const override;
};
#endif

84
lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.cpp
View File

@ -12,24 +12,66 @@
#include <vector>
#include <stddef.h>
// For GDB, GCC and DWARF Register numbers
#include "RegisterContextLinux_mips64.h"
// For GP and FP buffers
#include "RegisterContext_mips.h"
// Internal codes for all mips32 and mips64 registers
#include "lldb-mips-linux-register-enums.h"
// Internal codes for all mips64 registers
#include "lldb-mips64-register-enums.h"
#include "RegisterContext_mips64.h"
using namespace lldb;
using namespace lldb_private;
// GP registers
typedef struct _GPR
{
uint64_t zero;
uint64_t r1;
uint64_t r2;
uint64_t r3;
uint64_t r4;
uint64_t r5;
uint64_t r6;
uint64_t r7;
uint64_t r8;
uint64_t r9;
uint64_t r10;
uint64_t r11;
uint64_t r12;
uint64_t r13;
uint64_t r14;
uint64_t r15;
uint64_t r16;
uint64_t r17;
uint64_t r18;
uint64_t r19;
uint64_t r20;
uint64_t r21;
uint64_t r22;
uint64_t r23;
uint64_t r24;
uint64_t r25;
uint64_t r26;
uint64_t r27;
uint64_t gp;
uint64_t sp;
uint64_t r30;
uint64_t ra;
uint64_t mullo;
uint64_t mulhi;
uint64_t pc;
uint64_t badvaddr;
uint64_t sr;
uint64_t cause;
uint64_t ic;
uint64_t dummy;
} GPR;
//---------------------------------------------------------------------------
// Include RegisterInfos_mips64 to declare our g_register_infos_mips64 structure.
//---------------------------------------------------------------------------
#define DECLARE_REGISTER_INFOS_MIPS64_STRUCT
#define LINUX_MIPS64
#include "RegisterInfos_mips64.h"
#undef LINUX_MIPS64
#undef DECLARE_REGISTER_INFOS_MIPS64_STRUCT
//---------------------------------------------------------------------------
@ -73,35 +115,17 @@ GetRegisterInfoCount (const ArchSpec &target_arch)
}
}
uint32_t
GetUserRegisterInfoCount (const ArchSpec &target_arch)
{
switch (target_arch.GetMachine())
{
case llvm::Triple::mips:
case llvm::Triple::mipsel:
return static_cast<uint32_t> (k_num_user_registers_mips);
case llvm::Triple::mips64el:
case llvm::Triple::mips64:
return static_cast<uint32_t> (k_num_user_registers_mips64);
default:
assert(false && "Unhandled target architecture.");
return 0;
}
}
RegisterContextLinux_mips64::RegisterContextLinux_mips64(const ArchSpec &target_arch) :
lldb_private::RegisterInfoInterface(target_arch),
m_register_info_p (GetRegisterInfoPtr (target_arch)),
m_register_info_count (GetRegisterInfoCount (target_arch)),
m_user_register_count (GetUserRegisterInfoCount (target_arch))
m_register_info_count (GetRegisterInfoCount (target_arch))
{
}
size_t
RegisterContextLinux_mips64::GetGPRSize() const
{
return sizeof(GPR_linux_mips);
return sizeof(GPR);
}
const RegisterInfo *
@ -116,10 +140,4 @@ RegisterContextLinux_mips64::GetRegisterCount () const
return m_register_info_count;
}
uint32_t
RegisterContextLinux_mips64::GetUserRegisterCount () const
{
return m_user_register_count;
}
#endif

4
lldb/source/Plugins/Process/Utility/RegisterContextLinux_mips64.h
View File

@ -30,13 +30,9 @@ public:
uint32_t
GetRegisterCount () const override;
uint32_t
GetUserRegisterCount () const override;
private:
const lldb_private::RegisterInfo *m_register_info_p;
uint32_t m_register_info_count;
uint32_t m_user_register_count;
};
#endif

4
lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_mips64.h
View File

@ -12,8 +12,8 @@
#include "lldb/Core/Log.h"
#include "RegisterContextPOSIX.h"
#include "RegisterContext_mips.h"
#include "lldb-mips-freebsd-register-enums.h"
#include "RegisterContext_mips64.h"
#include "lldb-mips64-register-enums.h"
using namespace lldb_private;

306
lldb/source/Plugins/Process/Utility/RegisterContext_mips.h → lldb/source/Plugins/Process/Utility/RegisterContext_mips64.h
View File

@ -1,4 +1,4 @@
//===-- RegisterContext_mips.h --------------------------------*- C++ -*-===//
//===-- RegisterContext_mips64.h --------------------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
@ -10,10 +10,6 @@
#ifndef liblldb_RegisterContext_mips64_H_
#define liblldb_RegisterContext_mips64_H_
#if defined(__mips64)
#define ENABLE_128_BIT_SUPPORT 1
#endif
// GCC and DWARF Register numbers (eRegisterKindGCC & eRegisterKindDWARF)
enum
{
@ -50,12 +46,12 @@ enum
gcc_dwarf_sp_mips,
gcc_dwarf_r30_mips,
gcc_dwarf_ra_mips,
gcc_dwarf_sr_mips,
gcc_dwarf_lo_mips,
gcc_dwarf_hi_mips,
gcc_dwarf_bad_mips,
gcc_dwarf_cause_mips,
gcc_dwarf_pc_mips,
gcc_dwarf_bad_mips,
gcc_dwarf_sr_mips,
gcc_dwarf_cause_mips,
gcc_dwarf_f0_mips,
gcc_dwarf_f1_mips,
gcc_dwarf_f2_mips,
@ -90,41 +86,6 @@ enum
gcc_dwarf_f31_mips,
gcc_dwarf_fcsr_mips,
gcc_dwarf_fir_mips,
gcc_dwarf_w0_mips,
gcc_dwarf_w1_mips,
gcc_dwarf_w2_mips,
gcc_dwarf_w3_mips,
gcc_dwarf_w4_mips,
gcc_dwarf_w5_mips,
gcc_dwarf_w6_mips,
gcc_dwarf_w7_mips,
gcc_dwarf_w8_mips,
gcc_dwarf_w9_mips,
gcc_dwarf_w10_mips,
gcc_dwarf_w11_mips,
gcc_dwarf_w12_mips,
gcc_dwarf_w13_mips,
gcc_dwarf_w14_mips,
gcc_dwarf_w15_mips,
gcc_dwarf_w16_mips,
gcc_dwarf_w17_mips,
gcc_dwarf_w18_mips,
gcc_dwarf_w19_mips,
gcc_dwarf_w20_mips,
gcc_dwarf_w21_mips,
gcc_dwarf_w22_mips,
gcc_dwarf_w23_mips,
gcc_dwarf_w24_mips,
gcc_dwarf_w25_mips,
gcc_dwarf_w26_mips,
gcc_dwarf_w27_mips,
gcc_dwarf_w28_mips,
gcc_dwarf_w29_mips,
gcc_dwarf_w30_mips,
gcc_dwarf_w31_mips,
gcc_dwarf_mcsr_mips,
gcc_dwarf_mir_mips,
gcc_dwarf_config5_mips,
gcc_dwarf_ic_mips,
gcc_dwarf_dummy_mips
};
@ -204,42 +165,7 @@ enum
gcc_dwarf_fcsr_mips64,
gcc_dwarf_fir_mips64,
gcc_dwarf_ic_mips64,
gcc_dwarf_dummy_mips64,
gcc_dwarf_w0_mips64,
gcc_dwarf_w1_mips64,
gcc_dwarf_w2_mips64,
gcc_dwarf_w3_mips64,
gcc_dwarf_w4_mips64,
gcc_dwarf_w5_mips64,
gcc_dwarf_w6_mips64,
gcc_dwarf_w7_mips64,
gcc_dwarf_w8_mips64,
gcc_dwarf_w9_mips64,
gcc_dwarf_w10_mips64,
gcc_dwarf_w11_mips64,
gcc_dwarf_w12_mips64,
gcc_dwarf_w13_mips64,
gcc_dwarf_w14_mips64,
gcc_dwarf_w15_mips64,
gcc_dwarf_w16_mips64,
gcc_dwarf_w17_mips64,
gcc_dwarf_w18_mips64,
gcc_dwarf_w19_mips64,
gcc_dwarf_w20_mips64,
gcc_dwarf_w21_mips64,
gcc_dwarf_w22_mips64,
gcc_dwarf_w23_mips64,
gcc_dwarf_w24_mips64,
gcc_dwarf_w25_mips64,
gcc_dwarf_w26_mips64,
gcc_dwarf_w27_mips64,
gcc_dwarf_w28_mips64,
gcc_dwarf_w29_mips64,
gcc_dwarf_w30_mips64,
gcc_dwarf_w31_mips64,
gcc_dwarf_mcsr_mips64,
gcc_dwarf_mir_mips64,
gcc_dwarf_config5_mips64,
gcc_dwarf_dummy_mips64
};
// GDB Register numbers (eRegisterKindGDB)
@ -277,12 +203,12 @@ enum
gdb_sp_mips,
gdb_r30_mips,
gdb_ra_mips,
gdb_sr_mips,
gdb_lo_mips,
gdb_hi_mips,
gdb_bad_mips,
gdb_cause_mips,
gdb_pc_mips,
gdb_bad_mips,
gdb_sr_mips,
gdb_cause_mips,
gdb_f0_mips,
gdb_f1_mips,
gdb_f2_mips,
@ -317,41 +243,6 @@ enum
gdb_f31_mips,
gdb_fcsr_mips,
gdb_fir_mips,
gdb_w0_mips,
gdb_w1_mips,
gdb_w2_mips,
gdb_w3_mips,
gdb_w4_mips,
gdb_w5_mips,
gdb_w6_mips,
gdb_w7_mips,
gdb_w8_mips,
gdb_w9_mips,
gdb_w10_mips,
gdb_w11_mips,
gdb_w12_mips,
gdb_w13_mips,
gdb_w14_mips,
gdb_w15_mips,
gdb_w16_mips,
gdb_w17_mips,
gdb_w18_mips,
gdb_w19_mips,
gdb_w20_mips,
gdb_w21_mips,
gdb_w22_mips,
gdb_w23_mips,
gdb_w24_mips,
gdb_w25_mips,
gdb_w26_mips,
gdb_w27_mips,
gdb_w28_mips,
gdb_w29_mips,
gdb_w30_mips,
gdb_w31_mips,
gdb_mcsr_mips,
gdb_mir_mips,
gdb_config5_mips,
gdb_ic_mips,
gdb_dummy_mips
};
@ -431,184 +322,15 @@ enum
gdb_fcsr_mips64,
gdb_fir_mips64,
gdb_ic_mips64,
gdb_dummy_mips64,
gdb_w0_mips64,
gdb_w1_mips64,
gdb_w2_mips64,
gdb_w3_mips64,
gdb_w4_mips64,
gdb_w5_mips64,
gdb_w6_mips64,
gdb_w7_mips64,
gdb_w8_mips64,
gdb_w9_mips64,
gdb_w10_mips64,
gdb_w11_mips64,
gdb_w12_mips64,
gdb_w13_mips64,
gdb_w14_mips64,
gdb_w15_mips64,
gdb_w16_mips64,
gdb_w17_mips64,
gdb_w18_mips64,
gdb_w19_mips64,
gdb_w20_mips64,
gdb_w21_mips64,
gdb_w22_mips64,
gdb_w23_mips64,
gdb_w24_mips64,
gdb_w25_mips64,
gdb_w26_mips64,
gdb_w27_mips64,
gdb_w28_mips64,
gdb_w29_mips64,
gdb_w30_mips64,
gdb_w31_mips64,
gdb_mcsr_mips64,
gdb_mir_mips64,
gdb_config5_mips64,
gdb_dummy_mips64
};
struct IOVEC_mips
// FP registers
struct FPR_mips
{
void *iov_base;
size_t iov_len;
};
// GP registers
struct GPR_linux_mips
{
uint64_t zero;
uint64_t r1;
uint64_t r2;
uint64_t r3;
uint64_t r4;
uint64_t r5;
uint64_t r6;
uint64_t r7;
uint64_t r8;
uint64_t r9;
uint64_t r10;
uint64_t r11;
uint64_t r12;
uint64_t r13;
uint64_t r14;
uint64_t r15;
uint64_t r16;
uint64_t r17;
uint64_t r18;
uint64_t r19;
uint64_t r20;
uint64_t r21;
uint64_t r22;
uint64_t r23;
uint64_t r24;
uint64_t r25;
uint64_t r26;
uint64_t r27;
uint64_t gp;
uint64_t sp;
uint64_t r30;
uint64_t ra;
uint64_t mullo;
uint64_t mulhi;
uint64_t pc;
uint64_t badvaddr;
uint64_t sr;
uint64_t cause;
uint64_t config5;
};
struct FPR_linux_mips
{
uint64_t f0;
uint64_t f1;
uint64_t f2;
uint64_t f3;
uint64_t f4;
uint64_t f5;
uint64_t f6;
uint64_t f7;
uint64_t f8;
uint64_t f9;
uint64_t f10;
uint64_t f11;
uint64_t f12;
uint64_t f13;
uint64_t f14;
uint64_t f15;
uint64_t f16;
uint64_t f17;
uint64_t f18;
uint64_t f19;
uint64_t f20;
uint64_t f21;
uint64_t f22;
uint64_t f23;
uint64_t f24;
uint64_t f25;
uint64_t f26;
uint64_t f27;
uint64_t f28;
uint64_t f29;
uint64_t f30;
uint64_t f31;
uint32_t fcsr;
uint32_t fir;
uint32_t config5;
};
struct MSAReg
{
uint8_t byte[16];
};
struct MSA_linux_mips
{
MSAReg w0;
MSAReg w1;
MSAReg w2;
MSAReg w3;
MSAReg w4;
MSAReg w5;
MSAReg w6;
MSAReg w7;
MSAReg w8;
MSAReg w9;
MSAReg w10;
MSAReg w11;
MSAReg w12;
MSAReg w13;
MSAReg w14;
MSAReg w15;
MSAReg w16;
MSAReg w17;
MSAReg w18;
MSAReg w19;
MSAReg w20;
MSAReg w21;
MSAReg w22;
MSAReg w23;
MSAReg w24;
MSAReg w25;
MSAReg w26;
MSAReg w27;
MSAReg w28;
MSAReg w29;
MSAReg w30;
MSAReg w31;
uint32_t fcsr; /* FPU control status register */
uint32_t fir; /* FPU implementaion revision */
uint32_t mcsr; /* MSA control status register */
uint32_t mir; /* MSA implementation revision */
uint32_t config5; /* Config5 register */
};
struct UserArea
{
GPR_linux_mips gpr; // General purpose registers.
FPR_linux_mips fpr; // Floating point registers.
MSA_linux_mips msa; // MSA registers.
uint64_t fp_reg[32];
uint32_t fcsr; /* FPU status register */
uint32_t fir; /* FPU control register */
};
#endif // liblldb_RegisterContext_mips64_H_

143
lldb/source/Plugins/Process/Utility/RegisterInfos_mips.h
View File

@ -14,35 +14,24 @@
// Computes the offset of the given GPR in the user data area.
#define GPR_OFFSET(regname) \
(LLVM_EXTENSION offsetof(UserArea, gpr) + \
LLVM_EXTENSION offsetof(GPR_linux_mips, regname))
(LLVM_EXTENSION offsetof(GPR, regname))
// Computes the offset of the given FPR in the extended data area.
#define FPR_OFFSET(regname) \
(LLVM_EXTENSION offsetof(UserArea, fpr) + \
LLVM_EXTENSION offsetof(FPR_linux_mips, regname))
// Computes the offset of the given MSA in the extended data area.
#define MSA_OFFSET(regname) \
(LLVM_EXTENSION offsetof(UserArea, msa) + \
LLVM_EXTENSION offsetof(MSA_linux_mips, regname))
(LLVM_EXTENSION offsetof(FPR_mips, regname))
// Note that the size and offset will be updated by platform-specific classes.
#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((GPR_linux_mips*)NULL)->reg) / 2, GPR_OFFSET(reg), eEncodingUint, \
{ #reg, alt, sizeof(((GPR*)NULL)->reg), GPR_OFFSET(reg), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips }, NULL, NULL }
#define DEFINE_FPR(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((FPR_linux_mips*)NULL)->reg), FPR_OFFSET(reg), eEncodingUint, \
#define DEFINE_FPR(member, reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((FPR_mips*)NULL)->member) / 2, FPR_OFFSET(member), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL }
#define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingVector, \
eFormatVectorOfUInt8, { kind1, kind2, kind3, kind4, msa_##reg##_mips }, NULL, NULL }
#define DEFINE_MSA_INFO(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, msa_##reg##_mips }, NULL, NULL }
#define DEFINE_FPR_INFO(member, reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((FPR_mips*)NULL)->member), FPR_OFFSET(member), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips }, NULL, NULL }
// RegisterKind: GCC, DWARF, Generic, GDB, LLDB
@ -81,95 +70,53 @@ g_register_infos_mips[] =
DEFINE_GPR (sp, "sp", gcc_dwarf_sp_mips, gcc_dwarf_sp_mips, LLDB_REGNUM_GENERIC_SP, gdb_sp_mips),
DEFINE_GPR (r30, "fp", gcc_dwarf_r30_mips, gcc_dwarf_r30_mips, LLDB_REGNUM_GENERIC_FP, gdb_r30_mips),
DEFINE_GPR (ra, "ra", gcc_dwarf_ra_mips, gcc_dwarf_ra_mips, LLDB_REGNUM_GENERIC_RA, gdb_ra_mips),
DEFINE_GPR (sr, "status", gcc_dwarf_sr_mips, gcc_dwarf_sr_mips, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
DEFINE_GPR (mullo, NULL, gcc_dwarf_lo_mips, gcc_dwarf_lo_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (mulhi, NULL, gcc_dwarf_hi_mips, gcc_dwarf_hi_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (badvaddr, NULL, gcc_dwarf_bad_mips, gcc_dwarf_bad_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (cause, NULL, gcc_dwarf_cause_mips, gcc_dwarf_cause_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (pc, NULL, gcc_dwarf_pc_mips, gcc_dwarf_pc_mips, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
DEFINE_GPR (config5, NULL, gcc_dwarf_config5_mips, gcc_dwarf_config5_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f0, NULL, gcc_dwarf_f0_mips, gcc_dwarf_f0_mips, LLDB_INVALID_REGNUM, gdb_f0_mips),
DEFINE_FPR (f1, NULL, gcc_dwarf_f1_mips, gcc_dwarf_f1_mips, LLDB_INVALID_REGNUM, gdb_f1_mips),
DEFINE_FPR (f2, NULL, gcc_dwarf_f2_mips, gcc_dwarf_f2_mips, LLDB_INVALID_REGNUM, gdb_f2_mips),
DEFINE_FPR (f3, NULL, gcc_dwarf_f3_mips, gcc_dwarf_f3_mips, LLDB_INVALID_REGNUM, gdb_f3_mips),
DEFINE_FPR (f4, NULL, gcc_dwarf_f4_mips, gcc_dwarf_f4_mips, LLDB_INVALID_REGNUM, gdb_f4_mips),
DEFINE_FPR (f5, NULL, gcc_dwarf_f5_mips, gcc_dwarf_f5_mips, LLDB_INVALID_REGNUM, gdb_f5_mips),
DEFINE_FPR (f6, NULL, gcc_dwarf_f6_mips, gcc_dwarf_f6_mips, LLDB_INVALID_REGNUM, gdb_f6_mips),
DEFINE_FPR (f7, NULL, gcc_dwarf_f7_mips, gcc_dwarf_f7_mips, LLDB_INVALID_REGNUM, gdb_f7_mips),
DEFINE_FPR (f8, NULL, gcc_dwarf_f8_mips, gcc_dwarf_f8_mips, LLDB_INVALID_REGNUM, gdb_f8_mips),
DEFINE_FPR (f9, NULL, gcc_dwarf_f9_mips, gcc_dwarf_f9_mips, LLDB_INVALID_REGNUM, gdb_f9_mips),
DEFINE_FPR (f10, NULL, gcc_dwarf_f10_mips, gcc_dwarf_f10_mips, LLDB_INVALID_REGNUM, gdb_f10_mips),
DEFINE_FPR (f11, NULL, gcc_dwarf_f11_mips, gcc_dwarf_f11_mips, LLDB_INVALID_REGNUM, gdb_f11_mips),
DEFINE_FPR (f12, NULL, gcc_dwarf_f12_mips, gcc_dwarf_f12_mips, LLDB_INVALID_REGNUM, gdb_f12_mips),
DEFINE_FPR (f13, NULL, gcc_dwarf_f13_mips, gcc_dwarf_f13_mips, LLDB_INVALID_REGNUM, gdb_f13_mips),
DEFINE_FPR (f14, NULL, gcc_dwarf_f14_mips, gcc_dwarf_f14_mips, LLDB_INVALID_REGNUM, gdb_f14_mips),
DEFINE_FPR (f15, NULL, gcc_dwarf_f15_mips, gcc_dwarf_f15_mips, LLDB_INVALID_REGNUM, gdb_f15_mips),
DEFINE_FPR (f16, NULL, gcc_dwarf_f16_mips, gcc_dwarf_f16_mips, LLDB_INVALID_REGNUM, gdb_f16_mips),
DEFINE_FPR (f17, NULL, gcc_dwarf_f17_mips, gcc_dwarf_f17_mips, LLDB_INVALID_REGNUM, gdb_f17_mips),
DEFINE_FPR (f18, NULL, gcc_dwarf_f18_mips, gcc_dwarf_f18_mips, LLDB_INVALID_REGNUM, gdb_f18_mips),
DEFINE_FPR (f19, NULL, gcc_dwarf_f19_mips, gcc_dwarf_f19_mips, LLDB_INVALID_REGNUM, gdb_f19_mips),
DEFINE_FPR (f20, NULL, gcc_dwarf_f20_mips, gcc_dwarf_f20_mips, LLDB_INVALID_REGNUM, gdb_f20_mips),
DEFINE_FPR (f21, NULL, gcc_dwarf_f21_mips, gcc_dwarf_f21_mips, LLDB_INVALID_REGNUM, gdb_f21_mips),
DEFINE_FPR (f22, NULL, gcc_dwarf_f22_mips, gcc_dwarf_f22_mips, LLDB_INVALID_REGNUM, gdb_f22_mips),
DEFINE_FPR (f23, NULL, gcc_dwarf_f23_mips, gcc_dwarf_f23_mips, LLDB_INVALID_REGNUM, gdb_f23_mips),
DEFINE_FPR (f24, NULL, gcc_dwarf_f24_mips, gcc_dwarf_f24_mips, LLDB_INVALID_REGNUM, gdb_f24_mips),
DEFINE_FPR (f25, NULL, gcc_dwarf_f25_mips, gcc_dwarf_f25_mips, LLDB_INVALID_REGNUM, gdb_f25_mips),
DEFINE_FPR (f26, NULL, gcc_dwarf_f26_mips, gcc_dwarf_f26_mips, LLDB_INVALID_REGNUM, gdb_f26_mips),
DEFINE_FPR (f27, NULL, gcc_dwarf_f27_mips, gcc_dwarf_f27_mips, LLDB_INVALID_REGNUM, gdb_f27_mips),
DEFINE_FPR (f28, NULL, gcc_dwarf_f28_mips, gcc_dwarf_f28_mips, LLDB_INVALID_REGNUM, gdb_f28_mips),
DEFINE_FPR (f29, NULL, gcc_dwarf_f29_mips, gcc_dwarf_f29_mips, LLDB_INVALID_REGNUM, gdb_f29_mips),
DEFINE_FPR (f30, NULL, gcc_dwarf_f30_mips, gcc_dwarf_f30_mips, LLDB_INVALID_REGNUM, gdb_f30_mips),
DEFINE_FPR (f31, NULL, gcc_dwarf_f31_mips, gcc_dwarf_f31_mips, LLDB_INVALID_REGNUM, gdb_f31_mips),
DEFINE_FPR (fcsr, NULL, gcc_dwarf_fcsr_mips, gcc_dwarf_fcsr_mips, LLDB_INVALID_REGNUM, gdb_fcsr_mips),
DEFINE_FPR (fir, NULL, gcc_dwarf_fir_mips, gcc_dwarf_fir_mips, LLDB_INVALID_REGNUM, gdb_fir_mips),
DEFINE_FPR (config5, NULL, gcc_dwarf_config5_mips, gcc_dwarf_config5_mips, LLDB_INVALID_REGNUM, gdb_config5_mips),
DEFINE_MSA (w0, NULL, gcc_dwarf_w0_mips, gcc_dwarf_w0_mips, LLDB_INVALID_REGNUM, gdb_w0_mips),
DEFINE_MSA (w1, NULL, gcc_dwarf_w1_mips, gcc_dwarf_w1_mips, LLDB_INVALID_REGNUM, gdb_w1_mips),
DEFINE_MSA (w2, NULL, gcc_dwarf_w2_mips, gcc_dwarf_w2_mips, LLDB_INVALID_REGNUM, gdb_w2_mips),
DEFINE_MSA (w3, NULL, gcc_dwarf_w3_mips, gcc_dwarf_w3_mips, LLDB_INVALID_REGNUM, gdb_w3_mips),
DEFINE_MSA (w4, NULL, gcc_dwarf_w4_mips, gcc_dwarf_w4_mips, LLDB_INVALID_REGNUM, gdb_w4_mips),
DEFINE_MSA (w5, NULL, gcc_dwarf_w5_mips, gcc_dwarf_w5_mips, LLDB_INVALID_REGNUM, gdb_w5_mips),
DEFINE_MSA (w6, NULL, gcc_dwarf_w6_mips, gcc_dwarf_w6_mips, LLDB_INVALID_REGNUM, gdb_w6_mips),
DEFINE_MSA (w7, NULL, gcc_dwarf_w7_mips, gcc_dwarf_w7_mips, LLDB_INVALID_REGNUM, gdb_w7_mips),
DEFINE_MSA (w8, NULL, gcc_dwarf_w8_mips, gcc_dwarf_w8_mips, LLDB_INVALID_REGNUM, gdb_w8_mips),
DEFINE_MSA (w9, NULL, gcc_dwarf_w9_mips, gcc_dwarf_w9_mips, LLDB_INVALID_REGNUM, gdb_w9_mips),
DEFINE_MSA (w10, NULL, gcc_dwarf_w10_mips, gcc_dwarf_w10_mips, LLDB_INVALID_REGNUM, gdb_w10_mips),
DEFINE_MSA (w11, NULL, gcc_dwarf_w11_mips, gcc_dwarf_w11_mips, LLDB_INVALID_REGNUM, gdb_w11_mips),
DEFINE_MSA (w12, NULL, gcc_dwarf_w12_mips, gcc_dwarf_w12_mips, LLDB_INVALID_REGNUM, gdb_w12_mips),
DEFINE_MSA (w13, NULL, gcc_dwarf_w13_mips, gcc_dwarf_w13_mips, LLDB_INVALID_REGNUM, gdb_w13_mips),
DEFINE_MSA (w14, NULL, gcc_dwarf_w14_mips, gcc_dwarf_w14_mips, LLDB_INVALID_REGNUM, gdb_w14_mips),
DEFINE_MSA (w15, NULL, gcc_dwarf_w15_mips, gcc_dwarf_w15_mips, LLDB_INVALID_REGNUM, gdb_w15_mips),
DEFINE_MSA (w16, NULL, gcc_dwarf_w16_mips, gcc_dwarf_w16_mips, LLDB_INVALID_REGNUM, gdb_w16_mips),
DEFINE_MSA (w17, NULL, gcc_dwarf_w17_mips, gcc_dwarf_w17_mips, LLDB_INVALID_REGNUM, gdb_w17_mips),
DEFINE_MSA (w18, NULL, gcc_dwarf_w18_mips, gcc_dwarf_w18_mips, LLDB_INVALID_REGNUM, gdb_w18_mips),
DEFINE_MSA (w19, NULL, gcc_dwarf_w19_mips, gcc_dwarf_w19_mips, LLDB_INVALID_REGNUM, gdb_w19_mips),
DEFINE_MSA (w20, NULL, gcc_dwarf_w10_mips, gcc_dwarf_w20_mips, LLDB_INVALID_REGNUM, gdb_w20_mips),
DEFINE_MSA (w21, NULL, gcc_dwarf_w21_mips, gcc_dwarf_w21_mips, LLDB_INVALID_REGNUM, gdb_w21_mips),
DEFINE_MSA (w22, NULL, gcc_dwarf_w22_mips, gcc_dwarf_w22_mips, LLDB_INVALID_REGNUM, gdb_w22_mips),
DEFINE_MSA (w23, NULL, gcc_dwarf_w23_mips, gcc_dwarf_w23_mips, LLDB_INVALID_REGNUM, gdb_w23_mips),
DEFINE_MSA (w24, NULL, gcc_dwarf_w24_mips, gcc_dwarf_w24_mips, LLDB_INVALID_REGNUM, gdb_w24_mips),
DEFINE_MSA (w25, NULL, gcc_dwarf_w25_mips, gcc_dwarf_w25_mips, LLDB_INVALID_REGNUM, gdb_w25_mips),
DEFINE_MSA (w26, NULL, gcc_dwarf_w26_mips, gcc_dwarf_w26_mips, LLDB_INVALID_REGNUM, gdb_w26_mips),
DEFINE_MSA (w27, NULL, gcc_dwarf_w27_mips, gcc_dwarf_w27_mips, LLDB_INVALID_REGNUM, gdb_w27_mips),
DEFINE_MSA (w28, NULL, gcc_dwarf_w28_mips, gcc_dwarf_w28_mips, LLDB_INVALID_REGNUM, gdb_w28_mips),
DEFINE_MSA (w29, NULL, gcc_dwarf_w29_mips, gcc_dwarf_w29_mips, LLDB_INVALID_REGNUM, gdb_w29_mips),
DEFINE_MSA (w30, NULL, gcc_dwarf_w30_mips, gcc_dwarf_w30_mips, LLDB_INVALID_REGNUM, gdb_w30_mips),
DEFINE_MSA (w31, NULL, gcc_dwarf_w31_mips, gcc_dwarf_w31_mips, LLDB_INVALID_REGNUM, gdb_w31_mips),
DEFINE_MSA_INFO (mcsr, NULL, gcc_dwarf_mcsr_mips, gcc_dwarf_mcsr_mips, LLDB_INVALID_REGNUM, gdb_mcsr_mips),
DEFINE_MSA_INFO (mir, NULL, gcc_dwarf_mir_mips, gcc_dwarf_mir_mips, LLDB_INVALID_REGNUM, gdb_mir_mips),
DEFINE_MSA_INFO (fcsr, NULL, gcc_dwarf_fcsr_mips, gcc_dwarf_fcsr_mips, LLDB_INVALID_REGNUM, gdb_fcsr_mips),
DEFINE_MSA_INFO (fir, NULL, gcc_dwarf_fir_mips, gcc_dwarf_fir_mips, LLDB_INVALID_REGNUM, gdb_fir_mips),
DEFINE_MSA_INFO (config5, NULL, gcc_dwarf_config5_mips, gcc_dwarf_config5_mips, LLDB_INVALID_REGNUM, gdb_config5_mips)
DEFINE_GPR (badvaddr, NULL, gcc_dwarf_bad_mips, gcc_dwarf_bad_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR (sr, "status", gcc_dwarf_sr_mips, gcc_dwarf_sr_mips, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
DEFINE_GPR (cause, NULL, gcc_dwarf_cause_mips, gcc_dwarf_cause_mips, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (fp_reg[0], f0, NULL, gcc_dwarf_f0_mips, gcc_dwarf_f0_mips, LLDB_INVALID_REGNUM, gdb_f0_mips),
DEFINE_FPR (fp_reg[1], f1, NULL, gcc_dwarf_f1_mips, gcc_dwarf_f1_mips, LLDB_INVALID_REGNUM, gdb_f1_mips),
DEFINE_FPR (fp_reg[2], f2, NULL, gcc_dwarf_f2_mips, gcc_dwarf_f2_mips, LLDB_INVALID_REGNUM, gdb_f2_mips),
DEFINE_FPR (fp_reg[3], f3, NULL, gcc_dwarf_f3_mips, gcc_dwarf_f3_mips, LLDB_INVALID_REGNUM, gdb_f3_mips),
DEFINE_FPR (fp_reg[4], f4, NULL, gcc_dwarf_f4_mips, gcc_dwarf_f4_mips, LLDB_INVALID_REGNUM, gdb_f4_mips),
DEFINE_FPR (fp_reg[5], f5, NULL, gcc_dwarf_f5_mips, gcc_dwarf_f5_mips, LLDB_INVALID_REGNUM, gdb_f5_mips),
DEFINE_FPR (fp_reg[6], f6, NULL, gcc_dwarf_f6_mips, gcc_dwarf_f6_mips, LLDB_INVALID_REGNUM, gdb_f6_mips),
DEFINE_FPR (fp_reg[7], f7, NULL, gcc_dwarf_f7_mips, gcc_dwarf_f7_mips, LLDB_INVALID_REGNUM, gdb_f7_mips),
DEFINE_FPR (fp_reg[8], f8, NULL, gcc_dwarf_f8_mips, gcc_dwarf_f8_mips, LLDB_INVALID_REGNUM, gdb_f8_mips),
DEFINE_FPR (fp_reg[9], f9, NULL, gcc_dwarf_f9_mips, gcc_dwarf_f9_mips, LLDB_INVALID_REGNUM, gdb_f9_mips),
DEFINE_FPR (fp_reg[10], f10, NULL, gcc_dwarf_f10_mips, gcc_dwarf_f10_mips, LLDB_INVALID_REGNUM, gdb_f10_mips),
DEFINE_FPR (fp_reg[11], f11, NULL, gcc_dwarf_f11_mips, gcc_dwarf_f11_mips, LLDB_INVALID_REGNUM, gdb_f11_mips),
DEFINE_FPR (fp_reg[12], f12, NULL, gcc_dwarf_f12_mips, gcc_dwarf_f12_mips, LLDB_INVALID_REGNUM, gdb_f12_mips),
DEFINE_FPR (fp_reg[13], f13, NULL, gcc_dwarf_f13_mips, gcc_dwarf_f13_mips, LLDB_INVALID_REGNUM, gdb_f13_mips),
DEFINE_FPR (fp_reg[14], f14, NULL, gcc_dwarf_f14_mips, gcc_dwarf_f14_mips, LLDB_INVALID_REGNUM, gdb_f14_mips),
DEFINE_FPR (fp_reg[15], f15, NULL, gcc_dwarf_f15_mips, gcc_dwarf_f15_mips, LLDB_INVALID_REGNUM, gdb_f15_mips),
DEFINE_FPR (fp_reg[16], f16, NULL, gcc_dwarf_f16_mips, gcc_dwarf_f16_mips, LLDB_INVALID_REGNUM, gdb_f16_mips),
DEFINE_FPR (fp_reg[17], f17, NULL, gcc_dwarf_f17_mips, gcc_dwarf_f17_mips, LLDB_INVALID_REGNUM, gdb_f17_mips),
DEFINE_FPR (fp_reg[18], f18, NULL, gcc_dwarf_f18_mips, gcc_dwarf_f18_mips, LLDB_INVALID_REGNUM, gdb_f18_mips),
DEFINE_FPR (fp_reg[19], f19, NULL, gcc_dwarf_f19_mips, gcc_dwarf_f19_mips, LLDB_INVALID_REGNUM, gdb_f19_mips),
DEFINE_FPR (fp_reg[20], f20, NULL, gcc_dwarf_f20_mips, gcc_dwarf_f20_mips, LLDB_INVALID_REGNUM, gdb_f20_mips),
DEFINE_FPR (fp_reg[21], f21, NULL, gcc_dwarf_f21_mips, gcc_dwarf_f21_mips, LLDB_INVALID_REGNUM, gdb_f21_mips),
DEFINE_FPR (fp_reg[22], f22, NULL, gcc_dwarf_f22_mips, gcc_dwarf_f22_mips, LLDB_INVALID_REGNUM, gdb_f22_mips),
DEFINE_FPR (fp_reg[23], f23, NULL, gcc_dwarf_f23_mips, gcc_dwarf_f23_mips, LLDB_INVALID_REGNUM, gdb_f23_mips),
DEFINE_FPR (fp_reg[24], f24, NULL, gcc_dwarf_f24_mips, gcc_dwarf_f24_mips, LLDB_INVALID_REGNUM, gdb_f24_mips),
DEFINE_FPR (fp_reg[25], f25, NULL, gcc_dwarf_f25_mips, gcc_dwarf_f25_mips, LLDB_INVALID_REGNUM, gdb_f25_mips),
DEFINE_FPR (fp_reg[26], f26, NULL, gcc_dwarf_f26_mips, gcc_dwarf_f26_mips, LLDB_INVALID_REGNUM, gdb_f26_mips),
DEFINE_FPR (fp_reg[27], f27, NULL, gcc_dwarf_f27_mips, gcc_dwarf_f27_mips, LLDB_INVALID_REGNUM, gdb_f27_mips),
DEFINE_FPR (fp_reg[28], f28, NULL, gcc_dwarf_f28_mips, gcc_dwarf_f28_mips, LLDB_INVALID_REGNUM, gdb_f28_mips),
DEFINE_FPR (fp_reg[29], f29, NULL, gcc_dwarf_f29_mips, gcc_dwarf_f29_mips, LLDB_INVALID_REGNUM, gdb_f29_mips),
DEFINE_FPR (fp_reg[30], f30, NULL, gcc_dwarf_f30_mips, gcc_dwarf_f30_mips, LLDB_INVALID_REGNUM, gdb_f30_mips),
DEFINE_FPR (fp_reg[31], f31, NULL, gcc_dwarf_f31_mips, gcc_dwarf_f31_mips, LLDB_INVALID_REGNUM, gdb_f31_mips),
DEFINE_FPR_INFO (fcsr, fcsr, NULL, gcc_dwarf_fcsr_mips, gcc_dwarf_fcsr_mips, LLDB_INVALID_REGNUM, gdb_fcsr_mips),
DEFINE_FPR_INFO (fir, fir, NULL, gcc_dwarf_fir_mips, gcc_dwarf_fir_mips, LLDB_INVALID_REGNUM, gdb_fir_mips)
};
static_assert((sizeof(g_register_infos_mips) / sizeof(g_register_infos_mips[0])) == k_num_registers_mips,
"g_register_infos_mips has wrong number of register infos");
#undef GPR_OFFSET
#undef FPR_OFFSET
#undef MSA_OFFSET
#undef DEFINE_GPR
#undef DEFINE_FPR
#undef DEFINE_MSA
#undef DEFINE_MSA_INFO
#endif // DECLARE_REGISTER_INFOS_MIPS_STRUCT

203
lldb/source/Plugins/Process/Utility/RegisterInfos_mips64.h
View File

@ -13,59 +13,28 @@
#ifdef DECLARE_REGISTER_INFOS_MIPS64_STRUCT
// Computes the offset of the given GPR in the user data area.
#ifdef LINUX_MIPS64
#define GPR_OFFSET(regname) \
(LLVM_EXTENSION offsetof(UserArea, gpr) + \
LLVM_EXTENSION offsetof(GPR_linux_mips, regname))
#else
#define GPR_OFFSET(regname) \
(LLVM_EXTENSION offsetof(GPR_freebsd_mips, regname))
#endif
#define GPR_OFFSET(regname) \
(LLVM_EXTENSION offsetof(GPR, regname))
// Computes the offset of the given FPR in the extended data area.
#define FPR_OFFSET(regname) \
(LLVM_EXTENSION offsetof(UserArea, fpr) + \
LLVM_EXTENSION offsetof(FPR_linux_mips, regname))
// Computes the offset of the given MSA in the extended data area.
#define MSA_OFFSET(regname) \
(LLVM_EXTENSION offsetof(UserArea, msa) + \
LLVM_EXTENSION offsetof(MSA_linux_mips, regname))
LLVM_EXTENSION offsetof(FPR_mips, regname) \
// RegisterKind: GCC, DWARF, Generic, GDB, LLDB
// Note that the size and offset will be updated by platform-specific classes.
#ifdef LINUX_MIPS64
#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((GPR_linux_mips*)0)->reg), GPR_OFFSET(reg), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL }
#else
#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((GPR_freebsd_mips*)0)->reg), GPR_OFFSET(reg), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL }
#endif
#define DEFINE_GPR_INFO(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((GPR_linux_mips*)0)->reg) / 2, GPR_OFFSET(reg), eEncodingUint, \
#define DEFINE_GPR(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((GPR*)0)->reg), GPR_OFFSET(reg), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, gpr_##reg##_mips64 }, NULL, NULL }
#define DEFINE_FPR(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((FPR_linux_mips*)0)->reg), FPR_OFFSET(reg), eEncodingUint, \
#define DEFINE_FPR(member, reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((FPR_mips*)0)->member), FPR_OFFSET(member), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, fpr_##reg##_mips64 }, NULL, NULL }
#define DEFINE_MSA(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingVector, \
eFormatVectorOfUInt8, { kind1, kind2, kind3, kind4, msa_##reg##_mips64 }, NULL, NULL }
#define DEFINE_MSA_INFO(reg, alt, kind1, kind2, kind3, kind4) \
{ #reg, alt, sizeof(((MSA_linux_mips*)0)->reg), MSA_OFFSET(reg), eEncodingUint, \
eFormatHex, { kind1, kind2, kind3, kind4, msa_##reg##_mips64 }, NULL, NULL }
static RegisterInfo
g_register_infos_mips64[] =
{
// General purpose registers. GCC, DWARF, Generic, GDB
#ifndef LINUX_MIPS64
DEFINE_GPR(zero, "r0", gcc_dwarf_zero_mips64, gcc_dwarf_zero_mips64, LLDB_INVALID_REGNUM, gdb_zero_mips64),
DEFINE_GPR(r1, NULL, gcc_dwarf_r1_mips64, gcc_dwarf_r1_mips64, LLDB_INVALID_REGNUM, gdb_r1_mips64),
DEFINE_GPR(r2, NULL, gcc_dwarf_r2_mips64, gcc_dwarf_r2_mips64, LLDB_INVALID_REGNUM, gdb_r2_mips64),
@ -98,140 +67,56 @@ g_register_infos_mips64[] =
DEFINE_GPR(sp, "r29", gcc_dwarf_sp_mips64, gcc_dwarf_sp_mips64, LLDB_REGNUM_GENERIC_SP, gdb_sp_mips64),
DEFINE_GPR(r30, NULL, gcc_dwarf_r30_mips64, gcc_dwarf_r30_mips64, LLDB_REGNUM_GENERIC_FP, gdb_r30_mips64),
DEFINE_GPR(ra, "r31", gcc_dwarf_ra_mips64, gcc_dwarf_ra_mips64, LLDB_REGNUM_GENERIC_RA, gdb_ra_mips64),
DEFINE_GPR(sr, NULL, gcc_dwarf_sr_mips64, gcc_dwarf_sr_mips64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
DEFINE_GPR(mullo, NULL, gcc_dwarf_lo_mips64, gcc_dwarf_lo_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(mulhi, NULL, gcc_dwarf_hi_mips64, gcc_dwarf_hi_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(badvaddr, NULL, gcc_dwarf_bad_mips64, gcc_dwarf_bad_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(cause, NULL, gcc_dwarf_cause_mips64, gcc_dwarf_cause_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(pc, "pc", gcc_dwarf_pc_mips64, gcc_dwarf_pc_mips64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
DEFINE_GPR(badvaddr, NULL, gcc_dwarf_bad_mips64, gcc_dwarf_bad_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(sr, NULL, gcc_dwarf_sr_mips64, gcc_dwarf_sr_mips64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
DEFINE_GPR(cause, NULL, gcc_dwarf_cause_mips64, gcc_dwarf_cause_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(ic, NULL, gcc_dwarf_ic_mips64, gcc_dwarf_ic_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(dummy, NULL, gcc_dwarf_dummy_mips64, gcc_dwarf_dummy_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
#else
DEFINE_GPR(zero, "r0", gcc_dwarf_zero_mips64, gcc_dwarf_zero_mips64, LLDB_INVALID_REGNUM, gdb_zero_mips64),
DEFINE_GPR(r1, NULL, gcc_dwarf_r1_mips64, gcc_dwarf_r1_mips64, LLDB_INVALID_REGNUM, gdb_r1_mips64),
DEFINE_GPR(r2, NULL, gcc_dwarf_r2_mips64, gcc_dwarf_r2_mips64, LLDB_INVALID_REGNUM, gdb_r2_mips64),
DEFINE_GPR(r3, NULL, gcc_dwarf_r3_mips64, gcc_dwarf_r3_mips64, LLDB_INVALID_REGNUM, gdb_r3_mips64),
DEFINE_GPR(r4, NULL, gcc_dwarf_r4_mips64, gcc_dwarf_r4_mips64, LLDB_REGNUM_GENERIC_ARG1, gdb_r4_mips64),
DEFINE_GPR(r5, NULL, gcc_dwarf_r5_mips64, gcc_dwarf_r5_mips64, LLDB_REGNUM_GENERIC_ARG2, gdb_r5_mips64),
DEFINE_GPR(r6, NULL, gcc_dwarf_r6_mips64, gcc_dwarf_r6_mips64, LLDB_REGNUM_GENERIC_ARG3, gdb_r6_mips64),
DEFINE_GPR(r7, NULL, gcc_dwarf_r7_mips64, gcc_dwarf_r7_mips64, LLDB_REGNUM_GENERIC_ARG4, gdb_r7_mips64),
DEFINE_GPR(r8, NULL, gcc_dwarf_r8_mips64, gcc_dwarf_r8_mips64, LLDB_REGNUM_GENERIC_ARG5, gdb_r8_mips64),
DEFINE_GPR(r9, NULL, gcc_dwarf_r9_mips64, gcc_dwarf_r9_mips64, LLDB_REGNUM_GENERIC_ARG6, gdb_r9_mips64),
DEFINE_GPR(r10, NULL, gcc_dwarf_r10_mips64, gcc_dwarf_r10_mips64, LLDB_REGNUM_GENERIC_ARG7, gdb_r10_mips64),
DEFINE_GPR(r11, NULL, gcc_dwarf_r11_mips64, gcc_dwarf_r11_mips64, LLDB_REGNUM_GENERIC_ARG8, gdb_r11_mips64),
DEFINE_GPR(r12, NULL, gcc_dwarf_r12_mips64, gcc_dwarf_r12_mips64, LLDB_INVALID_REGNUM, gdb_r12_mips64),
DEFINE_GPR(r13, NULL, gcc_dwarf_r13_mips64, gcc_dwarf_r13_mips64, LLDB_INVALID_REGNUM, gdb_r13_mips64),
DEFINE_GPR(r14, NULL, gcc_dwarf_r14_mips64, gcc_dwarf_r14_mips64, LLDB_INVALID_REGNUM, gdb_r14_mips64),
DEFINE_GPR(r15, NULL, gcc_dwarf_r15_mips64, gcc_dwarf_r15_mips64, LLDB_INVALID_REGNUM, gdb_r15_mips64),
DEFINE_GPR(r16, NULL, gcc_dwarf_r16_mips64, gcc_dwarf_r16_mips64, LLDB_INVALID_REGNUM, gdb_r16_mips64),
DEFINE_GPR(r17, NULL, gcc_dwarf_r17_mips64, gcc_dwarf_r17_mips64, LLDB_INVALID_REGNUM, gdb_r17_mips64),
DEFINE_GPR(r18, NULL, gcc_dwarf_r18_mips64, gcc_dwarf_r18_mips64, LLDB_INVALID_REGNUM, gdb_r18_mips64),
DEFINE_GPR(r19, NULL, gcc_dwarf_r19_mips64, gcc_dwarf_r19_mips64, LLDB_INVALID_REGNUM, gdb_r19_mips64),
DEFINE_GPR(r20, NULL, gcc_dwarf_r20_mips64, gcc_dwarf_r20_mips64, LLDB_INVALID_REGNUM, gdb_r20_mips64),
DEFINE_GPR(r21, NULL, gcc_dwarf_r21_mips64, gcc_dwarf_r21_mips64, LLDB_INVALID_REGNUM, gdb_r21_mips64),
DEFINE_GPR(r22, NULL, gcc_dwarf_r22_mips64, gcc_dwarf_r22_mips64, LLDB_INVALID_REGNUM, gdb_r22_mips64),
DEFINE_GPR(r23, NULL, gcc_dwarf_r23_mips64, gcc_dwarf_r23_mips64, LLDB_INVALID_REGNUM, gdb_r23_mips64),
DEFINE_GPR(r24, NULL, gcc_dwarf_r24_mips64, gcc_dwarf_r24_mips64, LLDB_INVALID_REGNUM, gdb_r24_mips64),
DEFINE_GPR(r25, NULL, gcc_dwarf_r25_mips64, gcc_dwarf_r25_mips64, LLDB_INVALID_REGNUM, gdb_r25_mips64),
DEFINE_GPR(r26, NULL, gcc_dwarf_r26_mips64, gcc_dwarf_r26_mips64, LLDB_INVALID_REGNUM, gdb_r26_mips64),
DEFINE_GPR(r27, NULL, gcc_dwarf_r27_mips64, gcc_dwarf_r27_mips64, LLDB_INVALID_REGNUM, gdb_r27_mips64),
DEFINE_GPR(gp, "r28", gcc_dwarf_gp_mips64, gcc_dwarf_gp_mips64, LLDB_INVALID_REGNUM, gdb_gp_mips64),
DEFINE_GPR(sp, "r29", gcc_dwarf_sp_mips64, gcc_dwarf_sp_mips64, LLDB_REGNUM_GENERIC_SP, gdb_sp_mips64),
DEFINE_GPR(r30, NULL, gcc_dwarf_r30_mips64, gcc_dwarf_r30_mips64, LLDB_REGNUM_GENERIC_FP, gdb_r30_mips64),
DEFINE_GPR(ra, "r31", gcc_dwarf_ra_mips64, gcc_dwarf_ra_mips64, LLDB_REGNUM_GENERIC_RA, gdb_ra_mips64),
DEFINE_GPR_INFO(sr, NULL, gcc_dwarf_sr_mips64, gcc_dwarf_sr_mips64, LLDB_REGNUM_GENERIC_FLAGS, LLDB_INVALID_REGNUM),
DEFINE_GPR(mullo, NULL, gcc_dwarf_lo_mips64, gcc_dwarf_lo_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(mulhi, NULL, gcc_dwarf_hi_mips64, gcc_dwarf_hi_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(badvaddr, NULL, gcc_dwarf_bad_mips64, gcc_dwarf_bad_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR_INFO(cause, NULL, gcc_dwarf_cause_mips64, gcc_dwarf_cause_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_GPR(pc, "pc", gcc_dwarf_pc_mips64, gcc_dwarf_pc_mips64, LLDB_REGNUM_GENERIC_PC, LLDB_INVALID_REGNUM),
DEFINE_GPR_INFO(config5, NULL, gcc_dwarf_config5_mips64, gcc_dwarf_config5_mips64, LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM),
DEFINE_FPR (f0, NULL, gcc_dwarf_f0_mips64, gcc_dwarf_f0_mips64, LLDB_INVALID_REGNUM, gdb_f0_mips64),
DEFINE_FPR (f1, NULL, gcc_dwarf_f1_mips64, gcc_dwarf_f1_mips64, LLDB_INVALID_REGNUM, gdb_f1_mips64),
DEFINE_FPR (f2, NULL, gcc_dwarf_f2_mips64, gcc_dwarf_f2_mips64, LLDB_INVALID_REGNUM, gdb_f2_mips64),
DEFINE_FPR (f3, NULL, gcc_dwarf_f3_mips64, gcc_dwarf_f3_mips64, LLDB_INVALID_REGNUM, gdb_f3_mips64),
DEFINE_FPR (f4, NULL, gcc_dwarf_f4_mips64, gcc_dwarf_f4_mips64, LLDB_INVALID_REGNUM, gdb_f4_mips64),
DEFINE_FPR (f5, NULL, gcc_dwarf_f5_mips64, gcc_dwarf_f5_mips64, LLDB_INVALID_REGNUM, gdb_f5_mips64),
DEFINE_FPR (f6, NULL, gcc_dwarf_f6_mips64, gcc_dwarf_f6_mips64, LLDB_INVALID_REGNUM, gdb_f6_mips64),
DEFINE_FPR (f7, NULL, gcc_dwarf_f7_mips64, gcc_dwarf_f7_mips64, LLDB_INVALID_REGNUM, gdb_f7_mips64),
DEFINE_FPR (f8, NULL, gcc_dwarf_f8_mips64, gcc_dwarf_f8_mips64, LLDB_INVALID_REGNUM, gdb_f8_mips64),
DEFINE_FPR (f9, NULL, gcc_dwarf_f9_mips64, gcc_dwarf_f9_mips64, LLDB_INVALID_REGNUM, gdb_f9_mips64),
DEFINE_FPR (f10, NULL, gcc_dwarf_f10_mips64, gcc_dwarf_f10_mips64, LLDB_INVALID_REGNUM, gdb_f10_mips64),
DEFINE_FPR (f11, NULL, gcc_dwarf_f11_mips64, gcc_dwarf_f11_mips64, LLDB_INVALID_REGNUM, gdb_f11_mips64),
DEFINE_FPR (f12, NULL, gcc_dwarf_f12_mips64, gcc_dwarf_f12_mips64, LLDB_INVALID_REGNUM, gdb_f12_mips64),
DEFINE_FPR (f13, NULL, gcc_dwarf_f13_mips64, gcc_dwarf_f13_mips64, LLDB_INVALID_REGNUM, gdb_f13_mips64),
DEFINE_FPR (f14, NULL, gcc_dwarf_f14_mips64, gcc_dwarf_f14_mips64, LLDB_INVALID_REGNUM, gdb_f14_mips64),
DEFINE_FPR (f15, NULL, gcc_dwarf_f15_mips64, gcc_dwarf_f15_mips64, LLDB_INVALID_REGNUM, gdb_f15_mips64),
DEFINE_FPR (f16, NULL, gcc_dwarf_f16_mips64, gcc_dwarf_f16_mips64, LLDB_INVALID_REGNUM, gdb_f16_mips64),
DEFINE_FPR (f17, NULL, gcc_dwarf_f17_mips64, gcc_dwarf_f17_mips64, LLDB_INVALID_REGNUM, gdb_f17_mips64),
DEFINE_FPR (f18, NULL, gcc_dwarf_f18_mips64, gcc_dwarf_f18_mips64, LLDB_INVALID_REGNUM, gdb_f18_mips64),
DEFINE_FPR (f19, NULL, gcc_dwarf_f19_mips64, gcc_dwarf_f19_mips64, LLDB_INVALID_REGNUM, gdb_f19_mips64),
DEFINE_FPR (f20, NULL, gcc_dwarf_f20_mips64, gcc_dwarf_f20_mips64, LLDB_INVALID_REGNUM, gdb_f20_mips64),
DEFINE_FPR (f21, NULL, gcc_dwarf_f21_mips64, gcc_dwarf_f21_mips64, LLDB_INVALID_REGNUM, gdb_f21_mips64),
DEFINE_FPR (f22, NULL, gcc_dwarf_f22_mips64, gcc_dwarf_f22_mips64, LLDB_INVALID_REGNUM, gdb_f22_mips64),
DEFINE_FPR (f23, NULL, gcc_dwarf_f23_mips64, gcc_dwarf_f23_mips64, LLDB_INVALID_REGNUM, gdb_f23_mips64),
DEFINE_FPR (f24, NULL, gcc_dwarf_f24_mips64, gcc_dwarf_f24_mips64, LLDB_INVALID_REGNUM, gdb_f24_mips64),
DEFINE_FPR (f25, NULL, gcc_dwarf_f25_mips64, gcc_dwarf_f25_mips64, LLDB_INVALID_REGNUM, gdb_f25_mips64),
DEFINE_FPR (f26, NULL, gcc_dwarf_f26_mips64, gcc_dwarf_f26_mips64, LLDB_INVALID_REGNUM, gdb_f26_mips64),
DEFINE_FPR (f27, NULL, gcc_dwarf_f27_mips64, gcc_dwarf_f27_mips64, LLDB_INVALID_REGNUM, gdb_f27_mips64),
DEFINE_FPR (f28, NULL, gcc_dwarf_f28_mips64, gcc_dwarf_f28_mips64, LLDB_INVALID_REGNUM, gdb_f28_mips64),
DEFINE_FPR (f29, NULL, gcc_dwarf_f29_mips64, gcc_dwarf_f29_mips64, LLDB_INVALID_REGNUM, gdb_f29_mips64),
DEFINE_FPR (f30, NULL, gcc_dwarf_f30_mips64, gcc_dwarf_f30_mips64, LLDB_INVALID_REGNUM, gdb_f30_mips64),
DEFINE_FPR (f31, NULL, gcc_dwarf_f31_mips64, gcc_dwarf_f31_mips64, LLDB_INVALID_REGNUM, gdb_f31_mips64),
DEFINE_FPR (fcsr, NULL, gcc_dwarf_fcsr_mips64, gcc_dwarf_fcsr_mips64, LLDB_INVALID_REGNUM, gdb_fcsr_mips64),
DEFINE_FPR (fir, NULL, gcc_dwarf_fir_mips64, gcc_dwarf_fir_mips64, LLDB_INVALID_REGNUM, gdb_fir_mips64),
DEFINE_FPR (config5, NULL, gcc_dwarf_config5_mips64, gcc_dwarf_config5_mips64, LLDB_INVALID_REGNUM, gdb_config5_mips64),
DEFINE_MSA (w0, NULL, gcc_dwarf_w0_mips64, gcc_dwarf_w0_mips64, LLDB_INVALID_REGNUM, gdb_w0_mips64),
DEFINE_MSA (w1, NULL, gcc_dwarf_w1_mips64, gcc_dwarf_w1_mips64, LLDB_INVALID_REGNUM, gdb_w1_mips64),
DEFINE_MSA (w2, NULL, gcc_dwarf_w2_mips64, gcc_dwarf_w2_mips64, LLDB_INVALID_REGNUM, gdb_w2_mips64),
DEFINE_MSA (w3, NULL, gcc_dwarf_w3_mips64, gcc_dwarf_w3_mips64, LLDB_INVALID_REGNUM, gdb_w3_mips64),
DEFINE_MSA (w4, NULL, gcc_dwarf_w4_mips64, gcc_dwarf_w4_mips64, LLDB_INVALID_REGNUM, gdb_w4_mips64),
DEFINE_MSA (w5, NULL, gcc_dwarf_w5_mips64, gcc_dwarf_w5_mips64, LLDB_INVALID_REGNUM, gdb_w5_mips64),
DEFINE_MSA (w6, NULL, gcc_dwarf_w6_mips64, gcc_dwarf_w6_mips64, LLDB_INVALID_REGNUM, gdb_w6_mips64),
DEFINE_MSA (w7, NULL, gcc_dwarf_w7_mips64, gcc_dwarf_w7_mips64, LLDB_INVALID_REGNUM, gdb_w7_mips64),
DEFINE_MSA (w8, NULL, gcc_dwarf_w8_mips64, gcc_dwarf_w8_mips64, LLDB_INVALID_REGNUM, gdb_w8_mips64),
DEFINE_MSA (w9, NULL, gcc_dwarf_w9_mips64, gcc_dwarf_w9_mips64, LLDB_INVALID_REGNUM, gdb_w9_mips64),
DEFINE_MSA (w10, NULL, gcc_dwarf_w10_mips64, gcc_dwarf_w10_mips64, LLDB_INVALID_REGNUM, gdb_w10_mips64),
DEFINE_MSA (w11, NULL, gcc_dwarf_w11_mips64, gcc_dwarf_w11_mips64, LLDB_INVALID_REGNUM, gdb_w11_mips64),
DEFINE_MSA (w12, NULL, gcc_dwarf_w12_mips64, gcc_dwarf_w12_mips64, LLDB_INVALID_REGNUM, gdb_w12_mips64),
DEFINE_MSA (w13, NULL, gcc_dwarf_w13_mips64, gcc_dwarf_w13_mips64, LLDB_INVALID_REGNUM, gdb_w13_mips64),
DEFINE_MSA (w14, NULL, gcc_dwarf_w14_mips64, gcc_dwarf_w14_mips64, LLDB_INVALID_REGNUM, gdb_w14_mips64),
DEFINE_MSA (w15, NULL, gcc_dwarf_w15_mips64, gcc_dwarf_w15_mips64, LLDB_INVALID_REGNUM, gdb_w15_mips64),
DEFINE_MSA (w16, NULL, gcc_dwarf_w16_mips64, gcc_dwarf_w16_mips64, LLDB_INVALID_REGNUM, gdb_w16_mips64),
DEFINE_MSA (w17, NULL, gcc_dwarf_w17_mips64, gcc_dwarf_w17_mips64, LLDB_INVALID_REGNUM, gdb_w17_mips64),
DEFINE_MSA (w18, NULL, gcc_dwarf_w18_mips64, gcc_dwarf_w18_mips64, LLDB_INVALID_REGNUM, gdb_w18_mips64),
DEFINE_MSA (w19, NULL, gcc_dwarf_w19_mips64, gcc_dwarf_w19_mips64, LLDB_INVALID_REGNUM, gdb_w19_mips64),
DEFINE_MSA (w20, NULL, gcc_dwarf_w10_mips64, gcc_dwarf_w20_mips64, LLDB_INVALID_REGNUM, gdb_w20_mips64),
DEFINE_MSA (w21, NULL, gcc_dwarf_w21_mips64, gcc_dwarf_w21_mips64, LLDB_INVALID_REGNUM, gdb_w21_mips64),
DEFINE_MSA (w22, NULL, gcc_dwarf_w22_mips64, gcc_dwarf_w22_mips64, LLDB_INVALID_REGNUM, gdb_w22_mips64),
DEFINE_MSA (w23, NULL, gcc_dwarf_w23_mips64, gcc_dwarf_w23_mips64, LLDB_INVALID_REGNUM, gdb_w23_mips64),
DEFINE_MSA (w24, NULL, gcc_dwarf_w24_mips64, gcc_dwarf_w24_mips64, LLDB_INVALID_REGNUM, gdb_w24_mips64),
DEFINE_MSA (w25, NULL, gcc_dwarf_w25_mips64, gcc_dwarf_w25_mips64, LLDB_INVALID_REGNUM, gdb_w25_mips64),
DEFINE_MSA (w26, NULL, gcc_dwarf_w26_mips64, gcc_dwarf_w26_mips64, LLDB_INVALID_REGNUM, gdb_w26_mips64),
DEFINE_MSA (w27, NULL, gcc_dwarf_w27_mips64, gcc_dwarf_w27_mips64, LLDB_INVALID_REGNUM, gdb_w27_mips64),
DEFINE_MSA (w28, NULL, gcc_dwarf_w28_mips64, gcc_dwarf_w28_mips64, LLDB_INVALID_REGNUM, gdb_w28_mips64),
DEFINE_MSA (w29, NULL, gcc_dwarf_w29_mips64, gcc_dwarf_w29_mips64, LLDB_INVALID_REGNUM, gdb_w29_mips64),
DEFINE_MSA (w30, NULL, gcc_dwarf_w30_mips64, gcc_dwarf_w30_mips64, LLDB_INVALID_REGNUM, gdb_w30_mips64),
DEFINE_MSA (w31, NULL, gcc_dwarf_w31_mips64, gcc_dwarf_w31_mips64, LLDB_INVALID_REGNUM, gdb_w31_mips64),
DEFINE_MSA_INFO (mcsr, NULL, gcc_dwarf_mcsr_mips64, gcc_dwarf_mcsr_mips64, LLDB_INVALID_REGNUM, gdb_mcsr_mips64),
DEFINE_MSA_INFO (mir, NULL, gcc_dwarf_mir_mips64, gcc_dwarf_mir_mips64, LLDB_INVALID_REGNUM, gdb_mir_mips64),
DEFINE_MSA_INFO (fcsr, NULL, gcc_dwarf_fcsr_mips64, gcc_dwarf_fcsr_mips64, LLDB_INVALID_REGNUM, gdb_fcsr_mips64),
DEFINE_MSA_INFO (fir, NULL, gcc_dwarf_fir_mips64, gcc_dwarf_fir_mips64, LLDB_INVALID_REGNUM, gdb_fir_mips64),
DEFINE_MSA_INFO (config5, NULL, gcc_dwarf_config5_mips64, gcc_dwarf_config5_mips64, LLDB_INVALID_REGNUM, gdb_config5_mips64)
#endif
DEFINE_FPR (fp_reg[0], f0, NULL, gcc_dwarf_f0_mips64, gcc_dwarf_f0_mips64, LLDB_INVALID_REGNUM, gdb_f0_mips64),
DEFINE_FPR (fp_reg[1], f1, NULL, gcc_dwarf_f1_mips64, gcc_dwarf_f1_mips64, LLDB_INVALID_REGNUM, gdb_f1_mips64),
DEFINE_FPR (fp_reg[2], f2, NULL, gcc_dwarf_f2_mips64, gcc_dwarf_f2_mips64, LLDB_INVALID_REGNUM, gdb_f2_mips64),
DEFINE_FPR (fp_reg[3], f3, NULL, gcc_dwarf_f3_mips64, gcc_dwarf_f3_mips64, LLDB_INVALID_REGNUM, gdb_f3_mips64),
DEFINE_FPR (fp_reg[4], f4, NULL, gcc_dwarf_f4_mips64, gcc_dwarf_f4_mips64, LLDB_INVALID_REGNUM, gdb_f4_mips64),
DEFINE_FPR (fp_reg[5], f5, NULL, gcc_dwarf_f5_mips64, gcc_dwarf_f5_mips64, LLDB_INVALID_REGNUM, gdb_f5_mips64),
DEFINE_FPR (fp_reg[6], f6, NULL, gcc_dwarf_f6_mips64, gcc_dwarf_f6_mips64, LLDB_INVALID_REGNUM, gdb_f6_mips64),
DEFINE_FPR (fp_reg[7], f7, NULL, gcc_dwarf_f7_mips64, gcc_dwarf_f7_mips64, LLDB_INVALID_REGNUM, gdb_f7_mips64),
DEFINE_FPR (fp_reg[8], f8, NULL, gcc_dwarf_f8_mips64, gcc_dwarf_f8_mips64, LLDB_INVALID_REGNUM, gdb_f8_mips64),
DEFINE_FPR (fp_reg[9], f9, NULL, gcc_dwarf_f9_mips64, gcc_dwarf_f9_mips64, LLDB_INVALID_REGNUM, gdb_f9_mips64),
DEFINE_FPR (fp_reg[10], f10, NULL, gcc_dwarf_f10_mips64, gcc_dwarf_f10_mips64, LLDB_INVALID_REGNUM, gdb_f10_mips64),
DEFINE_FPR (fp_reg[11], f11, NULL, gcc_dwarf_f11_mips64, gcc_dwarf_f11_mips64, LLDB_INVALID_REGNUM, gdb_f11_mips64),
DEFINE_FPR (fp_reg[12], f12, NULL, gcc_dwarf_f12_mips64, gcc_dwarf_f12_mips64, LLDB_INVALID_REGNUM, gdb_f12_mips64),
DEFINE_FPR (fp_reg[13], f13, NULL, gcc_dwarf_f13_mips64, gcc_dwarf_f13_mips64, LLDB_INVALID_REGNUM, gdb_f13_mips64),
DEFINE_FPR (fp_reg[14], f14, NULL, gcc_dwarf_f14_mips64, gcc_dwarf_f14_mips64, LLDB_INVALID_REGNUM, gdb_f14_mips64),
DEFINE_FPR (fp_reg[15], f15, NULL, gcc_dwarf_f15_mips64, gcc_dwarf_f15_mips64, LLDB_INVALID_REGNUM, gdb_f15_mips64),
DEFINE_FPR (fp_reg[16], f16, NULL, gcc_dwarf_f16_mips64, gcc_dwarf_f16_mips64, LLDB_INVALID_REGNUM, gdb_f16_mips64),
DEFINE_FPR (fp_reg[17], f17, NULL, gcc_dwarf_f17_mips64, gcc_dwarf_f17_mips64, LLDB_INVALID_REGNUM, gdb_f17_mips64),
DEFINE_FPR (fp_reg[18], f18, NULL, gcc_dwarf_f18_mips64, gcc_dwarf_f18_mips64, LLDB_INVALID_REGNUM, gdb_f18_mips64),
DEFINE_FPR (fp_reg[19], f19, NULL, gcc_dwarf_f19_mips64, gcc_dwarf_f19_mips64, LLDB_INVALID_REGNUM, gdb_f19_mips64),
DEFINE_FPR (fp_reg[20], f20, NULL, gcc_dwarf_f20_mips64, gcc_dwarf_f20_mips64, LLDB_INVALID_REGNUM, gdb_f20_mips64),
DEFINE_FPR (fp_reg[21], f21, NULL, gcc_dwarf_f21_mips64, gcc_dwarf_f21_mips64, LLDB_INVALID_REGNUM, gdb_f21_mips64),
DEFINE_FPR (fp_reg[22], f22, NULL, gcc_dwarf_f22_mips64, gcc_dwarf_f22_mips64, LLDB_INVALID_REGNUM, gdb_f22_mips64),
DEFINE_FPR (fp_reg[23], f23, NULL, gcc_dwarf_f23_mips64, gcc_dwarf_f23_mips64, LLDB_INVALID_REGNUM, gdb_f23_mips64),
DEFINE_FPR (fp_reg[24], f24, NULL, gcc_dwarf_f24_mips64, gcc_dwarf_f24_mips64, LLDB_INVALID_REGNUM, gdb_f24_mips64),
DEFINE_FPR (fp_reg[25], f25, NULL, gcc_dwarf_f25_mips64, gcc_dwarf_f25_mips64, LLDB_INVALID_REGNUM, gdb_f25_mips64),
DEFINE_FPR (fp_reg[26], f26, NULL, gcc_dwarf_f26_mips64, gcc_dwarf_f26_mips64, LLDB_INVALID_REGNUM, gdb_f26_mips64),
DEFINE_FPR (fp_reg[27], f27, NULL, gcc_dwarf_f27_mips64, gcc_dwarf_f27_mips64, LLDB_INVALID_REGNUM, gdb_f27_mips64),
DEFINE_FPR (fp_reg[28], f28, NULL, gcc_dwarf_f28_mips64, gcc_dwarf_f28_mips64, LLDB_INVALID_REGNUM, gdb_f28_mips64),
DEFINE_FPR (fp_reg[29], f29, NULL, gcc_dwarf_f29_mips64, gcc_dwarf_f29_mips64, LLDB_INVALID_REGNUM, gdb_f29_mips64),
DEFINE_FPR (fp_reg[30], f30, NULL, gcc_dwarf_f30_mips64, gcc_dwarf_f30_mips64, LLDB_INVALID_REGNUM, gdb_f30_mips64),
DEFINE_FPR (fp_reg[31], f31, NULL, gcc_dwarf_f31_mips64, gcc_dwarf_f31_mips64, LLDB_INVALID_REGNUM, gdb_f31_mips64),
DEFINE_FPR (fcsr, fcsr, NULL, gcc_dwarf_fcsr_mips64, gcc_dwarf_fcsr_mips64, LLDB_INVALID_REGNUM, gdb_fcsr_mips64),
DEFINE_FPR (fir, fir, NULL, gcc_dwarf_fir_mips64, gcc_dwarf_fir_mips64, LLDB_INVALID_REGNUM, gdb_fir_mips64)
};
static_assert((sizeof(g_register_infos_mips64) / sizeof(g_register_infos_mips64[0])) == k_num_registers_mips64,
"g_register_infos_mips64 has wrong number of register infos");
#undef DEFINE_GPR
#undef DEFINE_GPR_INFO
#undef DEFINE_FPR
#undef DEFINE_MSA
#undef DEFINE_MSA_INFO
#undef GPR_OFFSET
#undef FPR_OFFSET
#undef MSA_OFFSET
#endif // DECLARE_REGISTER_INFOS_MIPS64_STRUCT

70
lldb/source/Plugins/Process/Utility/lldb-mips-freebsd-register-enums.h
View File

@ -1,70 +0,0 @@
//===-- lldb-mips-frebsd-register-enums.h -------------------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#ifndef lldb_mips_freebsd_register_enums_h
#define lldb_mips_freebsd_register_enums_h
namespace lldb_private
{
// LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)
//---------------------------------------------------------------------------
// Internal codes for all mips registers.
//---------------------------------------------------------------------------
enum
{
k_first_gpr_mips64,
gpr_zero_mips64 = k_first_gpr_mips64,
gpr_r1_mips64,
gpr_r2_mips64,
gpr_r3_mips64,
gpr_r4_mips64,
gpr_r5_mips64,
gpr_r6_mips64,
gpr_r7_mips64,
gpr_r8_mips64,
gpr_r9_mips64,
gpr_r10_mips64,
gpr_r11_mips64,
gpr_r12_mips64,
gpr_r13_mips64,
gpr_r14_mips64,
gpr_r15_mips64,
gpr_r16_mips64,
gpr_r17_mips64,
gpr_r18_mips64,
gpr_r19_mips64,
gpr_r20_mips64,
gpr_r21_mips64,
gpr_r22_mips64,
gpr_r23_mips64,
gpr_r24_mips64,
gpr_r25_mips64,
gpr_r26_mips64,
gpr_r27_mips64,
gpr_gp_mips64,
gpr_sp_mips64,
gpr_r30_mips64,
gpr_ra_mips64,
gpr_sr_mips64,
gpr_mullo_mips64,
gpr_mulhi_mips64,
gpr_badvaddr_mips64,
gpr_cause_mips64,
gpr_pc_mips64,
gpr_ic_mips64,
gpr_dummy_mips64,
k_last_gpr_mips64 = gpr_dummy_mips64,
k_num_registers_mips64,
k_num_gpr_registers_mips64 = k_last_gpr_mips64 - k_first_gpr_mips64 + 1
};
}
#endif // #ifndef lldb_mips_freebsd_register_enums_h

122
lldb/source/Plugins/Process/Utility/lldb-mips-linux-register-enums.h → lldb/source/Plugins/Process/Utility/lldb-mips64-register-enums.h
View File

@ -1,4 +1,4 @@
//===-- lldb-mips-linux-register-enums.h -------------------------------*- C++ -*-===//
//===-- lldb-mips64-register-enums.h -------------------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
@ -7,8 +7,8 @@
//
//===----------------------------------------------------------------------===//
#ifndef lldb_mips_linux_register_enums_h
#define lldb_mips_linux_register_enums_h
#ifndef lldb_mips64_register_enums_h
#define lldb_mips64_register_enums_h
namespace lldb_private
{
@ -52,15 +52,14 @@ namespace lldb_private
gpr_sp_mips,
gpr_r30_mips,
gpr_ra_mips,
gpr_sr_mips,
gpr_mullo_mips,
gpr_mulhi_mips,
gpr_badvaddr_mips,
gpr_cause_mips,
gpr_pc_mips,
gpr_config5_mips,
gpr_badvaddr_mips,
gpr_sr_mips,
gpr_cause_mips,
k_last_gpr_mips = gpr_config5_mips,
k_last_gpr_mips = gpr_cause_mips,
k_first_fpr_mips,
fpr_f0_mips = k_first_fpr_mips,
@ -97,55 +96,12 @@ namespace lldb_private
fpr_f31_mips,
fpr_fcsr_mips,
fpr_fir_mips,
fpr_config5_mips,
k_last_fpr_mips = fpr_config5_mips,
k_first_msa_mips,
msa_w0_mips = k_first_msa_mips,
msa_w1_mips,
msa_w2_mips,
msa_w3_mips,
msa_w4_mips,
msa_w5_mips,
msa_w6_mips,
msa_w7_mips,
msa_w8_mips,
msa_w9_mips,
msa_w10_mips,
msa_w11_mips,
msa_w12_mips,
msa_w13_mips,
msa_w14_mips,
msa_w15_mips,
msa_w16_mips,
msa_w17_mips,
msa_w18_mips,
msa_w19_mips,
msa_w20_mips,
msa_w21_mips,
msa_w22_mips,
msa_w23_mips,
msa_w24_mips,
msa_w25_mips,
msa_w26_mips,
msa_w27_mips,
msa_w28_mips,
msa_w29_mips,
msa_w30_mips,
msa_w31_mips,
msa_fcsr_mips,
msa_fir_mips,
msa_mcsr_mips,
msa_mir_mips,
msa_config5_mips,
k_last_msa_mips = msa_config5_mips,
k_last_fpr_mips = fpr_fir_mips,
k_num_registers_mips,
k_num_gpr_registers_mips = k_last_gpr_mips - k_first_gpr_mips + 1,
k_num_fpr_registers_mips = k_last_fpr_mips - k_first_fpr_mips + 1,
k_num_msa_registers_mips = k_last_msa_mips - k_first_msa_mips + 1,
k_num_user_registers_mips = k_num_gpr_registers_mips + k_num_fpr_registers_mips + k_num_msa_registers_mips
k_num_user_registers_mips = k_num_gpr_registers_mips + k_num_fpr_registers_mips,
};
//---------------------------------------------------------------------------
@ -186,14 +142,16 @@ namespace lldb_private
gpr_sp_mips64,
gpr_r30_mips64,
gpr_ra_mips64,
gpr_sr_mips64,
gpr_mullo_mips64,
gpr_mulhi_mips64,
gpr_badvaddr_mips64,
gpr_cause_mips64,
gpr_pc_mips64,
gpr_config5_mips64,
k_last_gpr_mips64 = gpr_config5_mips64,
gpr_badvaddr_mips64,
gpr_sr_mips64,
gpr_cause_mips64,
gpr_ic_mips64,
gpr_dummy_mips64,
k_last_gpr_mips64 = gpr_dummy_mips64,
k_first_fpr_mips64,
fpr_f0_mips64 = k_first_fpr_mips64,
@ -230,56 +188,12 @@ namespace lldb_private
fpr_f31_mips64,
fpr_fcsr_mips64,
fpr_fir_mips64,
fpr_config5_mips64,
k_last_fpr_mips64 = fpr_config5_mips64,
k_first_msa_mips64,
msa_w0_mips64 = k_first_msa_mips64,
msa_w1_mips64,
msa_w2_mips64,
msa_w3_mips64,
msa_w4_mips64,
msa_w5_mips64,
msa_w6_mips64,
msa_w7_mips64,
msa_w8_mips64,
msa_w9_mips64,
msa_w10_mips64,
msa_w11_mips64,
msa_w12_mips64,
msa_w13_mips64,
msa_w14_mips64,
msa_w15_mips64,
msa_w16_mips64,
msa_w17_mips64,
msa_w18_mips64,
msa_w19_mips64,
msa_w20_mips64,
msa_w21_mips64,
msa_w22_mips64,
msa_w23_mips64,
msa_w24_mips64,
msa_w25_mips64,
msa_w26_mips64,
msa_w27_mips64,
msa_w28_mips64,
msa_w29_mips64,
msa_w30_mips64,
msa_w31_mips64,
msa_fcsr_mips64,
msa_fir_mips64,
msa_mcsr_mips64,
msa_mir_mips64,
msa_config5_mips64,
k_last_msa_mips64 = msa_config5_mips64,
k_last_fpr_mips64 = fpr_fir_mips64,
k_num_registers_mips64,
k_num_gpr_registers_mips64 = k_last_gpr_mips64 - k_first_gpr_mips64 + 1,
k_num_fpr_registers_mips64 = k_last_fpr_mips64 - k_first_fpr_mips64 + 1,
k_num_msa_registers_mips64 = k_last_msa_mips64 - k_first_msa_mips64 + 1,
k_num_user_registers_mips64 = k_num_gpr_registers_mips64 + k_num_fpr_registers_mips64 + k_num_msa_registers_mips64
};
}
#endif // #ifndef lldb_mips_linux_register_enums_h
#endif // #ifndef fpr_mips64_register_enums_h