forked from OSchip/llvm-project
MachineCopyPropagation: Catch copies of the form A<-B;A<-B
Differential Revision: http://reviews.llvm.org/D17475 llvm-svn: 261966
This commit is contained in:
Matthias Braun
parent
e39ff70685
commit
9dcd65f478
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@ -52,6 +52,7 @@ namespace {
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private:
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void ClobberRegister(unsigned Reg);
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void CopyPropagateBlock(MachineBasicBlock &MBB);
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bool eraseIfRedundant(MachineInstr &Copy, unsigned Src, unsigned Def);
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/// Candidates for deletion.
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SmallSetVector<MachineInstr*, 8> MaybeDeadCopies;
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@ -109,29 +110,61 @@ void MachineCopyPropagation::ClobberRegister(unsigned Reg) {
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}
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}
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/// isNopCopy - Return true if the specified copy is really a nop. That is
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/// if the source of the copy is the same of the definition of the copy that
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/// supplied the source. If the source of the copy is a sub-register than it
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/// must check the sub-indices match. e.g.
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/// ecx = mov eax
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/// al = mov cl
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/// But not
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/// ecx = mov eax
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/// al = mov ch
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static bool isNopCopy(const MachineInstr *CopyMI, unsigned Def, unsigned Src,
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const TargetRegisterInfo *TRI) {
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unsigned SrcSrc = CopyMI->getOperand(1).getReg();
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if (Def == SrcSrc)
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/// Return true if \p PreviousCopy did copy register \p Src to register \p Def.
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/// This fact may have been obscured by sub register usage or may not be true at
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/// all even though Src and Def are subregisters of the registers used in
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/// PreviousCopy. e.g.
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/// isNopCopy("ecx = COPY eax", AX, CX) == true
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/// isNopCopy("ecx = COPY eax", AH, CL) == false
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static bool isNopCopy(const MachineInstr &PreviousCopy, unsigned Src,
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unsigned Def, const TargetRegisterInfo *TRI) {
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unsigned PreviousSrc = PreviousCopy.getOperand(1).getReg();
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unsigned PreviousDef = PreviousCopy.getOperand(0).getReg();
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if (Src == PreviousSrc) {
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assert(Def == PreviousDef);
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return true;
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if (TRI->isSubRegister(SrcSrc, Def)) {
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unsigned SrcDef = CopyMI->getOperand(0).getReg();
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unsigned SubIdx = TRI->getSubRegIndex(SrcSrc, Def);
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if (!SubIdx)
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return false;
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return SubIdx == TRI->getSubRegIndex(SrcDef, Src);
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}
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if (!TRI->isSubRegister(PreviousSrc, Src))
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return false;
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unsigned SubIdx = TRI->getSubRegIndex(PreviousSrc, Src);
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return SubIdx == TRI->getSubRegIndex(PreviousDef, Def);
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}
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return false;
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/// Remove instruction \p Copy if there exists a previous copy that copies the
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/// register \p Src to the register \p Def; This may happen indirectly by
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/// copying the super registers.
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bool MachineCopyPropagation::eraseIfRedundant(MachineInstr &Copy, unsigned Src,
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unsigned Def) {
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// Avoid eliminating a copy from/to a reserved registers as we cannot predict
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// the value (Example: The sparc zero register is writable but stays zero).
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if (MRI->isReserved(Src) || MRI->isReserved(Def))
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return false;
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// Search for an existing copy.
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Reg2MIMap::iterator CI = AvailCopyMap.find(Def);
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if (CI == AvailCopyMap.end())
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return false;
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// Check that the existing copy uses the correct sub registers.
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MachineInstr &PrevCopy = *CI->second;
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if (!isNopCopy(PrevCopy, Src, Def, TRI))
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return false;
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DEBUG(dbgs() << "MCP: copy is a NOP, removing: "; Copy.dump());
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// Copy was redundantly redefining either Src or Def. Remove earlier kill
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// flags between Copy and PrevCopy because the value will be reused now.
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assert(Copy.isCopy());
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unsigned CopyDef = Copy.getOperand(0).getReg();
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assert(CopyDef == Src || CopyDef == Def);
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for (MachineInstr &MI :
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make_range(PrevCopy.getIterator(), Copy.getIterator()))
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MI.clearRegisterKills(CopyDef, TRI);
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Copy.eraseFromParent();
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Changed = true;
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++NumDeletes;
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return true;
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}
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void MachineCopyPropagation::CopyPropagateBlock(MachineBasicBlock &MBB) {
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@ -149,38 +182,23 @@ void MachineCopyPropagation::CopyPropagateBlock(MachineBasicBlock &MBB) {
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!TargetRegisterInfo::isVirtualRegister(Src) &&
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"MachineCopyPropagation should be run after register allocation!");
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DenseMap<unsigned, MachineInstr*>::iterator CI = AvailCopyMap.find(Src);
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if (CI != AvailCopyMap.end()) {
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MachineInstr *CopyMI = CI->second;
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if (!MRI->isReserved(Def) && isNopCopy(CopyMI, Def, Src, TRI)) {
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// The two copies cancel out and the source of the first copy
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// hasn't been overridden, eliminate the second one. e.g.
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// %ECX<def> = COPY %EAX<kill>
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// ... nothing clobbered EAX.
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// %EAX<def> = COPY %ECX
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// =>
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// %ECX<def> = COPY %EAX
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//
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// Also avoid eliminating a copy from reserved registers unless the
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// definition is proven not clobbered. e.g.
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// %RSP<def> = COPY %RAX
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// CALL
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// %RAX<def> = COPY %RSP
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DEBUG(dbgs() << "MCP: copy is a NOP, removing: "; MI->dump());
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// Clear any kills of Def between CopyMI and MI. This extends the
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// live range.
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for (MachineInstr &MMI
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: make_range(CopyMI->getIterator(), MI->getIterator()))
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MMI.clearRegisterKills(Def, TRI);
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MI->eraseFromParent();
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Changed = true;
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++NumDeletes;
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continue;
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}
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}
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// The two copies cancel out and the source of the first copy
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// hasn't been overridden, eliminate the second one. e.g.
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// %ECX<def> = COPY %EAX
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// ... nothing clobbered EAX.
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// %EAX<def> = COPY %ECX
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// =>
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// %ECX<def> = COPY %EAX
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//
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// or
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//
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// %ECX<def> = COPY %EAX
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// ... nothing clobbered EAX.
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// %ECX<def> = COPY %EAX
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// =>
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// %ECX<def> = COPY %EAX
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if (eraseIfRedundant(*MI, Def, Src) || eraseIfRedundant(*MI, Src, Def))
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continue;
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// If Src is defined by a previous copy, the previous copy cannot be
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// eliminated.
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@ -293,9 +311,8 @@ void MachineCopyPropagation::CopyPropagateBlock(MachineBasicBlock &MBB) {
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}
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// Any previous copy definition or reading the Defs is no longer available.
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for (unsigned Reg : Defs) {
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for (unsigned Reg : Defs)
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ClobberRegister(Reg);
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}
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}
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// If MBB doesn't have successors, delete the copies whose defs are not used.
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@ -10,11 +10,10 @@ declare double @llvm.AMDGPU.rsq.clamped.f64(double) nounwind readnone
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; TODO: this constant should be folded:
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; VI: s_mov_b32 s[[ALLBITS:[0-9+]]], -1
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; VI: s_mov_b32 s[[HIGH1:[0-9+]]], 0x7fefffff
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; VI: s_mov_b32 s[[LOW1:[0-9+]]], s[[ALLBITS]]
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; VI: v_min_f64 v[0:1], [[RSQ]], s{{\[}}[[LOW1]]:[[HIGH1]]]
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; VI: s_mov_b32 s[[LOW:[0-9+]]], s[[ALLBITS]]
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; VI: v_min_f64 v[0:1], [[RSQ]], s{{\[}}[[LOW]]:[[HIGH1]]]
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; VI: s_mov_b32 s[[HIGH2:[0-9+]]], 0xffefffff
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; VI: s_mov_b32 s[[LOW2:[0-9+]]], s[[ALLBITS]]
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; VI: v_max_f64 v[0:1], v[0:1], s{{\[}}[[LOW2]]:[[HIGH2]]]
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; VI: v_max_f64 v[0:1], v[0:1], s{{\[}}[[LOW]]:[[HIGH2]]]
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define void @rsq_clamped_f64(double addrspace(1)* %out, double %src) nounwind {
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%rsq_clamped = call double @llvm.AMDGPU.rsq.clamped.f64(double %src) nounwind readnone
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@ -28,11 +28,10 @@ define void @rsq_clamp_f32(float addrspace(1)* %out, float %src) #0 {
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; TODO: this constant should be folded:
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; VI: s_mov_b32 s[[ALLBITS:[0-9+]]], -1
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; VI: s_mov_b32 s[[HIGH1:[0-9+]]], 0x7fefffff
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; VI: s_mov_b32 s[[LOW1:[0-9+]]], s[[ALLBITS]]
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; VI: v_min_f64 v[0:1], [[RSQ]], s{{\[}}[[LOW1]]:[[HIGH1]]]
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; VI: s_mov_b32 s[[LOW:[0-9+]]], s[[ALLBITS]]
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; VI: v_min_f64 v[0:1], [[RSQ]], s{{\[}}[[LOW]]:[[HIGH1]]]
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; VI: s_mov_b32 s[[HIGH2:[0-9+]]], 0xffefffff
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; VI: s_mov_b32 s[[LOW2:[0-9+]]], s[[ALLBITS]]
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; VI: v_max_f64 v[0:1], v[0:1], s{{\[}}[[LOW2]]:[[HIGH2]]]
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; VI: v_max_f64 v[0:1], v[0:1], s{{\[}}[[LOW]]:[[HIGH2]]]
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define void @rsq_clamp_f64(double addrspace(1)* %out, double %src) #0 {
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%rsq_clamp = call double @llvm.amdgcn.rsq.clamp.f64(double %src)
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store double %rsq_clamp, double addrspace(1)* %out
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@ -1,4 +1,4 @@
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# RUN: llc -march=x86 -run-pass machine-cp -o /dev/null %s 2>&1 | FileCheck %s
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# RUN: llc -march=x86 -run-pass machine-cp -verify-machineinstrs -o /dev/null %s 2>&1 | FileCheck %s
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--- |
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declare void @foo()
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@ -6,8 +6,14 @@
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define void @copyprop_remove_kill1() { ret void }
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define void @copyprop_remove_kill2() { ret void }
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define void @copyprop0() { ret void }
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define void @copyprop1() { ret void }
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define void @copyprop2() { ret void }
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define void @nocopyprop0() { ret void }
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define void @nocopyprop1() { ret void }
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define void @nocopyprop2() { ret void }
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define void @nocopyprop3() { ret void }
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define void @nocopyprop4() { ret void }
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define void @nocopyprop5() { ret void }
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...
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---
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# The second copy is redundant and will be removed, check that we also remove
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@ -79,6 +85,38 @@ body: |
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NOOP implicit %rax, implicit %rdi
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...
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---
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# The 2nd copy is redundant; The call preserves the source and dest register.
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# CHECK-LABEL: name: copyprop1
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# CHECK: bb.0:
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# CHECK-NEXT: %rax = COPY %rdi
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# CHECK-NEXT: NOOP implicit %rax
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# CHECK-NEXT: NOOP implicit %rax, implicit %rdi
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name: copyprop1
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body: |
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bb.0:
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%rax = COPY %rdi
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NOOP implicit killed %rax
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%rax = COPY %rdi
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NOOP implicit %rax, implicit %rdi
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...
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---
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# CHECK-LABEL: name: copyprop2
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# CHECK: bb.0:
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# CHECK-NEXT: %rax = COPY %rdi
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# CHECK-NEXT: NOOP implicit %ax
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# CHECK-NEXT: CALL64pcrel32 @foo, csr_64_rt_mostregs
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# CHECK-NOT: %rax = COPY %rdi
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# CHECK-NEXT: NOOP implicit %rax, implicit %rdi
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name: copyprop2
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body: |
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bb.0:
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%rax = COPY %rdi
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NOOP implicit killed %ax
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CALL64pcrel32 @foo, csr_64_rt_mostregs
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%rax = COPY %rdi
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NOOP implicit %rax, implicit %rdi
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...
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---
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# The second copy is not redundant if the source register (%rax) is clobbered
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# even if the dest (%rbp) is not.
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# CHECK-LABEL: name: nocopyprop0
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@ -112,3 +150,66 @@ body: |
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%rax = COPY %rbp
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NOOP implicit %rax, implicit %rbp
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...
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---
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# The second copy is not redundant if the source register (%rax) is clobbered
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# even if the dest (%rbp) is not.
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# CHECK-LABEL: name: nocopyprop2
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# CHECK: bb.0:
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# CHECK-NEXT: %rax = COPY %rbp
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# CHECK-NEXT: CALL64pcrel32 @foo, csr_64, implicit %rax, implicit %rbp
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# CHECK-NEXT: %rax = COPY %rbp
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# CHECK-NEXT: NOOP implicit %rax, implicit %rbp
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name: nocopyprop2
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body: |
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bb.0:
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%rax = COPY %rbp
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CALL64pcrel32 @foo, csr_64, implicit %rax, implicit %rbp
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%rax = COPY %rbp
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NOOP implicit %rax, implicit %rbp
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...
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---
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# The second copy is not redundant if the dest register (%rax) is clobbered
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# even if the source (%rbp) is not.
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# CHECK-LABEL: name: nocopyprop3
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# CHECK: bb.0:
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# CHECK-NEXT: %rbp = COPY %rax
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# CHECK-NEXT: CALL64pcrel32 @foo, csr_64, implicit %rax, implicit %rbp
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# CHECK-NEXT: %rbp = COPY %rax
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# CHECK-NEXT: NOOP implicit %rax, implicit %rbp
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name: nocopyprop3
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body: |
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bb.0:
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%rbp = COPY %rax
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CALL64pcrel32 @foo, csr_64, implicit %rax, implicit %rbp
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%rbp = COPY %rax
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NOOP implicit %rax, implicit %rbp
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...
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---
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# A reserved register may change its value so the 2nd copy is not redundant.
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# CHECK-LABEL: name: nocopyprop4
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# CHECK: bb.0:
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# CHECK-NEXT: %rax = COPY %rip
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# CHECK-NEXT: NOOP implicit %rax
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# CHECK-NEXT: %rax = COPY %rip
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# CHECK-NEXT: NOOP implicit %rax
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name: nocopyprop4
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body: |
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bb.0:
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%rax = COPY %rip
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NOOP implicit %rax
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%rax = COPY %rip
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NOOP implicit %rax
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...
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---
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# Writing to a reserved register may have additional effects (slightly illegal
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# testcase because writing to %rip like this should make the instruction a jump)
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# CHECK-LABEL: name: nocopyprop5
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# CHECK: bb.0:
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# CHECK-NEXT: %rip = COPY %rax
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# CHECK-NEXT: %rip = COPY %rax
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name: nocopyprop5
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body: |
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bb.0:
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%rip = COPY %rax
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%rip = COPY %rax
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...
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