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Mem2Reg: Convert tests to opaque pointers 

This was a painless conversion.
This commit is contained in:
Matt Arsenault 2022-11-26 10:49:30 -05:00
parent 551c7e8189
commit 9daaaad9cf
31 changed files with 289 additions and 294 deletions
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4
llvm/test/Transforms/Mem2Reg/2002-03-28-UninitializedVal.ll
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@ -5,7 +5,7 @@
define i32 @test() { define i32 @test() {
; To be promoted ; To be promoted
%X = alloca i32 ; <i32*> [#uses=1] %X = alloca i32 ; <ptr> [#uses=1]
%Y = load i32, i32* %X ; <i32> [#uses=1] %Y = load i32, ptr %X ; <i32> [#uses=1]
ret i32 %Y ret i32 %Y
} }

10
llvm/test/Transforms/Mem2Reg/2002-05-01-ShouldNotPromoteThisAlloca.ll
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@ -7,13 +7,13 @@
define void @test() { define void @test() {
; CHECK-LABEL: @test( ; CHECK-LABEL: @test(
; CHECK-NEXT: [[R:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[R:%.*]] = alloca i32, align 4
; CHECK-NEXT: store i32 4, i32* [[R]], align 4 ; CHECK-NEXT: store i32 4, ptr [[R]], align 4
; CHECK-NEXT: store i32* [[R]], i32** null, align 8 ; CHECK-NEXT: store ptr [[R]], ptr null, align 8
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%r = alloca i32 ; <i32*> [#uses=2] %r = alloca i32 ; <ptr> [#uses=2]
store i32 4, i32* %r store i32 4, ptr %r
store i32* %r, i32** null store ptr %r, ptr null
ret void ret void
} }

4
llvm/test/Transforms/Mem2Reg/2003-04-10-DFNotFound.ll
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@ -7,10 +7,10 @@ define void @_Z3barv() {
; CHECK: 1: ; CHECK: 1:
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%result = alloca i32 ; <i32*> [#uses=1] %result = alloca i32 ; <ptr> [#uses=1]
ret void ret void
; No predecessors! ; No predecessors!
store i32 0, i32* %result store i32 0, ptr %result
ret void ret void
} }

6
llvm/test/Transforms/Mem2Reg/2003-04-18-DeadBlockProblem.ll
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@ -12,11 +12,11 @@ define i32 @test() {
; CHECK: EndOfLoop: ; CHECK: EndOfLoop:
; CHECK-NEXT: br label [[LOOP]] ; CHECK-NEXT: br label [[LOOP]]
; ;
%X = alloca i32 ; <i32*> [#uses=2] %X = alloca i32 ; <ptr> [#uses=2]
store i32 6, i32* %X store i32 6, ptr %X
br label %Loop br label %Loop
Loop: ; preds = %EndOfLoop, %0 Loop: ; preds = %EndOfLoop, %0
store i32 5, i32* %X store i32 5, ptr %X
br label %EndOfLoop br label %EndOfLoop
Unreachable: ; No predecessors! Unreachable: ; No predecessors!
br label %EndOfLoop br label %EndOfLoop

6
llvm/test/Transforms/Mem2Reg/2003-04-24-MultipleIdenticalSuccessors.ll
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@ -4,13 +4,13 @@
; RUN: opt < %s -passes=mem2reg -disable-output ; RUN: opt < %s -passes=mem2reg -disable-output
define i32 @test(i1 %c1, i1 %c2) { define i32 @test(i1 %c1, i1 %c2) {
%X = alloca i32 ; <i32*> [#uses=2] %X = alloca i32 ; <ptr> [#uses=2]
br i1 %c1, label %Exit, label %B2 br i1 %c1, label %Exit, label %B2
B2: ; preds = %0 B2: ; preds = %0
store i32 2, i32* %X store i32 2, ptr %X
br i1 %c2, label %Exit, label %Exit br i1 %c2, label %Exit, label %Exit
Exit: ; preds = %B2, %B2, %0 Exit: ; preds = %B2, %B2, %0
%Y = load i32, i32* %X ; <i32> [#uses=1] %Y = load i32, ptr %X ; <i32> [#uses=1]
ret i32 %Y ret i32 %Y
} }

18
llvm/test/Transforms/Mem2Reg/2003-06-26-IterativePromote.ll
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@ -2,15 +2,15 @@
; RUN: opt < %s -passes=mem2reg -S | not grep alloca ; RUN: opt < %s -passes=mem2reg -S | not grep alloca
define i32 @test2() { define i32 @test2() {
%result = alloca i32 ; <i32*> [#uses=2] %result = alloca i32 ; <ptr> [#uses=2]
%a = alloca i32 ; <i32*> [#uses=2] %a = alloca i32 ; <ptr> [#uses=2]
%p = alloca i32* ; <i32**> [#uses=2] %p = alloca ptr ; <ptr> [#uses=2]
store i32 0, i32* %a store i32 0, ptr %a
store i32* %a, i32** %p store ptr %a, ptr %p
%tmp.0 = load i32*, i32** %p ; <i32*> [#uses=1] %tmp.0 = load ptr, ptr %p ; <ptr> [#uses=1]
%tmp.1 = load i32, i32* %tmp.0 ; <i32> [#uses=1] %tmp.1 = load i32, ptr %tmp.0 ; <i32> [#uses=1]
store i32 %tmp.1, i32* %result store i32 %tmp.1, ptr %result
%tmp.2 = load i32, i32* %result ; <i32> [#uses=1] %tmp.2 = load i32, ptr %result ; <i32> [#uses=1]
ret i32 %tmp.2 ret i32 %tmp.2
} }

10
llvm/test/Transforms/Mem2Reg/2003-10-05-DeadPHIInsertion.ll
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@ -4,16 +4,16 @@
; RUN: opt < %s -passes=mem2reg -S | not grep phi ; RUN: opt < %s -passes=mem2reg -S | not grep phi
define void @test(i32 %B, i1 %C) { define void @test(i32 %B, i1 %C) {
%A = alloca i32 ; <i32*> [#uses=4] %A = alloca i32 ; <ptr> [#uses=4]
store i32 %B, i32* %A store i32 %B, ptr %A
br i1 %C, label %L1, label %L2 br i1 %C, label %L1, label %L2
L1: ; preds = %0 L1: ; preds = %0
store i32 %B, i32* %A store i32 %B, ptr %A
%D = load i32, i32* %A ; <i32> [#uses=1] %D = load i32, ptr %A ; <i32> [#uses=1]
call void @test( i32 %D, i1 false ) call void @test( i32 %D, i1 false )
br label %L3 br label %L3
L2: ; preds = %0 L2: ; preds = %0
%E = load i32, i32* %A ; <i32> [#uses=1] %E = load i32, ptr %A ; <i32> [#uses=1]
call void @test( i32 %E, i1 true ) call void @test( i32 %E, i1 true )
br label %L3 br label %L3
L3: ; preds = %L2, %L1 L3: ; preds = %L2, %L1

44
llvm/test/Transforms/Mem2Reg/2005-06-30-ReadBeforeWrite.ll
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@ -2,45 +2,45 @@
; PR590 ; PR590
define void @zero(i8* %p, i32 %n) { define void @zero(ptr %p, i32 %n) {
entry: entry:
%p_addr = alloca i8* ; <i8**> [#uses=2] %p_addr = alloca ptr ; <ptr> [#uses=2]
%n_addr = alloca i32 ; <i32*> [#uses=2] %n_addr = alloca i32 ; <ptr> [#uses=2]
%i = alloca i32 ; <i32*> [#uses=6] %i = alloca i32 ; <ptr> [#uses=6]
%out = alloca i32 ; <i32*> [#uses=2] %out = alloca i32 ; <ptr> [#uses=2]
%undef = alloca i32 ; <i32*> [#uses=2] %undef = alloca i32 ; <ptr> [#uses=2]
store i8* %p, i8** %p_addr store ptr %p, ptr %p_addr
store i32 %n, i32* %n_addr store i32 %n, ptr %n_addr
store i32 0, i32* %i store i32 0, ptr %i
br label %loopentry br label %loopentry
loopentry: ; preds = %endif, %entry loopentry: ; preds = %endif, %entry
%tmp.0 = load i32, i32* %n_addr ; <i32> [#uses=1] %tmp.0 = load i32, ptr %n_addr ; <i32> [#uses=1]
%tmp.1 = add i32 %tmp.0, 1 ; <i32> [#uses=1] %tmp.1 = add i32 %tmp.0, 1 ; <i32> [#uses=1]
%tmp.2 = load i32, i32* %i ; <i32> [#uses=1] %tmp.2 = load i32, ptr %i ; <i32> [#uses=1]
%tmp.3 = icmp sgt i32 %tmp.1, %tmp.2 ; <i1> [#uses=2] %tmp.3 = icmp sgt i32 %tmp.1, %tmp.2 ; <i1> [#uses=2]
%tmp.4 = zext i1 %tmp.3 to i32 ; <i32> [#uses=0] %tmp.4 = zext i1 %tmp.3 to i32 ; <i32> [#uses=0]
br i1 %tmp.3, label %no_exit, label %return br i1 %tmp.3, label %no_exit, label %return
no_exit: ; preds = %loopentry no_exit: ; preds = %loopentry
%tmp.5 = load i32, i32* %undef ; <i32> [#uses=1] %tmp.5 = load i32, ptr %undef ; <i32> [#uses=1]
store i32 %tmp.5, i32* %out store i32 %tmp.5, ptr %out
store i32 0, i32* %undef store i32 0, ptr %undef
%tmp.6 = load i32, i32* %i ; <i32> [#uses=1] %tmp.6 = load i32, ptr %i ; <i32> [#uses=1]
%tmp.7 = icmp sgt i32 %tmp.6, 0 ; <i1> [#uses=2] %tmp.7 = icmp sgt i32 %tmp.6, 0 ; <i1> [#uses=2]
%tmp.8 = zext i1 %tmp.7 to i32 ; <i32> [#uses=0] %tmp.8 = zext i1 %tmp.7 to i32 ; <i32> [#uses=0]
br i1 %tmp.7, label %then, label %endif br i1 %tmp.7, label %then, label %endif
then: ; preds = %no_exit then: ; preds = %no_exit
%tmp.9 = load i8*, i8** %p_addr ; <i8*> [#uses=1] %tmp.9 = load ptr, ptr %p_addr ; <ptr> [#uses=1]
%tmp.10 = load i32, i32* %i ; <i32> [#uses=1] %tmp.10 = load i32, ptr %i ; <i32> [#uses=1]
%tmp.11 = sub i32 %tmp.10, 1 ; <i32> [#uses=1] %tmp.11 = sub i32 %tmp.10, 1 ; <i32> [#uses=1]
%tmp.12 = getelementptr i8, i8* %tmp.9, i32 %tmp.11 ; <i8*> [#uses=1] %tmp.12 = getelementptr i8, ptr %tmp.9, i32 %tmp.11 ; <ptr> [#uses=1]
%tmp.13 = load i32, i32* %out ; <i32> [#uses=1] %tmp.13 = load i32, ptr %out ; <i32> [#uses=1]
%tmp.14 = trunc i32 %tmp.13 to i8 ; <i8> [#uses=1] %tmp.14 = trunc i32 %tmp.13 to i8 ; <i8> [#uses=1]
store i8 %tmp.14, i8* %tmp.12 store i8 %tmp.14, ptr %tmp.12
br label %endif br label %endif
endif: ; preds = %then, %no_exit endif: ; preds = %then, %no_exit
%tmp.15 = load i32, i32* %i ; <i32> [#uses=1] %tmp.15 = load i32, ptr %i ; <i32> [#uses=1]
%inc = add i32 %tmp.15, 1 ; <i32> [#uses=1] %inc = add i32 %tmp.15, 1 ; <i32> [#uses=1]
store i32 %inc, i32* %i store i32 %inc, ptr %i
br label %loopentry br label %loopentry
return: ; preds = %loopentry return: ; preds = %loopentry
ret void ret void

6
llvm/test/Transforms/Mem2Reg/2005-11-28-Crash.ll
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@ -3,12 +3,12 @@
define void @printk(i32, ...) { define void @printk(i32, ...) {
entry: entry:
%flags = alloca i32 ; <i32*> [#uses=2] %flags = alloca i32 ; <ptr> [#uses=2]
br i1 false, label %then.0, label %endif.0 br i1 false, label %then.0, label %endif.0
then.0: ; preds = %entry then.0: ; preds = %entry
br label %endif.0 br label %endif.0
endif.0: ; preds = %then.0, %entry endif.0: ; preds = %then.0, %entry
store i32 0, i32* %flags store i32 0, ptr %flags
br label %loopentry br label %loopentry
loopentry: ; preds = %endif.3, %endif.0 loopentry: ; preds = %endif.3, %endif.0
br i1 false, label %no_exit, label %loopexit br i1 false, label %no_exit, label %loopexit
@ -41,7 +41,7 @@ endif.3: ; preds = %then.3, %endif.1
loopexit: ; preds = %loopentry loopexit: ; preds = %loopentry
br label %endif.4 br label %endif.4
then.4: ; No predecessors! then.4: ; No predecessors!
%tmp.61 = load i32, i32* %flags ; <i32> [#uses=0] %tmp.61 = load i32, ptr %flags ; <i32> [#uses=0]
br label %out br label %out
dead_block_after_goto: ; No predecessors! dead_block_after_goto: ; No predecessors!
br label %endif.4 br label %endif.4

28
llvm/test/Transforms/Mem2Reg/2007-08-27-VolatileLoadsStores.ll
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@ -6,42 +6,42 @@ target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f3
target triple = "i686-pc-linux-gnu" target triple = "i686-pc-linux-gnu"
%struct.__jmp_buf_tag = type { [6 x i32], i32, %struct.__sigset_t } %struct.__jmp_buf_tag = type { [6 x i32], i32, %struct.__sigset_t }
%struct.__sigset_t = type { [32 x i32] } %struct.__sigset_t = type { [32 x i32] }
@j = external global [1 x %struct.__jmp_buf_tag] ; <[1 x %struct.__jmp_buf_tag]*> [#uses=1] @j = external global [1 x %struct.__jmp_buf_tag] ; <ptr> [#uses=1]
define i32 @f() { define i32 @f() {
entry: entry:
%retval = alloca i32, align 4 ; <i32*> [#uses=2] %retval = alloca i32, align 4 ; <ptr> [#uses=2]
%v = alloca i32, align 4 ; <i32*> [#uses=3] %v = alloca i32, align 4 ; <ptr> [#uses=3]
%tmp = alloca i32, align 4 ; <i32*> [#uses=3] %tmp = alloca i32, align 4 ; <ptr> [#uses=3]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
store volatile i32 0, i32* %v, align 4 store volatile i32 0, ptr %v, align 4
%tmp1 = call i32 @_setjmp( %struct.__jmp_buf_tag* getelementptr ([1 x %struct.__jmp_buf_tag], [1 x %struct.__jmp_buf_tag]* @j, i32 0, i32 0) ) ; <i32> [#uses=1] %tmp1 = call i32 @_setjmp( ptr @j ) ; <i32> [#uses=1]
%tmp2 = icmp ne i32 %tmp1, 0 ; <i1> [#uses=1] %tmp2 = icmp ne i32 %tmp1, 0 ; <i1> [#uses=1]
%tmp23 = zext i1 %tmp2 to i8 ; <i8> [#uses=1] %tmp23 = zext i1 %tmp2 to i8 ; <i8> [#uses=1]
%toBool = icmp ne i8 %tmp23, 0 ; <i1> [#uses=1] %toBool = icmp ne i8 %tmp23, 0 ; <i1> [#uses=1]
br i1 %toBool, label %bb, label %bb5 br i1 %toBool, label %bb, label %bb5
bb: ; preds = %entry bb: ; preds = %entry
%tmp4 = load volatile i32, i32* %v, align 4 ; <i32> [#uses=1] %tmp4 = load volatile i32, ptr %v, align 4 ; <i32> [#uses=1]
store i32 %tmp4, i32* %tmp, align 4 store i32 %tmp4, ptr %tmp, align 4
br label %bb6 br label %bb6
bb5: ; preds = %entry bb5: ; preds = %entry
store volatile i32 1, i32* %v, align 4 store volatile i32 1, ptr %v, align 4
call void @g( ) call void @g( )
store i32 0, i32* %tmp, align 4 store i32 0, ptr %tmp, align 4
br label %bb6 br label %bb6
bb6: ; preds = %bb5, %bb bb6: ; preds = %bb5, %bb
%tmp7 = load i32, i32* %tmp, align 4 ; <i32> [#uses=1] %tmp7 = load i32, ptr %tmp, align 4 ; <i32> [#uses=1]
store i32 %tmp7, i32* %retval, align 4 store i32 %tmp7, ptr %retval, align 4
br label %return br label %return
return: ; preds = %bb6 return: ; preds = %bb6
%retval8 = load i32, i32* %retval ; <i32> [#uses=1] %retval8 = load i32, ptr %retval ; <i32> [#uses=1]
ret i32 %retval8 ret i32 %retval8
} }
declare i32 @_setjmp(%struct.__jmp_buf_tag*) returns_twice declare i32 @_setjmp(ptr) returns_twice
declare void @g() declare void @g()

28
llvm/test/Transforms/Mem2Reg/ConvertDebugInfo.ll
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@ -2,31 +2,31 @@
define double @testfunc(i32 %i, double %j) nounwind ssp !dbg !1 { define double @testfunc(i32 %i, double %j) nounwind ssp !dbg !1 {
entry: entry:
%i_addr = alloca i32 ; <i32*> [#uses=2] %i_addr = alloca i32 ; <ptr> [#uses=2]
%j_addr = alloca double ; <double*> [#uses=2] %j_addr = alloca double ; <ptr> [#uses=2]
%retval = alloca double ; <double*> [#uses=2] %retval = alloca double ; <ptr> [#uses=2]
%0 = alloca double ; <double*> [#uses=2] %0 = alloca double ; <ptr> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
call void @llvm.dbg.declare(metadata i32* %i_addr, metadata !0, metadata !DIExpression()), !dbg !8 call void @llvm.dbg.declare(metadata ptr %i_addr, metadata !0, metadata !DIExpression()), !dbg !8
; CHECK: call void @llvm.dbg.value(metadata i32 %i, metadata ![[IVAR:[0-9]*]], metadata {{.*}}) ; CHECK: call void @llvm.dbg.value(metadata i32 %i, metadata ![[IVAR:[0-9]*]], metadata {{.*}})
; CHECK: call void @llvm.dbg.value(metadata double %j, metadata ![[JVAR:[0-9]*]], metadata {{.*}}) ; CHECK: call void @llvm.dbg.value(metadata double %j, metadata ![[JVAR:[0-9]*]], metadata {{.*}})
; CHECK: ![[IVAR]] = !DILocalVariable(name: "i" ; CHECK: ![[IVAR]] = !DILocalVariable(name: "i"
; CHECK: ![[JVAR]] = !DILocalVariable(name: "j" ; CHECK: ![[JVAR]] = !DILocalVariable(name: "j"
store i32 %i, i32* %i_addr store i32 %i, ptr %i_addr
call void @llvm.dbg.declare(metadata double* %j_addr, metadata !9, metadata !DIExpression()), !dbg !8 call void @llvm.dbg.declare(metadata ptr %j_addr, metadata !9, metadata !DIExpression()), !dbg !8
store double %j, double* %j_addr store double %j, ptr %j_addr
%1 = load i32, i32* %i_addr, align 4, !dbg !10 ; <i32> [#uses=1] %1 = load i32, ptr %i_addr, align 4, !dbg !10 ; <i32> [#uses=1]
%2 = add nsw i32 %1, 1, !dbg !10 ; <i32> [#uses=1] %2 = add nsw i32 %1, 1, !dbg !10 ; <i32> [#uses=1]
%3 = sitofp i32 %2 to double, !dbg !10 ; <double> [#uses=1] %3 = sitofp i32 %2 to double, !dbg !10 ; <double> [#uses=1]
%4 = load double, double* %j_addr, align 8, !dbg !10 ; <double> [#uses=1] %4 = load double, ptr %j_addr, align 8, !dbg !10 ; <double> [#uses=1]
%5 = fadd double %3, %4, !dbg !10 ; <double> [#uses=1] %5 = fadd double %3, %4, !dbg !10 ; <double> [#uses=1]
store double %5, double* %0, align 8, !dbg !10 store double %5, ptr %0, align 8, !dbg !10
%6 = load double, double* %0, align 8, !dbg !10 ; <double> [#uses=1] %6 = load double, ptr %0, align 8, !dbg !10 ; <double> [#uses=1]
store double %6, double* %retval, align 8, !dbg !10 store double %6, ptr %retval, align 8, !dbg !10
br label %return, !dbg !10 br label %return, !dbg !10
return: ; preds = %entry return: ; preds = %entry
%retval1 = load double, double* %retval, !dbg !10 ; <double> [#uses=1] %retval1 = load double, ptr %retval, !dbg !10 ; <double> [#uses=1]
ret double %retval1, !dbg !10 ret double %retval1, !dbg !10
} }

38
llvm/test/Transforms/Mem2Reg/ConvertDebugInfo2.ll
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@ -2,7 +2,7 @@
declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone
declare void @foo(i32, i64, i8*) declare void @foo(i32, i64, ptr)
define void @baz(i32 %a) nounwind ssp !dbg !1 { define void @baz(i32 %a) nounwind ssp !dbg !1 {
; CHECK-LABEL: entry: ; CHECK-LABEL: entry:
@ -10,28 +10,28 @@ define void @baz(i32 %a) nounwind ssp !dbg !1 {
; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %a,{{.*}}, !dbg ; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %a,{{.*}}, !dbg
; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %a,{{.*}}, !dbg ; CHECK-NEXT: call void @llvm.dbg.value(metadata i32 %a,{{.*}}, !dbg
; CHECK-NEXT: call void @llvm.dbg.value(metadata i64 55,{{.*}}, !dbg ; CHECK-NEXT: call void @llvm.dbg.value(metadata i64 55,{{.*}}, !dbg
; CHECK-NEXT: call void @llvm.dbg.value(metadata i8* bitcast (void (i32)* @baz to i8*),{{.*}}, !dbg ; CHECK-NEXT: call void @llvm.dbg.value(metadata ptr @baz,{{.*}}, !dbg
; CHECK-NEXT: call void @foo({{.*}}, !dbg ; CHECK-NEXT: call void @foo({{.*}}, !dbg
; CHECK-NEXT: br label %return, !dbg ; CHECK-NEXT: br label %return, !dbg
entry: entry:
%x_addr.i = alloca i32 ; <i32*> [#uses=2] %x_addr.i = alloca i32 ; <ptr> [#uses=2]
%y_addr.i = alloca i64 ; <i64*> [#uses=2] %y_addr.i = alloca i64 ; <ptr> [#uses=2]
%z_addr.i = alloca i8* ; <i8**> [#uses=2] %z_addr.i = alloca ptr ; <ptr> [#uses=2]
%a_addr = alloca i32 ; <i32*> [#uses=2] %a_addr = alloca i32 ; <ptr> [#uses=2]
%"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
call void @llvm.dbg.declare(metadata i32* %a_addr, metadata !0, metadata !DIExpression()), !dbg !7 call void @llvm.dbg.declare(metadata ptr %a_addr, metadata !0, metadata !DIExpression()), !dbg !7
store i32 %a, i32* %a_addr store i32 %a, ptr %a_addr
%0 = load i32, i32* %a_addr, align 4, !dbg !8 ; <i32> [#uses=1] %0 = load i32, ptr %a_addr, align 4, !dbg !8 ; <i32> [#uses=1]
call void @llvm.dbg.declare(metadata i32* %x_addr.i, metadata !9, metadata !DIExpression()) nounwind, !dbg !15 call void @llvm.dbg.declare(metadata ptr %x_addr.i, metadata !9, metadata !DIExpression()) nounwind, !dbg !15
store i32 %0, i32* %x_addr.i store i32 %0, ptr %x_addr.i
call void @llvm.dbg.declare(metadata i64* %y_addr.i, metadata !16, metadata !DIExpression()) nounwind, !dbg !15 call void @llvm.dbg.declare(metadata ptr %y_addr.i, metadata !16, metadata !DIExpression()) nounwind, !dbg !15
store i64 55, i64* %y_addr.i store i64 55, ptr %y_addr.i
call void @llvm.dbg.declare(metadata i8** %z_addr.i, metadata !17, metadata !DIExpression()) nounwind, !dbg !15 call void @llvm.dbg.declare(metadata ptr %z_addr.i, metadata !17, metadata !DIExpression()) nounwind, !dbg !15
store i8* bitcast (void (i32)* @baz to i8*), i8** %z_addr.i store ptr @baz, ptr %z_addr.i
%1 = load i32, i32* %x_addr.i, align 4, !dbg !18 ; <i32> [#uses=1] %1 = load i32, ptr %x_addr.i, align 4, !dbg !18 ; <i32> [#uses=1]
%2 = load i64, i64* %y_addr.i, align 8, !dbg !18 ; <i64> [#uses=1] %2 = load i64, ptr %y_addr.i, align 8, !dbg !18 ; <i64> [#uses=1]
%3 = load i8*, i8** %z_addr.i, align 8, !dbg !18 ; <i8*> [#uses=1] %3 = load ptr, ptr %z_addr.i, align 8, !dbg !18 ; <ptr> [#uses=1]
call void @foo(i32 %1, i64 %2, i8* %3) nounwind, !dbg !18 call void @foo(i32 %1, i64 %2, ptr %3) nounwind, !dbg !18
br label %return, !dbg !19 br label %return, !dbg !19
; CHECK-LABEL: return: ; CHECK-LABEL: return:

16
llvm/test/Transforms/Mem2Reg/PromoteMemToRegister.ll
View File

@ -5,16 +5,16 @@
; CHECK: CheckModuleDebugify: PASS ; CHECK: CheckModuleDebugify: PASS
define double @testfunc(i32 %i, double %j) { define double @testfunc(i32 %i, double %j) {
%I = alloca i32 ; <i32*> [#uses=4] %I = alloca i32 ; <ptr> [#uses=4]
%J = alloca double ; <double*> [#uses=2] %J = alloca double ; <ptr> [#uses=2]
store i32 %i, i32* %I store i32 %i, ptr %I
store double %j, double* %J store double %j, ptr %J
%t1 = load i32, i32* %I ; <i32> [#uses=1] %t1 = load i32, ptr %I ; <i32> [#uses=1]
%t2 = add i32 %t1, 1 ; <i32> [#uses=1] %t2 = add i32 %t1, 1 ; <i32> [#uses=1]
store i32 %t2, i32* %I store i32 %t2, ptr %I
%t3 = load i32, i32* %I ; <i32> [#uses=1] %t3 = load i32, ptr %I ; <i32> [#uses=1]
%t4 = sitofp i32 %t3 to double ; <double> [#uses=1] %t4 = sitofp i32 %t3 to double ; <double> [#uses=1]
%t5 = load double, double* %J ; <double> [#uses=1] %t5 = load double, ptr %J ; <double> [#uses=1]
%t6 = fmul double %t4, %t5 ; <double> [#uses=1] %t6 = fmul double %t4, %t5 ; <double> [#uses=1]
ret double %t6 ret double %t6
} }

6
llvm/test/Transforms/Mem2Reg/UndefValuesMerge.ll
View File

@ -1,13 +1,13 @@
; RUN: opt < %s -passes=mem2reg -S | not grep phi ; RUN: opt < %s -passes=mem2reg -S | not grep phi
define i32 @testfunc(i1 %C, i32 %i, i8 %j) { define i32 @testfunc(i1 %C, i32 %i, i8 %j) {
%I = alloca i32 ; <i32*> [#uses=2] %I = alloca i32 ; <ptr> [#uses=2]
br i1 %C, label %T, label %Cont br i1 %C, label %T, label %Cont
T: ; preds = %0 T: ; preds = %0
store i32 %i, i32* %I store i32 %i, ptr %I
br label %Cont br label %Cont
Cont: ; preds = %T, %0 Cont: ; preds = %T, %0
%Y = load i32, i32* %I ; <i32> [#uses=1] %Y = load i32, ptr %I ; <i32> [#uses=1]
ret i32 %Y ret i32 %Y
} }

6
llvm/test/Transforms/Mem2Reg/alloca_addrspace.ll
View File

@ -10,9 +10,9 @@ define amdgpu_kernel void @addressspace_alloca() {
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%alloca = alloca i8, align 8, addrspace(5) %alloca = alloca i8, align 8, addrspace(5)
%cast = addrspacecast i8 addrspace(5)* %alloca to i8* %cast = addrspacecast ptr addrspace(5) %alloca to ptr
call void @llvm.lifetime.start.p0i8(i64 2, i8* %cast) call void @llvm.lifetime.start.p0(i64 2, ptr %cast)
ret void ret void
} }
declare void @llvm.lifetime.start.p0i8(i64 %size, i8* nocapture %ptr) declare void @llvm.lifetime.start.p0(i64 %size, ptr nocapture %ptr)

4
llvm/test/Transforms/Mem2Reg/atomic.ll
View File

@ -6,7 +6,7 @@ define i32 @test1(i32 %x) {
; CHECK-LABEL: @test1( ; CHECK-LABEL: @test1(
; CHECK: ret i32 %x ; CHECK: ret i32 %x
%a = alloca i32 %a = alloca i32
store atomic i32 %x, i32* %a seq_cst, align 4 store atomic i32 %x, ptr %a seq_cst, align 4
%r = load atomic i32, i32* %a seq_cst, align 4 %r = load atomic i32, ptr %a seq_cst, align 4
ret i32 %r ret i32 %r
} }

14
llvm/test/Transforms/Mem2Reg/crash.ll
View File

@ -3,22 +3,22 @@
declare i32 @test1f() declare i32 @test1f()
define i32 @test1() personality i32 (...)* @__gxx_personality_v0 { define i32 @test1() personality ptr @__gxx_personality_v0 {
entry: entry:
%whichFlag = alloca i32 %whichFlag = alloca i32
%A = invoke i32 @test1f() %A = invoke i32 @test1f()
to label %invcont2 unwind label %lpad86 to label %invcont2 unwind label %lpad86
invcont2: invcont2:
store i32 %A, i32* %whichFlag store i32 %A, ptr %whichFlag
br label %bb15 br label %bb15
bb15: bb15:
%B = load i32, i32* %whichFlag %B = load i32, ptr %whichFlag
ret i32 %B ret i32 %B
lpad86: lpad86:
%exn = landingpad {i8*, i32} %exn = landingpad {ptr, i32}
cleanup cleanup
br label %bb15 br label %bb15
@ -33,12 +33,12 @@ entry:
br label %bb15 br label %bb15
bb15: bb15:
%B = load i32, i32* %whichFlag %B = load i32, ptr %whichFlag
ret i32 %B ret i32 %B
invcont2: invcont2:
%C = load i32, i32* %whichFlag %C = load i32, ptr %whichFlag
store i32 %C, i32* %whichFlag store i32 %C, ptr %whichFlag
br label %bb15 br label %bb15
} }

20
llvm/test/Transforms/Mem2Reg/dbg-addr-inline-dse.ll
View File

@ -33,18 +33,18 @@ declare void @llvm.dbg.value(metadata, metadata, metadata) #2
define void @f(i32 %x) #0 !dbg !8 { define void @f(i32 %x) #0 !dbg !8 {
entry: entry:
%x.addr = alloca i32, align 4 %x.addr = alloca i32, align 4
store i32 %x, i32* %x.addr, align 4 store i32 %x, ptr %x.addr, align 4
call void @llvm.dbg.addr(metadata i32* %x.addr, metadata !13, metadata !DIExpression()), !dbg !18 call void @llvm.dbg.addr(metadata ptr %x.addr, metadata !13, metadata !DIExpression()), !dbg !18
%ld.1 = load i32, i32* %x.addr, align 4, !dbg !19 %ld.1 = load i32, ptr %x.addr, align 4, !dbg !19
%inc.1 = add nsw i32 %ld.1, 1, !dbg !19 %inc.1 = add nsw i32 %ld.1, 1, !dbg !19
store i32 %inc.1, i32* %x.addr, align 4, !dbg !19 store i32 %inc.1, ptr %x.addr, align 4, !dbg !19
call void @llvm.dbg.value(metadata i32 1, metadata !13, metadata !DIExpression()), !dbg !20 call void @llvm.dbg.value(metadata i32 1, metadata !13, metadata !DIExpression()), !dbg !20
store i32 1, i32* @global, align 4, !dbg !22 store i32 1, ptr @global, align 4, !dbg !22
call void @llvm.dbg.addr(metadata i32* %x.addr, metadata !13, metadata !DIExpression()), !dbg !23 call void @llvm.dbg.addr(metadata ptr %x.addr, metadata !13, metadata !DIExpression()), !dbg !23
store i32 2, i32* %x.addr, align 4, !dbg !23 store i32 2, ptr %x.addr, align 4, !dbg !23
%ld.2 = load i32, i32* %x.addr, align 4, !dbg !19 %ld.2 = load i32, ptr %x.addr, align 4, !dbg !19
%inc.2 = add nsw i32 %ld.2, 1, !dbg !19 %inc.2 = add nsw i32 %ld.2, 1, !dbg !19
store i32 %inc.2, i32* %x.addr, align 4, !dbg !19 store i32 %inc.2, ptr %x.addr, align 4, !dbg !19
ret void, !dbg !25 ret void, !dbg !25
} }
@ -53,7 +53,7 @@ entry:
; CHECK: %inc.1 = add nsw i32 %x, 1 ; CHECK: %inc.1 = add nsw i32 %x, 1
; CHECK: call void @llvm.dbg.value(metadata i32 %inc.1, metadata !13, metadata !DIExpression()) ; CHECK: call void @llvm.dbg.value(metadata i32 %inc.1, metadata !13, metadata !DIExpression())
; CHECK: call void @llvm.dbg.value(metadata i32 1, metadata !13, metadata !DIExpression()) ; CHECK: call void @llvm.dbg.value(metadata i32 1, metadata !13, metadata !DIExpression())
; CHECK: store i32 1, i32* @global, align 4 ; CHECK: store i32 1, ptr @global, align 4
; CHECK: call void @llvm.dbg.value(metadata i32 2, metadata !13, metadata !DIExpression()) ; CHECK: call void @llvm.dbg.value(metadata i32 2, metadata !13, metadata !DIExpression())
; CHECK: %inc.2 = add nsw i32 2, 1 ; CHECK: %inc.2 = add nsw i32 2, 1
; CHECK: call void @llvm.dbg.value(metadata i32 %inc.2, metadata !13, metadata !DIExpression()) ; CHECK: call void @llvm.dbg.value(metadata i32 %inc.2, metadata !13, metadata !DIExpression())

10
llvm/test/Transforms/Mem2Reg/dbg-addr.ll
View File

@ -9,21 +9,21 @@ target triple = "x86_64-pc-windows-msvc19.0.24215"
define i32 @if_else(i32 %cond, i32 %a, i32 %b) !dbg !8 { define i32 @if_else(i32 %cond, i32 %a, i32 %b) !dbg !8 {
entry: entry:
%x = alloca i32, align 4 %x = alloca i32, align 4
call void @llvm.dbg.addr(metadata i32* %x, metadata !16, metadata !DIExpression()), !dbg !26 call void @llvm.dbg.addr(metadata ptr %x, metadata !16, metadata !DIExpression()), !dbg !26
store i32 %a, i32* %x, align 4, !dbg !26, !tbaa !17 store i32 %a, ptr %x, align 4, !dbg !26, !tbaa !17
%tobool = icmp ne i32 %cond, 0, !dbg !28 %tobool = icmp ne i32 %cond, 0, !dbg !28
br i1 %tobool, label %if.then, label %if.else, !dbg !30 br i1 %tobool, label %if.then, label %if.else, !dbg !30
if.then: ; preds = %entry if.then: ; preds = %entry
store i32 0, i32* %x, align 4, !dbg !31, !tbaa !17 store i32 0, ptr %x, align 4, !dbg !31, !tbaa !17
br label %if.end, !dbg !33 br label %if.end, !dbg !33
if.else: ; preds = %entry if.else: ; preds = %entry
store i32 %b, i32* %x, align 4, !dbg !36, !tbaa !17 store i32 %b, ptr %x, align 4, !dbg !36, !tbaa !17
br label %if.end br label %if.end
if.end: ; preds = %if.else, %if.then if.end: ; preds = %if.else, %if.then
%rv = load i32, i32* %x, align 4, !dbg !37, !tbaa !17 %rv = load i32, ptr %x, align 4, !dbg !37, !tbaa !17
ret i32 %rv, !dbg !39 ret i32 %rv, !dbg !39
} }

36
llvm/test/Transforms/Mem2Reg/dbg-inline-scope-for-phi.ll
View File

@ -15,47 +15,47 @@ target triple = "x86_64-apple-macosx10.13.0"
; } ; }
define i32 @get1() !dbg !8 { define i32 @get1() !dbg !8 {
%1 = call i32* (...) @getp(), !dbg !12 %1 = call ptr (...) @getp(), !dbg !12
%2 = load i32, i32* %1, align 4, !dbg !13 %2 = load i32, ptr %1, align 4, !dbg !13
ret i32 %2, !dbg !14 ret i32 %2, !dbg !14
} }
declare i32* @getp(...) declare ptr @getp(...)
define i32 @get2(i32*) !dbg !15 { define i32 @get2(ptr) !dbg !15 {
%2 = alloca i32*, align 8 %2 = alloca ptr, align 8
store i32* %0, i32** %2, align 8 store ptr %0, ptr %2, align 8
call void @llvm.dbg.declare(metadata i32** %2, metadata !19, metadata !DIExpression()), !dbg !20 call void @llvm.dbg.declare(metadata ptr %2, metadata !19, metadata !DIExpression()), !dbg !20
%3 = load i32*, i32** %2, align 8, !dbg !21 %3 = load ptr, ptr %2, align 8, !dbg !21
%4 = load i32, i32* %3, align 4, !dbg !22 %4 = load i32, ptr %3, align 4, !dbg !22
ret i32 %4, !dbg !23 ret i32 %4, !dbg !23
} }
declare void @llvm.dbg.declare(metadata, metadata, metadata) declare void @llvm.dbg.declare(metadata, metadata, metadata)
; CHECK-LABEL: define i32 @bug ; CHECK-LABEL: define i32 @bug
define i32 @bug(i32*) !dbg !24 { define i32 @bug(ptr) !dbg !24 {
%2 = alloca i32, align 4 %2 = alloca i32, align 4
%3 = alloca i32*, align 8 %3 = alloca ptr, align 8
store i32* %0, i32** %3, align 8 store ptr %0, ptr %3, align 8
call void @llvm.dbg.declare(metadata i32** %3, metadata !25, metadata !DIExpression()), !dbg !26 call void @llvm.dbg.declare(metadata ptr %3, metadata !25, metadata !DIExpression()), !dbg !26
%4 = call i32 (...) @cond(), !dbg !27 %4 = call i32 (...) @cond(), !dbg !27
%5 = icmp ne i32 %4, 0, !dbg !27 %5 = icmp ne i32 %4, 0, !dbg !27
br i1 %5, label %6, label %8, !dbg !29 br i1 %5, label %6, label %8, !dbg !29
; <label>:6: ; preds = %1 ; <label>:6: ; preds = %1
%7 = call i32 @get1(), !dbg !30 %7 = call i32 @get1(), !dbg !30
store i32 %7, i32* %2, align 4, !dbg !31 store i32 %7, ptr %2, align 4, !dbg !31
br label %11, !dbg !31 br label %11, !dbg !31
; <label>:8: ; preds = %1 ; <label>:8: ; preds = %1
%9 = load i32*, i32** %3, align 8, !dbg !32 %9 = load ptr, ptr %3, align 8, !dbg !32
%10 = call i32 @get2(i32* %9), !dbg !33 %10 = call i32 @get2(ptr %9), !dbg !33
store i32 %10, i32* %2, align 4, !dbg !34 store i32 %10, ptr %2, align 4, !dbg !34
br label %11, !dbg !34 br label %11, !dbg !34
; <label>:11: ; preds = %8, %6 ; <label>:11: ; preds = %8, %6
%12 = load i32, i32* %2, align 4, !dbg !35 %12 = load i32, ptr %2, align 4, !dbg !35
ret i32 %12, !dbg !35 ret i32 %12, !dbg !35
; CHECK: [[phi:%.*]] = phi i32 [ {{.*}} ], [ {{.*}} ], !dbg [[mergedLoc:![0-9]+]] ; CHECK: [[phi:%.*]] = phi i32 [ {{.*}} ], [ {{.*}} ], !dbg [[mergedLoc:![0-9]+]]

8
llvm/test/Transforms/Mem2Reg/debug-alloca-phi-2.ll
View File

@ -6,20 +6,20 @@ target triple = "x86_64-apple-macosx10.12.0"
define void @scan() #0 !dbg !12 { define void @scan() #0 !dbg !12 {
entry: entry:
%entry1 = alloca i1, align 8 %entry1 = alloca i1, align 8
call void @llvm.dbg.declare(metadata i1* %entry1, metadata !18, metadata !19), !dbg !20 call void @llvm.dbg.declare(metadata ptr %entry1, metadata !18, metadata !19), !dbg !20
store i1 0, i1* %entry1, align 8, !dbg !20 store i1 0, ptr %entry1, align 8, !dbg !20
br label %for.cond, !dbg !20 br label %for.cond, !dbg !20
for.cond: for.cond:
; CHECK: %[[PHI:.*]] = phi i1 [ false, %entry ], [ %0, %for.cond ] ; CHECK: %[[PHI:.*]] = phi i1 [ false, %entry ], [ %0, %for.cond ]
%entryN = load i1, i1* %entry1, align 8, !dbg !20 %entryN = load i1, ptr %entry1, align 8, !dbg !20
; CHECK: call void @llvm.dbg.value(metadata i1 %[[PHI]], ; CHECK: call void @llvm.dbg.value(metadata i1 %[[PHI]],
; CHECK-SAME: metadata !DIExpression()) ; CHECK-SAME: metadata !DIExpression())
%0 = add i1 %entryN, 1 %0 = add i1 %entryN, 1
; CHECK: %0 = add i1 %[[PHI]], true ; CHECK: %0 = add i1 %[[PHI]], true
; CHECK: call void @llvm.dbg.value(metadata i1 %0, ; CHECK: call void @llvm.dbg.value(metadata i1 %0,
; CHECK-SAME: metadata !DIExpression()) ; CHECK-SAME: metadata !DIExpression())
store i1 %0, i1* %entry1, align 8, !dbg !20 store i1 %0, ptr %entry1, align 8, !dbg !20
br label %for.cond, !dbg !20 br label %for.cond, !dbg !20
} }

8
llvm/test/Transforms/Mem2Reg/debug-alloca-phi.ll
View File

@ -6,20 +6,20 @@ target triple = "x86_64-apple-macosx10.12.0"
define void @scan() #0 !dbg !12 { define void @scan() #0 !dbg !12 {
entry: entry:
%entry1 = alloca i8, align 8 %entry1 = alloca i8, align 8
call void @llvm.dbg.declare(metadata i8* %entry1, metadata !18, metadata !19), !dbg !20 call void @llvm.dbg.declare(metadata ptr %entry1, metadata !18, metadata !19), !dbg !20
store i8 0, i8* %entry1, align 8, !dbg !20 store i8 0, ptr %entry1, align 8, !dbg !20
br label %for.cond, !dbg !20 br label %for.cond, !dbg !20
for.cond: for.cond:
; CHECK: %[[PHI:.*]] = phi i8 [ 0, %entry ], [ %0, %for.cond ] ; CHECK: %[[PHI:.*]] = phi i8 [ 0, %entry ], [ %0, %for.cond ]
%entryN = load i8, i8* %entry1, align 8, !dbg !20 %entryN = load i8, ptr %entry1, align 8, !dbg !20
; CHECK: call void @llvm.dbg.value(metadata i8 %[[PHI]], ; CHECK: call void @llvm.dbg.value(metadata i8 %[[PHI]],
; CHECK-SAME: metadata !DIExpression()) ; CHECK-SAME: metadata !DIExpression())
%0 = add i8 %entryN, 1 %0 = add i8 %entryN, 1
; CHECK: %0 = add i8 %[[PHI]], 1 ; CHECK: %0 = add i8 %[[PHI]], 1
; CHECK: call void @llvm.dbg.value(metadata i8 %0, ; CHECK: call void @llvm.dbg.value(metadata i8 %0,
; CHECK-SAME: metadata !DIExpression()) ; CHECK-SAME: metadata !DIExpression())
store i8 %0, i8* %entry1, align 8, !dbg !20 store i8 %0, ptr %entry1, align 8, !dbg !20
br label %for.cond, !dbg !20 br label %for.cond, !dbg !20
} }

6
llvm/test/Transforms/Mem2Reg/debug-alloca-vla-1.ll
View File

@ -27,13 +27,13 @@ define void @scan() #0 !dbg !4 {
; ;
entry: entry:
%vla1 = alloca i32, i32 1, align 8 %vla1 = alloca i32, i32 1, align 8
call void @llvm.dbg.declare(metadata i32* %vla1, metadata !10, metadata !DIExpression()), !dbg !18 call void @llvm.dbg.declare(metadata ptr %vla1, metadata !10, metadata !DIExpression()), !dbg !18
br label %for.cond, !dbg !18 br label %for.cond, !dbg !18
for.cond: ; preds = %for.cond, %entry for.cond: ; preds = %for.cond, %entry
%entryN = load i32, i32* %vla1, align 8, !dbg !18 %entryN = load i32, ptr %vla1, align 8, !dbg !18
%t0 = add i32 %entryN, 1 %t0 = add i32 %entryN, 1
store i32 %t0, i32* %vla1, align 8, !dbg !18 store i32 %t0, ptr %vla1, align 8, !dbg !18
br label %for.cond, !dbg !18 br label %for.cond, !dbg !18
} }

6
llvm/test/Transforms/Mem2Reg/debug-alloca-vla-2.ll
View File

@ -29,13 +29,13 @@ define void @scan(i32 %n) #0 !dbg !4 {
; ;
entry: entry:
%vla1 = alloca i32, i32 %n, align 8 %vla1 = alloca i32, i32 %n, align 8
call void @llvm.dbg.declare(metadata i32* %vla1, metadata !10, metadata !DIExpression()), !dbg !18 call void @llvm.dbg.declare(metadata ptr %vla1, metadata !10, metadata !DIExpression()), !dbg !18
br label %for.cond, !dbg !18 br label %for.cond, !dbg !18
for.cond: ; preds = %for.cond, %entry for.cond: ; preds = %for.cond, %entry
%entryN = load i32, i32* %vla1, align 8, !dbg !18 %entryN = load i32, ptr %vla1, align 8, !dbg !18
%t0 = add i32 %entryN, 1 %t0 = add i32 %entryN, 1
store i32 %t0, i32* %vla1, align 8, !dbg !18 store i32 %t0, ptr %vla1, align 8, !dbg !18
br label %for.cond, !dbg !18 br label %for.cond, !dbg !18
} }

72
llvm/test/Transforms/Mem2Reg/ignore-droppable.ll
View File

@ -2,83 +2,79 @@
; RUN: opt -passes=mem2reg -S -o - < %s | FileCheck %s ; RUN: opt -passes=mem2reg -S -o - < %s | FileCheck %s
declare void @llvm.assume(i1) declare void @llvm.assume(i1)
declare void @llvm.lifetime.start.p0i8(i64 %size, i8* nocapture %ptr) declare void @llvm.lifetime.start.p0(i64 %size, ptr nocapture %ptr)
declare void @llvm.lifetime.end.p0i8(i64 %size, i8* nocapture %ptr) declare void @llvm.lifetime.end.p0(i64 %size, ptr nocapture %ptr)
define void @positive_assume_uses(i32* %arg) { define void @positive_assume_uses(ptr %arg) {
; CHECK-LABEL: @positive_assume_uses( ; CHECK-LABEL: @positive_assume_uses(
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "nonnull"(i32* [[ARG:%.*]]), "ignore"(i32* undef, i64 2) ] ; CHECK-NEXT: call void @llvm.assume(i1 true) [ "nonnull"(ptr [[ARG:%.*]]), "ignore"(ptr undef, i64 2) ]
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(i32* undef, i64 8), "nonnull"(i32* [[ARG]]) ] ; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(ptr undef, i64 8), "nonnull"(ptr [[ARG]]) ]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%A = alloca i32 %A = alloca i32
call void @llvm.assume(i1 true) ["nonnull"(i32* %arg), "align"(i32* %A, i64 2)] call void @llvm.assume(i1 true) ["nonnull"(ptr %arg), "align"(ptr %A, i64 2)]
store i32 1, i32* %A store i32 1, ptr %A
call void @llvm.assume(i1 true) ["align"(i32* %A, i64 8), "nonnull"(i32* %arg)] call void @llvm.assume(i1 true) ["align"(ptr %A, i64 8), "nonnull"(ptr %arg)]
ret void ret void
} }
define void @negative_assume_condition_use() { define void @negative_assume_condition_use() {
; CHECK-LABEL: @negative_assume_condition_use( ; CHECK-LABEL: @negative_assume_condition_use(
; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4 ; CHECK-NEXT: [[A:%.*]] = alloca i32, align 4
; CHECK-NEXT: [[B:%.*]] = bitcast i32* [[A]] to i8* ; CHECK-NEXT: [[CND:%.*]] = icmp eq ptr [[A]], null
; CHECK-NEXT: [[CND:%.*]] = icmp eq i8* [[B]], null
; CHECK-NEXT: call void @llvm.assume(i1 [[CND]]) ; CHECK-NEXT: call void @llvm.assume(i1 [[CND]])
; CHECK-NEXT: store i32 1, i32* [[A]], align 4 ; CHECK-NEXT: store i32 1, ptr [[A]], align 4
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%A = alloca i32 %A = alloca i32
%B = bitcast i32* %A to i8* %cnd = icmp eq ptr %A, null
%cnd = icmp eq i8* %B, null
call void @llvm.assume(i1 %cnd) call void @llvm.assume(i1 %cnd)
store i32 1, i32* %A store i32 1, ptr %A
ret void ret void
} }
define void @positive_multiple_assume_uses() { define void @positive_multiple_assume_uses() {
; CHECK-LABEL: @positive_multiple_assume_uses( ; CHECK-LABEL: @positive_multiple_assume_uses(
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"({ i8, i16 }* undef, i64 8), "ignore"({ i8, i16 }* undef, i64 16) ] ; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(ptr undef, i64 8), "ignore"(ptr undef, i64 16) ]
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"({ i8, i16 }* undef), "ignore"({ i8, i16 }* undef, i64 2) ] ; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(ptr undef), "ignore"(ptr undef, i64 2) ]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%A = alloca {i8, i16} %A = alloca {i8, i16}
call void @llvm.assume(i1 true) ["align"({i8, i16}* %A, i64 8), "align"({i8, i16}* %A, i64 16)] call void @llvm.assume(i1 true) ["align"(ptr %A, i64 8), "align"(ptr %A, i64 16)]
store {i8, i16} zeroinitializer, {i8, i16}* %A store {i8, i16} zeroinitializer, ptr %A
call void @llvm.assume(i1 true) ["nonnull"({i8, i16}* %A), "align"({i8, i16}* %A, i64 2)] call void @llvm.assume(i1 true) ["nonnull"(ptr %A), "align"(ptr %A, i64 2)]
ret void ret void
} }
define void @positive_gep_assume_uses() { define void @positive_gep_assume_uses() {
; CHECK-LABEL: @positive_gep_assume_uses( ; CHECK-LABEL: @positive_gep_assume_uses(
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(i8* undef, i64 8), "ignore"(i8* undef, i64 16) ] ; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(ptr undef, i64 8), "ignore"(ptr undef, i64 16) ]
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(i8* undef), "ignore"(i8* undef, i64 2) ] ; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(ptr undef), "ignore"(ptr undef, i64 2) ]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%A = alloca {i8, i16} %A = alloca {i8, i16}
%B = getelementptr {i8, i16}, {i8, i16}* %A, i32 0, i32 0 %B = getelementptr {i8, i16}, ptr %A, i32 0, i32 0
call void @llvm.lifetime.start.p0i8(i64 2, i8* %B) call void @llvm.lifetime.start.p0(i64 2, ptr %B)
call void @llvm.assume(i1 true) ["align"(i8* %B, i64 8), "align"(i8* %B, i64 16)] call void @llvm.assume(i1 true) ["align"(ptr %B, i64 8), "align"(ptr %B, i64 16)]
store {i8, i16} zeroinitializer, {i8, i16}* %A store {i8, i16} zeroinitializer, ptr %A
call void @llvm.lifetime.end.p0i8(i64 2, i8* %B) call void @llvm.lifetime.end.p0(i64 2, ptr %B)
call void @llvm.assume(i1 true) ["nonnull"(i8* %B), "align"(i8* %B, i64 2)] call void @llvm.assume(i1 true) ["nonnull"(ptr %B), "align"(ptr %B, i64 2)]
ret void ret void
} }
define void @positive_mixed_assume_uses() { define void @positive_mixed_assume_uses() {
; CHECK-LABEL: @positive_mixed_assume_uses( ; CHECK-LABEL: @positive_mixed_assume_uses(
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(i8* undef), "ignore"(i8* undef, i64 8), "ignore"(i8* undef, i64 16) ] ; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(ptr undef), "ignore"(ptr undef, i64 8), "ignore"(ptr undef, i64 16) ]
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(i8* undef), "ignore"(i8* undef, i64 2), "ignore"(i8* undef) ] ; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(ptr undef), "ignore"(ptr undef, i64 2), "ignore"(ptr undef) ]
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(i32* undef), "ignore"(i32* undef, i64 2), "ignore"(i8* undef) ] ; CHECK-NEXT: call void @llvm.assume(i1 true) [ "ignore"(ptr undef), "ignore"(ptr undef, i64 2), "ignore"(ptr undef) ]
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
; ;
%A = alloca i8 %A = alloca i8
%B = getelementptr i8, i8* %A, i32 0 call void @llvm.lifetime.start.p0(i64 2, ptr %A)
%C = bitcast i8* %A to i32* call void @llvm.assume(i1 true) ["nonnull"(ptr %A), "align"(ptr %A, i64 8), "align"(ptr %A, i64 16)]
call void @llvm.lifetime.start.p0i8(i64 2, i8* %B) store i8 1, ptr %A
call void @llvm.assume(i1 true) ["nonnull"(i8* %B), "align"(i8* %A, i64 8), "align"(i8* %B, i64 16)] call void @llvm.lifetime.end.p0(i64 2, ptr %A)
store i8 1, i8* %A call void @llvm.assume(i1 true) ["nonnull"(ptr %A), "align"(ptr %A, i64 2), "nonnull"(ptr %A)]
call void @llvm.lifetime.end.p0i8(i64 2, i8* %B) call void @llvm.assume(i1 true) ["nonnull"(ptr %A), "align"(ptr %A, i64 2), "nonnull"(ptr %A)]
call void @llvm.assume(i1 true) ["nonnull"(i8* %B), "align"(i8* %A, i64 2), "nonnull"(i8* %A)]
call void @llvm.assume(i1 true) ["nonnull"(i32* %C), "align"(i32* %C, i64 2), "nonnull"(i8* %A)]
ret void ret void
} }

19
llvm/test/Transforms/Mem2Reg/ignore-lifetime.ll
View File

@ -1,16 +1,15 @@
; RUN: opt -passes=mem2reg -S -o - < %s | FileCheck %s ; RUN: opt -passes=mem2reg -S -o - < %s | FileCheck %s
declare void @llvm.lifetime.start.p0i8(i64 %size, i8* nocapture %ptr) declare void @llvm.lifetime.start.p0(i64 %size, ptr nocapture %ptr)
declare void @llvm.lifetime.end.p0i8(i64 %size, i8* nocapture %ptr) declare void @llvm.lifetime.end.p0(i64 %size, ptr nocapture %ptr)
define void @test1() { define void @test1() {
; CHECK: test1 ; CHECK: test1
; CHECK-NOT: alloca ; CHECK-NOT: alloca
%A = alloca i32 %A = alloca i32
%B = bitcast i32* %A to i8* call void @llvm.lifetime.start.p0(i64 2, ptr %A)
call void @llvm.lifetime.start.p0i8(i64 2, i8* %B) store i32 1, ptr %A
store i32 1, i32* %A call void @llvm.lifetime.end.p0(i64 2, ptr %A)
call void @llvm.lifetime.end.p0i8(i64 2, i8* %B)
ret void ret void
} }
@ -18,9 +17,9 @@ define void @test2() {
; CHECK: test2 ; CHECK: test2
; CHECK-NOT: alloca ; CHECK-NOT: alloca
%A = alloca {i8, i16} %A = alloca {i8, i16}
%B = getelementptr {i8, i16}, {i8, i16}* %A, i32 0, i32 0 %B = getelementptr {i8, i16}, ptr %A, i32 0, i32 0
call void @llvm.lifetime.start.p0i8(i64 2, i8* %B) call void @llvm.lifetime.start.p0(i64 2, ptr %B)
store {i8, i16} zeroinitializer, {i8, i16}* %A store {i8, i16} zeroinitializer, ptr %A
call void @llvm.lifetime.end.p0i8(i64 2, i8* %B) call void @llvm.lifetime.end.p0(i64 2, ptr %B)
ret void ret void
} }

16
llvm/test/Transforms/Mem2Reg/optnone.ll
View File

@ -6,16 +6,16 @@
; CHECK: alloca ; CHECK: alloca
; CHECK: alloca ; CHECK: alloca
define double @testfunc(i32 %i, double %j) optnone noinline { define double @testfunc(i32 %i, double %j) optnone noinline {
%I = alloca i32 ; <i32*> [#uses=4] %I = alloca i32 ; <ptr> [#uses=4]
%J = alloca double ; <double*> [#uses=2] %J = alloca double ; <ptr> [#uses=2]
store i32 %i, i32* %I store i32 %i, ptr %I
store double %j, double* %J store double %j, ptr %J
%t1 = load i32, i32* %I ; <i32> [#uses=1] %t1 = load i32, ptr %I ; <i32> [#uses=1]
%t2 = add i32 %t1, 1 ; <i32> [#uses=1] %t2 = add i32 %t1, 1 ; <i32> [#uses=1]
store i32 %t2, i32* %I store i32 %t2, ptr %I
%t3 = load i32, i32* %I ; <i32> [#uses=1] %t3 = load i32, ptr %I ; <i32> [#uses=1]
%t4 = sitofp i32 %t3 to double ; <double> [#uses=1] %t4 = sitofp i32 %t3 to double ; <double> [#uses=1]
%t5 = load double, double* %J ; <double> [#uses=1] %t5 = load double, ptr %J ; <double> [#uses=1]
%t6 = fmul double %t4, %t5 ; <double> [#uses=1] %t6 = fmul double %t4, %t5 ; <double> [#uses=1]
ret double %t6 ret double %t6
} }

6
llvm/test/Transforms/Mem2Reg/pr24179.ll
View File

@ -24,10 +24,10 @@ define void @test1() {
br label %loop br label %loop
loop: loop:
%v = load i32, i32* %t %v = load i32, ptr %t
%c = call i1 @use(i32 %v) %c = call i1 @use(i32 %v)
%n = call i32 @def(i32 7) %n = call i32 @def(i32 7)
store i32 %n, i32* %t store i32 %n, ptr %t
br i1 %c, label %loop, label %exit br i1 %c, label %loop, label %exit
exit: exit:
@ -51,7 +51,7 @@ define void @test2() {
br label %loop br label %loop
loop: loop:
%v = load i32, i32* %t %v = load i32, ptr %t
%c = call i1 @use(i32 %v) %c = call i1 @use(i32 %v)
br i1 %c, label %loop, label %exit br i1 %c, label %loop, label %exit

6
llvm/test/Transforms/Mem2Reg/pr37632-unreachable-list-of-stores.ll
View File

@ -12,8 +12,8 @@ define void @patatino() {
ret void ret void
cantreachme: cantreachme:
%dec = add nsw i32 %tmp, -1 %dec = add nsw i32 %tmp, -1
store i32 %dec, i32* %a store i32 %dec, ptr %a
store i32 %tmp, i32* %a store i32 %tmp, ptr %a
%tmp = load i32, i32* %a %tmp = load i32, ptr %a
br label %cantreachme br label %cantreachme
} }

114
llvm/test/Transforms/Mem2Reg/preserve-nonnull-load-metadata.ll
View File

@ -5,130 +5,130 @@
; from allocas that get optimized out. ; from allocas that get optimized out.
; Check the case where the alloca in question has a single store. ; Check the case where the alloca in question has a single store.
define float* @single_store(float** %arg) { define ptr @single_store(ptr %arg) {
; CHECK-LABEL: @single_store( ; CHECK-LABEL: @single_store(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[ARG_LOAD:%.*]] = load float*, float** [[ARG:%.*]], align 8 ; CHECK-NEXT: [[ARG_LOAD:%.*]] = load ptr, ptr [[ARG:%.*]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = icmp ne float* [[ARG_LOAD]], null ; CHECK-NEXT: [[TMP0:%.*]] = icmp ne ptr [[ARG_LOAD]], null
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]]) ; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: ret float* [[ARG_LOAD]] ; CHECK-NEXT: ret ptr [[ARG_LOAD]]
; ;
entry: entry:
%buf = alloca float* %buf = alloca ptr
%arg.load = load float*, float** %arg, align 8 %arg.load = load ptr, ptr %arg, align 8
store float* %arg.load, float** %buf, align 8 store ptr %arg.load, ptr %buf, align 8
%buf.load = load float*, float **%buf, !nonnull !0 %buf.load = load ptr, ptr %buf, !nonnull !0
ret float* %buf.load ret ptr %buf.load
} }
; Check the case where the alloca in question has more than one ; Check the case where the alloca in question has more than one
; store but still within one basic block. ; store but still within one basic block.
define float* @single_block(float** %arg) { define ptr @single_block(ptr %arg) {
; CHECK-LABEL: @single_block( ; CHECK-LABEL: @single_block(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[ARG_LOAD:%.*]] = load float*, float** [[ARG:%.*]], align 8 ; CHECK-NEXT: [[ARG_LOAD:%.*]] = load ptr, ptr [[ARG:%.*]], align 8
; CHECK-NEXT: [[TMP0:%.*]] = icmp ne float* [[ARG_LOAD]], null ; CHECK-NEXT: [[TMP0:%.*]] = icmp ne ptr [[ARG_LOAD]], null
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]]) ; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: ret float* [[ARG_LOAD]] ; CHECK-NEXT: ret ptr [[ARG_LOAD]]
; ;
entry: entry:
%buf = alloca float* %buf = alloca ptr
%arg.load = load float*, float** %arg, align 8 %arg.load = load ptr, ptr %arg, align 8
store float* null, float** %buf, align 8 store ptr null, ptr %buf, align 8
store float* %arg.load, float** %buf, align 8 store ptr %arg.load, ptr %buf, align 8
%buf.load = load float*, float **%buf, !nonnull !0 %buf.load = load ptr, ptr %buf, !nonnull !0
ret float* %buf.load ret ptr %buf.load
} }
; Check the case where the alloca in question has more than one ; Check the case where the alloca in question has more than one
; store and also reads ands writes in multiple blocks. ; store and also reads ands writes in multiple blocks.
define float* @multi_block(float** %arg) { define ptr @multi_block(ptr %arg) {
; CHECK-LABEL: @multi_block( ; CHECK-LABEL: @multi_block(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[ARG_LOAD:%.*]] = load float*, float** [[ARG:%.*]], align 8 ; CHECK-NEXT: [[ARG_LOAD:%.*]] = load ptr, ptr [[ARG:%.*]], align 8
; CHECK-NEXT: br label [[NEXT:%.*]] ; CHECK-NEXT: br label [[NEXT:%.*]]
; CHECK: next: ; CHECK: next:
; CHECK-NEXT: [[TMP0:%.*]] = icmp ne float* [[ARG_LOAD]], null ; CHECK-NEXT: [[TMP0:%.*]] = icmp ne ptr [[ARG_LOAD]], null
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]]) ; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: ret float* [[ARG_LOAD]] ; CHECK-NEXT: ret ptr [[ARG_LOAD]]
; ;
entry: entry:
%buf = alloca float* %buf = alloca ptr
%arg.load = load float*, float** %arg, align 8 %arg.load = load ptr, ptr %arg, align 8
store float* null, float** %buf, align 8 store ptr null, ptr %buf, align 8
br label %next br label %next
next: next:
store float* %arg.load, float** %buf, align 8 store ptr %arg.load, ptr %buf, align 8
%buf.load = load float*, float** %buf, !nonnull !0 %buf.load = load ptr, ptr %buf, !nonnull !0
ret float* %buf.load ret ptr %buf.load
} }
; Check that we don't add an assume if it's not ; Check that we don't add an assume if it's not
; necessary i.e. the value is already implied to be nonnull ; necessary i.e. the value is already implied to be nonnull
define float* @no_assume(float** %arg) { define ptr @no_assume(ptr %arg) {
; CHECK-LABEL: @no_assume( ; CHECK-LABEL: @no_assume(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[ARG_LOAD:%.*]] = load float*, float** [[ARG:%.*]], align 8 ; CHECK-NEXT: [[ARG_LOAD:%.*]] = load ptr, ptr [[ARG:%.*]], align 8
; CHECK-NEXT: [[CN:%.*]] = icmp ne float* [[ARG_LOAD]], null ; CHECK-NEXT: [[CN:%.*]] = icmp ne ptr [[ARG_LOAD]], null
; CHECK-NEXT: br i1 [[CN]], label [[NEXT:%.*]], label [[FIN:%.*]] ; CHECK-NEXT: br i1 [[CN]], label [[NEXT:%.*]], label [[FIN:%.*]]
; CHECK: next: ; CHECK: next:
; CHECK-NEXT: ret float* [[ARG_LOAD]] ; CHECK-NEXT: ret ptr [[ARG_LOAD]]
; CHECK: fin: ; CHECK: fin:
; CHECK-NEXT: ret float* null ; CHECK-NEXT: ret ptr null
; ;
entry: entry:
%buf = alloca float* %buf = alloca ptr
%arg.load = load float*, float** %arg, align 8 %arg.load = load ptr, ptr %arg, align 8
%cn = icmp ne float* %arg.load, null %cn = icmp ne ptr %arg.load, null
br i1 %cn, label %next, label %fin br i1 %cn, label %next, label %fin
next: next:
; At this point the above nonnull check ensures that ; At this point the above nonnull check ensures that
; the value %arg.load is nonnull in this block and thus ; the value %arg.load is nonnull in this block and thus
; we need not add the assume. ; we need not add the assume.
store float* %arg.load, float** %buf, align 8 store ptr %arg.load, ptr %buf, align 8
%buf.load = load float*, float** %buf, !nonnull !0 %buf.load = load ptr, ptr %buf, !nonnull !0
ret float* %buf.load ret ptr %buf.load
fin: fin:
ret float* null ret ptr null
} }
define float* @no_store_single_load() { define ptr @no_store_single_load() {
; CHECK-LABEL: @no_store_single_load( ; CHECK-LABEL: @no_store_single_load(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = icmp ne float* undef, null ; CHECK-NEXT: [[TMP0:%.*]] = icmp ne ptr undef, null
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]]) ; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: ret float* undef ; CHECK-NEXT: ret ptr undef
; ;
entry: entry:
%buf = alloca float* %buf = alloca ptr
%buf.load = load float*, float **%buf, !nonnull !0 %buf.load = load ptr, ptr %buf, !nonnull !0
ret float* %buf.load ret ptr %buf.load
} }
define float* @no_store_multiple_loads(i1 %c) { define ptr @no_store_multiple_loads(i1 %c) {
; CHECK-LABEL: @no_store_multiple_loads( ; CHECK-LABEL: @no_store_multiple_loads(
; CHECK-NEXT: entry: ; CHECK-NEXT: entry:
; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[ELSE:%.*]] ; CHECK-NEXT: br i1 [[C:%.*]], label [[IF:%.*]], label [[ELSE:%.*]]
; CHECK: if: ; CHECK: if:
; CHECK-NEXT: [[TMP0:%.*]] = icmp ne float* undef, null ; CHECK-NEXT: [[TMP0:%.*]] = icmp ne ptr undef, null
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]]) ; CHECK-NEXT: call void @llvm.assume(i1 [[TMP0]])
; CHECK-NEXT: ret float* undef ; CHECK-NEXT: ret ptr undef
; CHECK: else: ; CHECK: else:
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne float* undef, null ; CHECK-NEXT: [[TMP1:%.*]] = icmp ne ptr undef, null
; CHECK-NEXT: call void @llvm.assume(i1 [[TMP1]]) ; CHECK-NEXT: call void @llvm.assume(i1 [[TMP1]])
; CHECK-NEXT: ret float* undef ; CHECK-NEXT: ret ptr undef
; ;
entry: entry:
%buf = alloca float* %buf = alloca ptr
br i1 %c, label %if, label %else br i1 %c, label %if, label %else
if: if:
%buf.load = load float*, float **%buf, !nonnull !0 %buf.load = load ptr, ptr %buf, !nonnull !0
ret float* %buf.load ret ptr %buf.load
else: else:
%buf.load2 = load float*, float **%buf, !nonnull !0 %buf.load2 = load ptr, ptr %buf, !nonnull !0
ret float* %buf.load2 ret ptr %buf.load2
} }
!0 = !{} !0 = !{}

6
llvm/test/Transforms/Mem2Reg/undef-order.ll
View File

@ -63,7 +63,7 @@ Block4:
Block5: Block5:
br label %Join br label %Join
Store1: Store1:
store i32 1, i32* %val store i32 1, ptr %val
br label %Join br label %Join
Block6: Block6:
br label %Join br label %Join
@ -76,7 +76,7 @@ Block9:
Block10: Block10:
br label %Join br label %Join
Store2: Store2:
store i32 2, i32* %val store i32 2, ptr %val
br label %Join br label %Join
Block11: Block11:
br label %Join br label %Join
@ -92,6 +92,6 @@ Block16:
br label %Join br label %Join
Join: Join:
; Phi inserted here should have operands appended deterministically ; Phi inserted here should have operands appended deterministically
%result = load i32, i32* %val %result = load i32, ptr %val
ret i32 %result ret i32 %result
} }