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[x86] add tests for disguised horizontal ops; NFC

This commit is contained in:
Sanjay Patel 2020-05-18 13:56:15 -04:00
parent 50f3bb1329
commit 9d7838d781
1 changed files with 41 additions and 0 deletions
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41
llvm/test/CodeGen/X86/haddsub-undef.ll
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@ -829,3 +829,44 @@ define <4 x double> @PR44694(<4 x double> %0, <4 x double> %1) {
%5 = fadd <4 x double> %3, %4
ret <4 x double> %5
}
define <4 x float> @PR45747_1(<4 x float> %a, <4 x float> %b) nounwind {
; SSE-LABEL: PR45747_1:
; SSE: # %bb.0:
; SSE-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
; SSE-NEXT: addps %xmm0, %xmm1
; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2,2,3]
; SSE-NEXT: movaps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: PR45747_1:
; AVX: # %bb.0:
; AVX-NEXT: vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
; AVX-NEXT: vaddps %xmm0, %xmm1, %xmm0
; AVX-NEXT: vpermilps {{.*#+}} xmm0 = xmm0[0,2,2,3]
; AVX-NEXT: retq
%t0 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 3, i32 undef>
%t1 = fadd <4 x float> %t0, %a
%shuffle = shufflevector <4 x float> %t1, <4 x float> undef, <4 x i32> <i32 undef, i32 2, i32 undef, i32 undef>
ret <4 x float> %shuffle
}
define <4 x float> @PR45747_2(<4 x float> %a, <4 x float> %b) nounwind {
; SSE-LABEL: PR45747_2:
; SSE: # %bb.0:
; SSE-NEXT: movshdup {{.*#+}} xmm0 = xmm1[1,1,3,3]
; SSE-NEXT: addps %xmm1, %xmm0
; SSE-NEXT: movhlps {{.*#+}} xmm0 = xmm0[1,1]
; SSE-NEXT: retq
;
; AVX-LABEL: PR45747_2:
; AVX: # %bb.0:
; AVX-NEXT: vmovshdup {{.*#+}} xmm0 = xmm1[1,1,3,3]
; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
; AVX-NEXT: retq
%t0 = shufflevector <4 x float> %b, <4 x float> undef, <4 x i32> <i32 undef, i32 undef, i32 3, i32 undef>
%t1 = fadd <4 x float> %t0, %b
%shuffle = shufflevector <4 x float> %t1, <4 x float> undef, <4 x i32> <i32 2, i32 undef, i32 undef, i32 undef>
ret <4 x float> %shuffle
}