forked from OSchip/llvm-project
parent
af1cbdd3ba
commit
9d7379c250
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@ -1,11 +1,14 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-- | FileCheck %s
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define i32 @t1(i8* %X, i32 %i) {
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; CHECK-LABEL: t1:
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; CHECK-NOT: and
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; CHECK: movzbl
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; CHECK: movl (%{{...}},%{{...}},4),
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; CHECK: ret
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movzbl %cl, %ecx
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; CHECK-NEXT: movl (%eax,%ecx,4), %eax
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; CHECK-NEXT: retl
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entry:
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%tmp2 = shl i32 %i, 2
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@ -18,10 +21,12 @@ entry:
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define i32 @t2(i16* %X, i32 %i) {
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; CHECK-LABEL: t2:
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; CHECK-NOT: and
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; CHECK: movzwl
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; CHECK: movl (%{{...}},%{{...}},4),
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; CHECK: ret
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movzwl %cx, %ecx
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; CHECK-NEXT: movl (%eax,%ecx,4), %eax
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; CHECK-NEXT: retl
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entry:
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%tmp2 = shl i32 %i, 1
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@ -40,10 +45,14 @@ define i32 @t3(i16* %i.ptr, i32* %arr) {
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; the function, the DAG can get confusing trying to re-use both of them and
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; prevent easy analysis of the mask in order to match this.
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; CHECK-LABEL: t3:
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; CHECK-NOT: and
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; CHECK: shrl
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; CHECK: addl (%{{...}},%{{...}},4),
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; CHECK: ret
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movzwl (%eax), %eax
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: shrl $11, %edx
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; CHECK-NEXT: addl (%ecx,%edx,4), %eax
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; CHECK-NEXT: retl
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entry:
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%i = load i16, i16* %i.ptr
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@ -59,10 +68,15 @@ define i32 @t4(i16* %i.ptr, i32* %arr) {
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; A version of @t3 that has more zero extends and more re-use of intermediate
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; values. This exercise slightly different bits of canonicalization.
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; CHECK-LABEL: t4:
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; CHECK-NOT: and
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; CHECK: shrl
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; CHECK: addl (%{{...}},%{{...}},4),
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; CHECK: ret
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movzwl (%eax), %eax
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; CHECK-NEXT: movl %eax, %edx
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; CHECK-NEXT: shrl $11, %edx
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; CHECK-NEXT: addl (%ecx,%edx,4), %eax
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; CHECK-NEXT: addl %edx, %eax
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; CHECK-NEXT: retl
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entry:
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%i = load i16, i16* %i.ptr
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