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[PowerPC][HTM]Fix $zero is not a GPRC register for builtin_ttest 

This was found during HTM cleanup.
Adding a test for builtin_ttest would expose following issue.

*** Bad machine code: Illegal physical register for instruction ***
 - function:    test10
 - basic block: %bb.0 entry (0xf0e57497b58)
 - instruction: %5:crrc0 = TABORTWCI 0, $zero, 0
 - operand 2:   $zero
  $zero is not a GPRC register.
LLVM ERROR: Found 1 machine code errors.

Differential Revision: https://reviews.llvm.org/D63079

llvm-svn: 362974
This commit is contained in:
Jinsong Ji 2019-06-10 19:04:14 +00:00
parent f8f9d65f85
commit 9c7f93e914
2 changed files with 4 additions and 1 deletions
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2
llvm/lib/Target/PowerPC/PPCInstrHTM.td
View File

@ -166,6 +166,6 @@ def : Pat<(int_ppc_tsuspend),
(TSR 0)>;
def : Pat<(i64 (int_ppc_ttest)),
(RLDICL (i64 (COPY (TABORTWCI 0, ZERO, 0))), 36, 28)>;
(RLDICL (i64 (COPY (TABORTWCI 0, (LI 0), 0))), 36, 28)>;
} // [HasHTM]

3
llvm/test/CodeGen/PowerPC/htm.ll
View File

@ -57,16 +57,19 @@ entry:
%0 = tail call i32 @llvm.ppc.tendall()
%1 = tail call i32 @llvm.ppc.tresume()
%2 = tail call i32 @llvm.ppc.tsuspend()
%3 = tail call i64 @llvm.ppc.ttest()
ret void
; CHECK-LABEL: @test4
; CHECK: tend. 1
; CHECK: tsr. 1
; CHECK: tsr. 0
; CHECK: tabortwci. 0, {{[0-9]+}}, 0
}
declare i32 @llvm.ppc.tendall()
declare i32 @llvm.ppc.tresume()
declare i32 @llvm.ppc.tsuspend()
declare i64 @llvm.ppc.ttest()
define void @test5(i64 %v) {