forked from OSchip/llvm-project
[mips] synci microMIPS instruction definition.
Add synci to the microMIPS instruction definitions, mark the MIPS sync & synci as not being part of microMIPS. This does not cover the sync instruction alias, as that will be handled with a different patch. Add sync to the valid tests for microMIPS. Reviewers: vkalintiris Differential Revision: https://reviews.llvm.org/D25795 llvm-svn: 284962
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@ -599,6 +599,17 @@ class SYNC_FM_MM : MMArch {
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let Inst{5-0} = 0x3c;
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}
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class SYNCI_FM_MM : MMArch {
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bits<5> rs;
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bits<16> offset;
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bits<32> Inst;
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let Inst{31-26} = 0b010000;
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let Inst{25-21} = 0b10000;
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let Inst{20-16} = rs;
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let Inst{15-0} = offset;
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}
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class BRK_FM_MM : MMArch {
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bits<10> code_1;
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bits<10> code_2;
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@ -927,6 +927,7 @@ let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in {
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/// Control Instructions
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def SYNC_MM : MMRel, SYNC_FT<"sync">, SYNC_FM_MM;
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def SYNCI_MM : MMRel, SYNCI_FT<"synci">, SYNCI_FM_MM;
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def BREAK_MM : MMRel, BRK_FT<"break">, BRK_FM_MM;
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def SYSCALL_MM : MMRel, SYS_FT<"syscall", uimm10, II_SYSCALL>, SYS_FM_MM;
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def WAIT_MM : WaitMM<"wait">, WAIT_FM_MM;
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@ -1874,10 +1874,10 @@ let DecoderNamespace = "COP3_" in {
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def SDC3 : SW_FT3<"sdc3", COP3Opnd, II_SDC3, store>, LW_FM<0x3f>,
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ISA_MIPS2;
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}
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}
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def SYNC : MMRel, StdMMR6Rel, SYNC_FT<"sync">, SYNC_FM, ISA_MIPS2;
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def SYNCI : MMRel, StdMMR6Rel, SYNCI_FT<"synci">, SYNCI_FM, ISA_MIPS32R2;
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def SYNC : MMRel, StdMMR6Rel, SYNC_FT<"sync">, SYNC_FM, ISA_MIPS2;
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def SYNCI : MMRel, StdMMR6Rel, SYNCI_FT<"synci">, SYNCI_FM, ISA_MIPS32R2;
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}
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let AdditionalPredicates = [NotInMicroMips] in {
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def TEQ : MMRel, TEQ_FT<"teq", GPR32Opnd, uimm10, II_TEQ>, TEQ_FM<0x34>, ISA_MIPS2;
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@ -207,3 +207,7 @@ recip.s $f2, $f4 # CHECK: recip.s $f2, $f4 # encoding: [0x54,0x
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recip.d $f2, $f4 # CHECK: recip.d $f2, $f4 # encoding: [0x54,0x44,0x52,0x3b]
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rsqrt.s $f3, $f5 # CHECK: rsqrt.s $f3, $f5 # encoding: [0x54,0x65,0x02,0x3b]
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rsqrt.d $f2, $f4 # CHECK: rsqrt.d $f2, $f4 # encoding: [0x54,0x44,0x42,0x3b]
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sync # CHECK: sync # encoding: [0x00,0x00,0x6b,0x7c]
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sync 0 # CHECK: sync 0 # encoding: [0x00,0x00,0x6b,0x7c]
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sync 1 # CHECK: sync 1 # encoding: [0x00,0x01,0x6b,0x7c]
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synci 64($5) # CHECK: synci 64($5) # encoding: [0x42,0x00,0x00,0x40]
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