forked from OSchip/llvm-project
[X86][SSE] getTargetShuffleInputs - move VT.isSimple/isVector checks inside. NFCI.
Stop all the callers from having to check the value type before calling getTargetShuffleInputs. llvm-svn: 373915
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@ -7259,6 +7259,10 @@ static bool getTargetShuffleInputs(SDValue Op, const APInt &DemandedElts,
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SmallVectorImpl<int> &Mask,
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SelectionDAG &DAG, unsigned Depth,
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bool ResolveZero) {
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EVT VT = Op.getValueType();
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if (!VT.isSimple() || !VT.isVector())
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return false;
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APInt KnownUndef, KnownZero;
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if (getTargetShuffleAndZeroables(Op, Mask, Inputs, KnownUndef, KnownZero)) {
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for (int i = 0, e = Mask.size(); i != e; ++i) {
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@ -7280,6 +7284,10 @@ static bool getTargetShuffleInputs(SDValue Op, SmallVectorImpl<SDValue> &Inputs,
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SmallVectorImpl<int> &Mask,
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SelectionDAG &DAG, unsigned Depth = 0,
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bool ResolveZero = true) {
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EVT VT = Op.getValueType();
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if (!VT.isSimple() || !VT.isVector())
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return false;
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unsigned NumElts = Op.getValueType().getVectorNumElements();
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APInt DemandedElts = APInt::getAllOnesValue(NumElts);
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return getTargetShuffleInputs(Op, DemandedElts, Inputs, Mask, DAG, Depth,
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@ -34574,8 +34582,8 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
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// Get target/faux shuffle mask.
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SmallVector<int, 64> OpMask;
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SmallVector<SDValue, 2> OpInputs;
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if (!VT.isSimple() || !getTargetShuffleInputs(Op, DemandedElts, OpInputs,
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OpMask, TLO.DAG, Depth, false))
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if (!getTargetShuffleInputs(Op, DemandedElts, OpInputs, OpMask, TLO.DAG,
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Depth, false))
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return false;
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// Shuffle inputs must be the same size as the result.
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@ -34954,8 +34962,7 @@ SDValue X86TargetLowering::SimplifyMultipleUseDemandedBitsForTargetNode(
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SmallVector<int, 16> ShuffleMask;
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SmallVector<SDValue, 2> ShuffleOps;
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if (VT.isSimple() && VT.isVector() &&
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getTargetShuffleInputs(Op, ShuffleOps, ShuffleMask, DAG, Depth)) {
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if (getTargetShuffleInputs(Op, ShuffleOps, ShuffleMask, DAG, Depth)) {
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// If all the demanded elts are from one operand and are inline,
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// then we can use the operand directly.
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int NumOps = ShuffleOps.size();
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