forked from OSchip/llvm-project
parent
2362b69dd9
commit
9c10414ce0
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@ -19,10 +19,10 @@
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; LINKAGE1: .section .debug_info
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; LINKAGE1: .section .debug_info
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; LINKAGE1: DW_TAG_variable
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; LINKAGE1: DW_TAG_variable
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; LINKAGE1-NOT: DW_TAG
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; LINKAGE1-NOT: DW_TAG
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; LINKAGE1: {{DW_AT_(MIPS_)*linkage_name}}
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; LINKAGE1: {{DW_AT_(MIPS_)?linkage_name}}
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; LINKAGE1: DW_TAG_subprogram
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; LINKAGE1: DW_TAG_subprogram
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; LINKAGE1-NOT: DW_TAG
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; LINKAGE1-NOT: DW_TAG
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; LINKAGE1: {{DW_AT_(MIPS_)*linkage_name}}
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; LINKAGE1: {{DW_AT_(MIPS_)?linkage_name}}
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; LINKAGE1: .section
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; LINKAGE1: .section
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; Also verify we see the mangled names. We do this as a separate pass to
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; Also verify we see the mangled names. We do this as a separate pass to
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@ -34,7 +34,7 @@
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; Without linkage names, verify there aren't any linkage-name attributes,
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; Without linkage names, verify there aren't any linkage-name attributes,
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; and no mangled names.
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; and no mangled names.
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; NOLINKAGE-NOT: {{DW_AT_(MIPS_)*linkage_name}}
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; NOLINKAGE-NOT: {{DW_AT_(MIPS_)?linkage_name}}
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; NOLINKAGE-NOT: .asciz "_ZN4test10global_varE"
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; NOLINKAGE-NOT: .asciz "_ZN4test10global_varE"
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; NOLINKAGE-NOT: .asciz "_ZN4test3barEv"
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; NOLINKAGE-NOT: .asciz "_ZN4test3barEv"
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