forked from OSchip/llvm-project
[DAGCombiner] Masked merge: enhance handling of 'andn' with immediates
Summary: Split off from D46031. The previous patch, D46493, completely disabled unfolding in case of immediates. But we can do better: {F6120274} {F6120277} https://rise4fun.com/Alive/xJS Reviewers: spatel, craig.topper Reviewed By: spatel Subscribers: andreadb, llvm-commits Differential Revision: https://reviews.llvm.org/D46494 llvm-svn: 331685
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@ -5372,6 +5372,9 @@ SDValue DAGCombiner::MatchLoadCombine(SDNode *N) {
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// | D |
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// Into:
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// (x & m) | (y & ~m)
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// If y is a constant, and the 'andn' does not work with immediates,
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// we unfold into a different pattern:
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// ~(~x & m) & (m | y)
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// NOTE: we don't unfold the pattern if 'xor' is actually a 'not', because at
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// the very least that breaks andnpd / andnps patterns, and because those
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// patterns are simplified in IR and shouldn't be created in the DAG
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@ -5428,12 +5431,19 @@ SDValue DAGCombiner::unfoldMaskedMerge(SDNode *N) {
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if (!TLI.hasAndNot(M))
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return SDValue();
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// If Y is a constant, check that 'andn' works with immediates.
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if (!TLI.hasAndNot(Y))
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return SDValue();
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SDLoc DL(N);
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// If Y is a constant, check that 'andn' works with immediates.
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if (!TLI.hasAndNot(Y)) {
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assert(TLI.hasAndNot(X) && "Only mask is a variable? Unreachable.");
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// If not, we need to do a bit more work to make sure andn is still used.
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SDValue NotX = DAG.getNOT(DL, X, VT);
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SDValue LHS = DAG.getNode(ISD::AND, DL, VT, NotX, M);
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SDValue NotLHS = DAG.getNOT(DL, LHS, VT);
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SDValue RHS = DAG.getNode(ISD::OR, DL, VT, M, Y);
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return DAG.getNode(ISD::AND, DL, VT, NotLHS, RHS);
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}
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SDValue LHS = DAG.getNode(ISD::AND, DL, VT, X, M);
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SDValue NotM = DAG.getNOT(DL, M, VT);
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SDValue RHS = DAG.getNode(ISD::AND, DL, VT, Y, NotM);
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@ -657,10 +657,9 @@ define i32 @in_constant_varx_42(i32 %x, i32 %y, i32 %mask) {
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;
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; CHECK-BMI-LABEL: in_constant_varx_42:
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; CHECK-BMI: # %bb.0:
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; CHECK-BMI-NEXT: xorl $42, %edi
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; CHECK-BMI-NEXT: andl %edx, %edi
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; CHECK-BMI-NEXT: xorl $42, %edi
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; CHECK-BMI-NEXT: movl %edi, %eax
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; CHECK-BMI-NEXT: andnl %edx, %edi, %eax
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; CHECK-BMI-NEXT: orl $42, %edx
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; CHECK-BMI-NEXT: andnl %edx, %eax, %eax
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; CHECK-BMI-NEXT: retq
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%n0 = xor i32 %x, 42 ; %x
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%n1 = and i32 %n0, %mask
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@ -704,9 +703,10 @@ define i32 @in_constant_varx_42_invmask(i32 %x, i32 %y, i32 %mask) {
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;
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; CHECK-BMI-LABEL: in_constant_varx_42_invmask:
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; CHECK-BMI: # %bb.0:
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; CHECK-BMI-NEXT: xorl $42, %edi
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; CHECK-BMI-NEXT: andnl %edi, %edx, %eax
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; CHECK-BMI-NEXT: xorl $42, %eax
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; CHECK-BMI-NEXT: notl %edx
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; CHECK-BMI-NEXT: andnl %edx, %edi, %eax
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; CHECK-BMI-NEXT: orl $42, %edx
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; CHECK-BMI-NEXT: andnl %edx, %eax, %eax
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; CHECK-BMI-NEXT: retq
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%notmask = xor i32 %mask, -1
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%n0 = xor i32 %x, 42 ; %x
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