maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

[DAGCombiner] Masked merge: enhance handling of 'andn' with immediates 

Summary:
Split off from D46031.

The previous patch, D46493, completely disabled unfolding in case of immediates.
But we can do better:
{F6120274} {F6120277}

https://rise4fun.com/Alive/xJS

Reviewers: spatel, craig.topper

Reviewed By: spatel

Subscribers: andreadb, llvm-commits

Differential Revision: https://reviews.llvm.org/D46494

llvm-svn: 331685
This commit is contained in:
Roman Lebedev 2018-05-07 21:52:22 +00:00
parent cc42d08b1d
commit 9bd6067db6
2 changed files with 21 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
View File

@ -5372,6 +5372,9 @@ SDValue DAGCombiner::MatchLoadCombine(SDNode *N) {
// | D | // | D |
// Into: // Into:
// (x & m) | (y & ~m) // (x & m) | (y & ~m)
// If y is a constant, and the 'andn' does not work with immediates,
// we unfold into a different pattern:
// ~(~x & m) & (m | y)
// NOTE: we don't unfold the pattern if 'xor' is actually a 'not', because at // NOTE: we don't unfold the pattern if 'xor' is actually a 'not', because at
// the very least that breaks andnpd / andnps patterns, and because those // the very least that breaks andnpd / andnps patterns, and because those
// patterns are simplified in IR and shouldn't be created in the DAG // patterns are simplified in IR and shouldn't be created in the DAG
@ -5428,12 +5431,19 @@ SDValue DAGCombiner::unfoldMaskedMerge(SDNode *N) {
if (!TLI.hasAndNot(M)) if (!TLI.hasAndNot(M))
return SDValue(); return SDValue();
// If Y is a constant, check that 'andn' works with immediates.
if (!TLI.hasAndNot(Y))
return SDValue();
SDLoc DL(N); SDLoc DL(N);
// If Y is a constant, check that 'andn' works with immediates.
if (!TLI.hasAndNot(Y)) {
assert(TLI.hasAndNot(X) && "Only mask is a variable? Unreachable.");
// If not, we need to do a bit more work to make sure andn is still used.
SDValue NotX = DAG.getNOT(DL, X, VT);
SDValue LHS = DAG.getNode(ISD::AND, DL, VT, NotX, M);
SDValue NotLHS = DAG.getNOT(DL, LHS, VT);
SDValue RHS = DAG.getNode(ISD::OR, DL, VT, M, Y);
return DAG.getNode(ISD::AND, DL, VT, NotLHS, RHS);
}
SDValue LHS = DAG.getNode(ISD::AND, DL, VT, X, M); SDValue LHS = DAG.getNode(ISD::AND, DL, VT, X, M);
SDValue NotM = DAG.getNOT(DL, M, VT); SDValue NotM = DAG.getNOT(DL, M, VT);
SDValue RHS = DAG.getNode(ISD::AND, DL, VT, Y, NotM); SDValue RHS = DAG.getNode(ISD::AND, DL, VT, Y, NotM);

14
llvm/test/CodeGen/X86/unfold-masked-merge-scalar-variablemask.ll
View File

@ -657,10 +657,9 @@ define i32 @in_constant_varx_42(i32 %x, i32 %y, i32 %mask) {
; ;
; CHECK-BMI-LABEL: in_constant_varx_42: ; CHECK-BMI-LABEL: in_constant_varx_42:
; CHECK-BMI: # %bb.0: ; CHECK-BMI: # %bb.0:
; CHECK-BMI-NEXT: xorl $42, %edi ; CHECK-BMI-NEXT: andnl %edx, %edi, %eax
; CHECK-BMI-NEXT: andl %edx, %edi ; CHECK-BMI-NEXT: orl $42, %edx
; CHECK-BMI-NEXT: xorl $42, %edi ; CHECK-BMI-NEXT: andnl %edx, %eax, %eax
; CHECK-BMI-NEXT: movl %edi, %eax
; CHECK-BMI-NEXT: retq ; CHECK-BMI-NEXT: retq
%n0 = xor i32 %x, 42 ; %x %n0 = xor i32 %x, 42 ; %x
%n1 = and i32 %n0, %mask %n1 = and i32 %n0, %mask
@ -704,9 +703,10 @@ define i32 @in_constant_varx_42_invmask(i32 %x, i32 %y, i32 %mask) {
; ;
; CHECK-BMI-LABEL: in_constant_varx_42_invmask: ; CHECK-BMI-LABEL: in_constant_varx_42_invmask:
; CHECK-BMI: # %bb.0: ; CHECK-BMI: # %bb.0:
; CHECK-BMI-NEXT: xorl $42, %edi ; CHECK-BMI-NEXT: notl %edx
; CHECK-BMI-NEXT: andnl %edi, %edx, %eax ; CHECK-BMI-NEXT: andnl %edx, %edi, %eax
; CHECK-BMI-NEXT: xorl $42, %eax ; CHECK-BMI-NEXT: orl $42, %edx
; CHECK-BMI-NEXT: andnl %edx, %eax, %eax
; CHECK-BMI-NEXT: retq ; CHECK-BMI-NEXT: retq
%notmask = xor i32 %mask, -1 %notmask = xor i32 %mask, -1
%n0 = xor i32 %x, 42 ; %x %n0 = xor i32 %x, 42 ; %x