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Added 64-bit POSIX support to write floating-point vector registers. 

- Includes tests that write, read and verify vector register content.
            
Reviewed by: Daniel Malea

llvm-svn: 180143
This commit is contained in:
Ashok Thirumurthi 2013-04-23 20:50:34 +00:00
parent 906f2cbc65
commit 9ba77246ca
2 changed files with 27 additions and 2 deletions
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10
lldb/source/Plugins/Process/POSIX/RegisterContext_x86_64.cpp
View File

@ -698,7 +698,15 @@ RegisterContext_x86_64::WriteRegister(const lldb_private::RegisterInfo *reg_info
switch (reg)
{
default:
return false;
if (reg_info->encoding != eEncodingVector)
return false;
if (reg >= fpu_stmm0 && reg <= fpu_stmm7)
::memcpy (user.i387.stmm[reg - fpu_stmm0].bytes, value.GetBytes(), value.GetByteSize());
if (reg >= fpu_xmm0 && reg <= fpu_xmm15)
::memcpy (user.i387.xmm[reg - fpu_xmm0].bytes, value.GetBytes(), value.GetByteSize());
break;
case fpu_dp:
user.i387.dp = value.GetAsUInt64();
break;

19
lldb/test/functionalities/register/TestRegisters.py
View File

@ -91,6 +91,14 @@ class RegisterCommandsTestCase(TestBase):
self.expect("register read " + register,
substrs = [register + ' = 0x'])
def vector_write_and_read(self, frame, register, new_value):
value = frame.FindValue(register, lldb.eValueTypeRegister)
self.assertTrue(value.IsValid(), "finding a value for register " + register)
self.runCmd("register write " + register + " \'" + new_value + "\'")
self.expect("register read " + register,
substrs = [register + ' = ', new_value])
def fp_register_write(self):
exe = os.path.join(os.getcwd(), "a.out")
@ -121,7 +129,16 @@ class RegisterCommandsTestCase(TestBase):
self.write_and_restore(currentFrame, "mxcsr")
self.write_and_restore(currentFrame, "mxcsrmask")
@expectedFailureLinux # bugzilla 14661 - Expressions involving XMM registers fail on Linux
new_value = "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x00 0x00}"
self.vector_write_and_read(currentFrame, "stmm0", new_value)
new_value = "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a}"
self.vector_write_and_read(currentFrame, "stmm7", new_value)
new_value = "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a 0x2f 0x2f 0x2f 0x2f 0x2f 0x2f}"
self.vector_write_and_read(currentFrame, "xmm0", new_value)
new_value = "{0x01 0x02 0x03 0x00 0x00 0x00 0x00 0x00 0x09 0x0a 0x2f 0x2f 0x2f 0x2f 0x0e 0x0f}"
self.vector_write_and_read(currentFrame, "xmm15", new_value)
def register_expressions(self):
"""Test expression evaluation with commands related to registers."""
self.common_setup()