forked from OSchip/llvm-project
Use pcmpeq to generate vector of all ones.
llvm-svn: 27167
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@ -2364,6 +2364,10 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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abort();
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}
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case ISD::BUILD_VECTOR: {
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// All one's are handled with pcmpeqd.
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if (ISD::isBuildVectorAllOnes(Op.Val))
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return Op;
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std::set<SDOperand> Values;
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SDOperand Elt0 = Op.getOperand(0);
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Values.insert(Elt0);
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@ -1008,6 +1008,10 @@ def V_SET0_PD : PDI<0x57, MRMInitReg, (ops VR128:$dst),
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"xorpd $dst, $dst",
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[(set VR128:$dst, (v2f64 immAllZerosV))]>;
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def V_SETALLONES : PDI<0x76, MRMInitReg, (ops VR128:$dst),
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"pcmpeqd $dst, $dst",
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[(set VR128:$dst, (v2f64 immAllOnesV))]>;
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// Scalar to 128-bit vector with zero extension.
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// Three operand (but two address) aliases.
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let isTwoAddress = 1 in {
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@ -1051,6 +1055,13 @@ def : Pat<(v16i8 immAllZerosV), (v16i8 (V_SET0_PI))>, Requires<[HasSSE2]>;
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def : Pat<(v8i16 immAllZerosV), (v8i16 (V_SET0_PI))>, Requires<[HasSSE2]>;
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def : Pat<(v4i32 immAllZerosV), (v4i32 (V_SET0_PI))>, Requires<[HasSSE2]>;
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// 128-bit vector all one's.
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def : Pat<(v16i8 immAllOnesV), (v16i8 (V_SETALLONES))>, Requires<[HasSSE2]>;
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def : Pat<(v8i16 immAllOnesV), (v8i16 (V_SETALLONES))>, Requires<[HasSSE2]>;
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def : Pat<(v4i32 immAllOnesV), (v4i32 (V_SETALLONES))>, Requires<[HasSSE2]>;
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def : Pat<(v2i64 immAllOnesV), (v2i64 (V_SETALLONES))>, Requires<[HasSSE2]>;
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def : Pat<(v4f32 immAllOnesV), (v4f32 (V_SETALLONES))>, Requires<[HasSSE1]>;
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// Load 128-bit integer vector values.
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def : Pat<(v16i8 (load addr:$src)), (MOVDQArm addr:$src)>,
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Requires<[HasSSE2]>;
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