maxjhandsome
/
llvm-project
forked from OSchip/llvm-project
1
0
Fork 0
Code Issues Pull Requests Packages Releases Wiki Activity

Revert part of "AArch64: Do not test for CPUs, use SubtargetFeatures" 

This reverts part of commit 119e358d9635c8d1f3e7aee67e3ea3b8a62f8db6 by
removing FeatureUseRSqrt et al per request by Eric Christopher
<echristo@gmail.com> (v. http://bit.ly/2cmz6kW).

llvm-svn: 282001
This commit is contained in:
Evandro Menezes 2016-09-20 19:02:09 +00:00
parent ba4926efde
commit 9b5d89513b
2 changed files with 0 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
llvm/lib/Target/AArch64/AArch64.td
View File

@ -102,9 +102,6 @@ def FeatureDisableLatencySchedHeuristic : SubtargetFeature<
"disable-latency-sched-heuristic", "DisableLatencySchedHeuristic", "true",
"Disable latency scheduling heuristic">;
def FeatureUseRSqrt : SubtargetFeature<
"use-reverse-square-root", "UseRSqrt", "true", "Use reverse square root">;
//===----------------------------------------------------------------------===//
// Architectures.
//
@ -225,7 +222,6 @@ def ProcExynosM1 : SubtargetFeature<"exynosm1", "ARMProcFamily", "ExynosM1",
FeatureNEON,
FeaturePerfMon,
FeaturePostRAScheduler,
FeatureUseRSqrt,
FeatureZCZeroing
]>;

2
llvm/lib/Target/AArch64/AArch64Subtarget.h
View File

@ -82,7 +82,6 @@ protected:
bool UseAlternateSExtLoadCVTF32Pattern = false;
bool HasMacroOpFusion = false;
bool DisableLatencySchedHeuristic = false;
bool UseRSqrt = false;
uint8_t MaxInterleaveFactor = 2;
uint8_t VectorInsertExtractBaseCost = 3;
uint16_t CacheLineSize = 0;
@ -191,7 +190,6 @@ public:
return UseAlternateSExtLoadCVTF32Pattern;
}
bool hasMacroOpFusion() const { return HasMacroOpFusion; }
bool useRSqrt() const { return UseRSqrt; }
unsigned getMaxInterleaveFactor() const { return MaxInterleaveFactor; }
unsigned getVectorInsertExtractBaseCost() const {
return VectorInsertExtractBaseCost;