forked from OSchip/llvm-project
[VectorLegalizer] Remove broken code in ExpandStore.
The code that is supposed to "Round odd types to the next pow of two" seems broken and as well completely unused (untested). It also seems that ExpandStore really shouldn't ever change the memory VT, which this in fact does. As a first step in fixing the broken handling of vector stores (of irregular types, e.g. an i1 vector), this code is removed. For discussion, see https://bugs.llvm.org/show_bug.cgi?id=35520. Review: Eli Friedman llvm-svn: 322275
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@ -663,34 +663,6 @@ SDValue VectorLegalizer::ExpandLoad(SDValue Op) {
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SDValue VectorLegalizer::ExpandStore(SDValue Op) {
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StoreSDNode *ST = cast<StoreSDNode>(Op.getNode());
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EVT StVT = ST->getMemoryVT();
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EVT MemSclVT = StVT.getScalarType();
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unsigned ScalarSize = MemSclVT.getSizeInBits();
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// Round odd types to the next pow of two.
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if (!isPowerOf2_32(ScalarSize)) {
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// FIXME: This is completely broken and inconsistent with ExpandLoad
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// handling.
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// For sub-byte element sizes, this ends up with 0 stride between elements,
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// so the same element just gets re-written to the same location. There seem
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// to be tests explicitly testing for this broken behavior though. tests
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// for this broken behavior.
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LLVMContext &Ctx = *DAG.getContext();
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EVT NewMemVT
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= EVT::getVectorVT(Ctx,
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MemSclVT.getIntegerVT(Ctx, NextPowerOf2(ScalarSize)),
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StVT.getVectorNumElements());
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SDValue NewVectorStore = DAG.getTruncStore(
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ST->getChain(), SDLoc(Op), ST->getValue(), ST->getBasePtr(),
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ST->getPointerInfo(), NewMemVT, ST->getAlignment(),
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ST->getMemOperand()->getFlags(), ST->getAAInfo());
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ST = cast<StoreSDNode>(NewVectorStore.getNode());
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}
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SDValue TF = TLI.scalarizeVectorStore(ST, DAG);
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AddLegalizedOperand(Op, TF);
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return TF;
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