forked from OSchip/llvm-project
[tblgen][disasm] Allow multiple encodings to disassemble to the same instruction
Summary:
Add an AdditionalEncoding class which can be used to define additional encodings
for a given instruction. This causes the disassembler to add an additional
encoding to its matching tables that map to the specified instruction.
Usage:
def ADD1 : Instruction {
bits<8> Reg;
bits<32> Inst;
let Size = 4;
let Inst{0-7} = Reg;
let Inst{8-14} = 0;
let Inst{15} = 1; // Continuation bit
let Inst{16-31} = 0;
...
}
def : AdditionalEncoding<ADD1> {
bits<8> Reg;
bits<16> Inst; // You can also have bits<32> and it will still be a 16-bit encoding
let Size = 2;
let Inst{0-3} = 0;
let Inst{4-7} = Reg;
let Inst{8-15} = 0;
...
}
with those definitions, llvm-mc will successfully disassemble both of these:
0x01 0x00
0x10 0x80 0x00 0x00
to:
ADD1 r1
Depends on D52366
Reviewers: bogner, charukcs
Reviewed By: bogner
Subscribers: nlguillemot, nhaehnle, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D52369
llvm-svn: 363744
This commit is contained in:
Daniel Sanders
parent
4f7f70e262
commit
9b2252123d
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@ -398,11 +398,49 @@ include "llvm/Target/TargetSchedule.td"
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class Predicate; // Forward def
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class InstructionEncoding {
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// Size of encoded instruction.
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int Size;
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// The "namespace" in which this instruction exists, on targets like ARM
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// which multiple ISA namespaces exist.
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string DecoderNamespace = "";
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// List of predicates which will be turned into isel matching code.
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list<Predicate> Predicates = [];
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string DecoderMethod = "";
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// Is the instruction decoder method able to completely determine if the
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// given instruction is valid or not. If the TableGen definition of the
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// instruction specifies bitpattern A??B where A and B are static bits, the
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// hasCompleteDecoder flag says whether the decoder method fully handles the
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// ?? space, i.e. if it is a final arbiter for the instruction validity.
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// If not then the decoder attempts to continue decoding when the decoder
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// method fails.
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//
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// This allows to handle situations where the encoding is not fully
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// orthogonal. Example:
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// * InstA with bitpattern 0b0000????,
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// * InstB with bitpattern 0b000000?? but the associated decoder method
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// DecodeInstB() returns Fail when ?? is 0b00 or 0b11.
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//
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// The decoder tries to decode a bitpattern that matches both InstA and
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// InstB bitpatterns first as InstB (because it is the most specific
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// encoding). In the default case (hasCompleteDecoder = 1), when
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// DecodeInstB() returns Fail the bitpattern gets rejected. By setting
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// hasCompleteDecoder = 0 in InstB, the decoder is informed that
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// DecodeInstB() is not able to determine if all possible values of ?? are
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// valid or not. If DecodeInstB() returns Fail the decoder will attempt to
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// decode the bitpattern as InstA too.
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bit hasCompleteDecoder = 1;
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}
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//===----------------------------------------------------------------------===//
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// Instruction set description - These classes correspond to the C++ classes in
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// the Target/TargetInstrInfo.h file.
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//
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class Instruction {
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class Instruction : InstructionEncoding {
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string Namespace = "";
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dag OutOperandList; // An dag containing the MI def operand list.
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@ -427,10 +465,6 @@ class Instruction {
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// from the opcode.
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int Size = 0;
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// DecoderNamespace - The "namespace" in which this instruction exists, on
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// targets like ARM which multiple ISA namespaces exist.
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string DecoderNamespace = "";
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// Code size, for instruction selection.
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// FIXME: What does this actually mean?
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int CodeSize = 0;
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@ -532,31 +566,6 @@ class Instruction {
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string DisableEncoding = "";
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string PostEncoderMethod = "";
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string DecoderMethod = "";
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// Is the instruction decoder method able to completely determine if the
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// given instruction is valid or not. If the TableGen definition of the
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// instruction specifies bitpattern A??B where A and B are static bits, the
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// hasCompleteDecoder flag says whether the decoder method fully handles the
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// ?? space, i.e. if it is a final arbiter for the instruction validity.
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// If not then the decoder attempts to continue decoding when the decoder
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// method fails.
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//
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// This allows to handle situations where the encoding is not fully
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// orthogonal. Example:
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// * InstA with bitpattern 0b0000????,
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// * InstB with bitpattern 0b000000?? but the associated decoder method
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// DecodeInstB() returns Fail when ?? is 0b00 or 0b11.
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//
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// The decoder tries to decode a bitpattern that matches both InstA and
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// InstB bitpatterns first as InstB (because it is the most specific
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// encoding). In the default case (hasCompleteDecoder = 1), when
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// DecodeInstB() returns Fail the bitpattern gets rejected. By setting
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// hasCompleteDecoder = 0 in InstB, the decoder is informed that
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// DecodeInstB() is not able to determine if all possible values of ?? are
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// valid or not. If DecodeInstB() returns Fail the decoder will attempt to
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// decode the bitpattern as InstA too.
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bit hasCompleteDecoder = 1;
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/// Target-specific flags. This becomes the TSFlags field in TargetInstrDesc.
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bits<64> TSFlags = 0;
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@ -593,6 +602,13 @@ class Instruction {
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bit FastISelShouldIgnore = 0;
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}
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/// Defines an additional encoding that disassembles to the given instruction
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/// Like Instruction, the Inst and SoftFail fields are omitted to allow targets
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// to specify their size.
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class AdditionalEncoding<Instruction I> : InstructionEncoding {
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Instruction AliasOf = I;
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}
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/// PseudoInstExpansion - Expansion information for a pseudo-instruction.
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/// Which instruction it expands to and how the operands map from the
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/// pseudo.
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@ -16,9 +16,10 @@
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#include "llvm/ADT/APInt.h"
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#include "llvm/ADT/ArrayRef.h"
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#include "llvm/ADT/CachedHashString.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/SetVector.h"
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#include "llvm/ADT/SmallString.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringExtras.h"
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#include "llvm/ADT/StringRef.h"
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#include "llvm/MC/MCFixedLenDisassembler.h"
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@ -47,6 +48,12 @@ using namespace llvm;
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namespace {
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STATISTIC(NumEncodings, "Number of encodings considered");
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STATISTIC(NumEncodingsLackingDisasm, "Number of encodings without disassembler info");
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STATISTIC(NumInstructions, "Number of instructions considered");
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STATISTIC(NumEncodingsSupported, "Number of encodings supported");
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STATISTIC(NumEncodingsOmitted, "Number of encodings omitted");
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struct EncodingField {
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unsigned Base, Width, Offset;
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EncodingField(unsigned B, unsigned W, unsigned O)
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@ -94,6 +101,15 @@ struct EncodingAndInst {
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: EncodingDef(EncodingDef), Inst(Inst) {}
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};
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struct EncodingIDAndOpcode {
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unsigned EncodingID;
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unsigned Opcode;
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EncodingIDAndOpcode() : EncodingID(0), Opcode(0) {}
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EncodingIDAndOpcode(unsigned EncodingID, unsigned Opcode)
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: EncodingID(EncodingID), Opcode(Opcode) {}
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};
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raw_ostream &operator<<(raw_ostream &OS, const EncodingAndInst &Value) {
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if (Value.EncodingDef != Value.Inst->TheDef)
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OS << Value.EncodingDef->getName() << ":";
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@ -102,6 +118,7 @@ raw_ostream &operator<<(raw_ostream &OS, const EncodingAndInst &Value) {
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}
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class FixedLenDecoderEmitter {
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RecordKeeper &RK;
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std::vector<EncodingAndInst> NumberedEncodings;
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public:
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@ -113,7 +130,7 @@ public:
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std::string ROK = "MCDisassembler::Success",
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std::string RFail = "MCDisassembler::Fail",
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std::string L = "")
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: Target(R), PredicateNamespace(std::move(PredicateNamespace)),
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: RK(R), Target(R), PredicateNamespace(std::move(PredicateNamespace)),
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GuardPrefix(std::move(GPrefix)), GuardPostfix(std::move(GPostfix)),
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ReturnOK(std::move(ROK)), ReturnFail(std::move(RFail)),
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Locals(std::move(L)) {}
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@ -251,10 +268,11 @@ protected:
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bool Mixed; // a mixed region contains both set and unset bits
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// Map of well-known segment value to the set of uid's with that value.
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std::map<uint64_t, std::vector<unsigned>> FilteredInstructions;
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std::map<uint64_t, std::vector<EncodingIDAndOpcode>>
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FilteredInstructions;
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// Set of uid's with non-constant segment values.
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std::vector<unsigned> VariableInstructions;
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std::vector<EncodingIDAndOpcode> VariableInstructions;
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// Map of well-known segment value to its delegate.
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std::map<unsigned, std::unique_ptr<const FilterChooser>> FilterChooserMap;
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@ -263,7 +281,7 @@ protected:
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unsigned NumFiltered;
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// Keeps track of the last opcode in the filtered bucket.
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unsigned LastOpcFiltered;
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EncodingIDAndOpcode LastOpcFiltered;
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public:
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Filter(Filter &&f);
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@ -273,7 +291,7 @@ public:
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unsigned getNumFiltered() const { return NumFiltered; }
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unsigned getSingletonOpc() const {
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EncodingIDAndOpcode getSingletonOpc() const {
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assert(NumFiltered == 1);
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return LastOpcFiltered;
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}
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@ -337,10 +355,12 @@ protected:
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friend class Filter;
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// Vector of codegen instructions to choose our filter.
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ArrayRef<EncodingAndInst> AllInstructions;
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ArrayRef<const EncodingAndInst> AllInstructions;
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// Vector of uid's for this filter chooser to work on.
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const std::vector<unsigned> &Opcodes;
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// The first member of the pair is the opcode id being decoded, the second is
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// the opcode id that should be emitted.
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const std::vector<EncodingIDAndOpcode> &Opcodes;
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// Lookup table for the operand decoding of instructions.
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const std::map<unsigned, std::vector<OperandInfo>> &Operands;
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@ -365,8 +385,8 @@ protected:
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const FixedLenDecoderEmitter *Emitter;
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public:
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FilterChooser(ArrayRef<EncodingAndInst> Insts,
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const std::vector<unsigned> &IDs,
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FilterChooser(ArrayRef<const EncodingAndInst> Insts,
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const std::vector<EncodingIDAndOpcode> &IDs,
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const std::map<unsigned, std::vector<OperandInfo>> &Ops,
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unsigned BW, const FixedLenDecoderEmitter *E)
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: AllInstructions(Insts), Opcodes(IDs), Operands(Ops),
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@ -375,8 +395,8 @@ public:
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doFilter();
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}
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FilterChooser(ArrayRef<EncodingAndInst> Insts,
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const std::vector<unsigned> &IDs,
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FilterChooser(ArrayRef<const EncodingAndInst> Insts,
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const std::vector<EncodingIDAndOpcode> &IDs,
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const std::map<unsigned, std::vector<OperandInfo>> &Ops,
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const std::vector<bit_value_t> &ParentFilterBitValues,
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const FilterChooser &parent)
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@ -412,6 +432,15 @@ protected:
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}
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}
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// Emit the name of the encoding/instruction pair.
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void emitNameWithID(raw_ostream &OS, unsigned Opcode) const {
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const Record *EncodingDef = AllInstructions[Opcode].EncodingDef;
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const Record *InstDef = AllInstructions[Opcode].Inst->TheDef;
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if (EncodingDef != InstDef)
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OS << EncodingDef->getName() << ":";
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OS << InstDef->getName();
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}
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// Populates the field of the insn given the start position and the number of
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// consecutive bits to scan for.
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//
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@ -462,7 +491,7 @@ protected:
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// Emits table entries to decode the singleton.
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void emitSingletonTableEntry(DecoderTableInfo &TableInfo,
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unsigned Opc) const;
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EncodingIDAndOpcode Opc) const;
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// Emits code to decode the singleton, and then to decode the rest.
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void emitSingletonTableEntry(DecoderTableInfo &TableInfo,
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@ -523,13 +552,13 @@ Filter::Filter(FilterChooser &owner, unsigned startBit, unsigned numBits,
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assert(StartBit + NumBits - 1 < Owner->BitWidth);
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NumFiltered = 0;
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LastOpcFiltered = 0;
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LastOpcFiltered = {0, 0};
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for (unsigned i = 0, e = Owner->Opcodes.size(); i != e; ++i) {
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insn_t Insn;
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// Populates the insn given the uid.
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Owner->insnWithID(Insn, Owner->Opcodes[i]);
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Owner->insnWithID(Insn, Owner->Opcodes[i].EncodingID);
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uint64_t Field;
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// Scans the segment for possibly well-specified encoding bits.
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@ -1025,7 +1054,7 @@ unsigned FilterChooser::getIslands(std::vector<unsigned> &StartBits,
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// 1: Water (the bit value does not affect decoding)
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// 2: Island (well-known bit value needed for decoding)
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int State = 0;
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int Val = -1;
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int64_t Val = -1;
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for (unsigned i = 0; i < BitWidth; ++i) {
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Val = Value(Insn[i]);
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@ -1313,12 +1342,12 @@ void FilterChooser::emitSoftFailTableEntry(DecoderTableInfo &TableInfo,
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// Emits table entries to decode the singleton.
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void FilterChooser::emitSingletonTableEntry(DecoderTableInfo &TableInfo,
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unsigned Opc) const {
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EncodingIDAndOpcode Opc) const {
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std::vector<unsigned> StartBits;
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std::vector<unsigned> EndBits;
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std::vector<uint64_t> FieldVals;
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insn_t Insn;
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insnWithID(Insn, Opc);
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insnWithID(Insn, Opc.EncodingID);
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// Look for islands of undecoded bits of the singleton.
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getIslands(StartBits, EndBits, FieldVals, Insn);
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@ -1326,7 +1355,7 @@ void FilterChooser::emitSingletonTableEntry(DecoderTableInfo &TableInfo,
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unsigned Size = StartBits.size();
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// Emit the predicate table entry if one is needed.
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emitPredicateTableEntry(TableInfo, Opc);
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emitPredicateTableEntry(TableInfo, Opc.EncodingID);
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// Check any additional encoding fields needed.
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for (unsigned I = Size; I != 0; --I) {
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@ -1350,10 +1379,11 @@ void FilterChooser::emitSingletonTableEntry(DecoderTableInfo &TableInfo,
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}
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// Check for soft failure of the match.
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emitSoftFailTableEntry(TableInfo, Opc);
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emitSoftFailTableEntry(TableInfo, Opc.EncodingID);
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bool HasCompleteDecoder;
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unsigned DIdx = getDecoderIndex(TableInfo.Decoders, Opc, HasCompleteDecoder);
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unsigned DIdx =
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getDecoderIndex(TableInfo.Decoders, Opc.EncodingID, HasCompleteDecoder);
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// Produce OPC_Decode or OPC_TryDecode opcode based on the information
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// whether the instruction decoder is complete or not. If it is complete
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@ -1366,8 +1396,9 @@ void FilterChooser::emitSingletonTableEntry(DecoderTableInfo &TableInfo,
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// can decode it.
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TableInfo.Table.push_back(HasCompleteDecoder ? MCD::OPC_Decode :
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MCD::OPC_TryDecode);
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NumEncodingsSupported++;
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uint8_t Buffer[16], *p;
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encodeULEB128(Opc, Buffer);
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encodeULEB128(Opc.Opcode, Buffer);
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for (p = Buffer; *p >= 128 ; ++p)
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TableInfo.Table.push_back(*p);
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TableInfo.Table.push_back(*p);
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@ -1393,7 +1424,7 @@ void FilterChooser::emitSingletonTableEntry(DecoderTableInfo &TableInfo,
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// Emits table entries to decode the singleton, and then to decode the rest.
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void FilterChooser::emitSingletonTableEntry(DecoderTableInfo &TableInfo,
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const Filter &Best) const {
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unsigned Opc = Best.getSingletonOpc();
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EncodingIDAndOpcode Opc = Best.getSingletonOpc();
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// complex singletons need predicate checks from the first singleton
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// to refer forward to the variable filterchooser that follows.
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@ -1453,7 +1484,7 @@ bool FilterChooser::filterProcessor(bool AllowMixed, bool Greedy) {
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std::vector<uint64_t> FieldVals;
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insn_t Insn;
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insnWithID(Insn, Opcodes[i]);
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insnWithID(Insn, Opcodes[i].EncodingID);
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// Look for islands of undecoded bits of any instruction.
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if (getIslands(StartBits, EndBits, FieldVals, Insn) > 0) {
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@ -1497,7 +1528,7 @@ bool FilterChooser::filterProcessor(bool AllowMixed, bool Greedy) {
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for (unsigned InsnIndex = 0; InsnIndex < numInstructions; ++InsnIndex) {
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insn_t insn;
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insnWithID(insn, Opcodes[InsnIndex]);
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insnWithID(insn, Opcodes[InsnIndex].EncodingID);
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for (BitIndex = 0; BitIndex < BitWidth; ++BitIndex) {
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switch (bitAttrs[BitIndex]) {
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@ -1716,9 +1747,12 @@ void FilterChooser::emitTableEntries(DecoderTableInfo &TableInfo) const {
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dumpStack(errs(), "\t\t");
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for (unsigned i = 0; i < Opcodes.size(); ++i) {
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errs() << '\t' << AllInstructions[Opcodes[i]] << " ";
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dumpBits(errs(),
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getBitsField(*AllInstructions[Opcodes[i]].EncodingDef, "Inst"));
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errs() << '\t';
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emitNameWithID(errs(), Opcodes[i].EncodingID);
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errs() << " ";
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dumpBits(
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errs(),
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getBitsField(*AllInstructions[Opcodes[i].EncodingID].EncodingDef, "Inst"));
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errs() << '\n';
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}
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}
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@ -1750,24 +1784,25 @@ static std::string findOperandDecoderMethod(TypedInit *TI) {
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return Decoder;
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}
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static bool populateInstruction(CodeGenTarget &Target,
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const CodeGenInstruction &CGI, unsigned Opc,
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std::map<unsigned, std::vector<OperandInfo>> &Operands){
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static bool
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populateInstruction(CodeGenTarget &Target, const Record &EncodingDef,
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const CodeGenInstruction &CGI, unsigned Opc,
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std::map<unsigned, std::vector<OperandInfo>> &Operands) {
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const Record &Def = *CGI.TheDef;
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// If all the bit positions are not specified; do not decode this instruction.
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// We are bound to fail! For proper disassembly, the well-known encoding bits
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// of the instruction must be fully specified.
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BitsInit &Bits = getBitsField(Def, "Inst");
|
||||
BitsInit &Bits = getBitsField(EncodingDef, "Inst");
|
||||
if (Bits.allInComplete()) return false;
|
||||
|
||||
std::vector<OperandInfo> InsnOperands;
|
||||
|
||||
// If the instruction has specified a custom decoding hook, use that instead
|
||||
// of trying to auto-generate the decoder.
|
||||
StringRef InstDecoder = Def.getValueAsString("DecoderMethod");
|
||||
StringRef InstDecoder = EncodingDef.getValueAsString("DecoderMethod");
|
||||
if (InstDecoder != "") {
|
||||
bool HasCompleteInstDecoder = Def.getValueAsBit("hasCompleteDecoder");
|
||||
bool HasCompleteInstDecoder = EncodingDef.getValueAsBit("hasCompleteDecoder");
|
||||
InsnOperands.push_back(OperandInfo(InstDecoder, HasCompleteInstDecoder));
|
||||
Operands[Opc] = InsnOperands;
|
||||
return true;
|
||||
|
|
@ -2143,7 +2178,7 @@ static void emitDecodeInstruction(formatted_raw_ostream &OS) {
|
|||
<< " const FeatureBitset& Bits = STI.getFeatureBits();\n"
|
||||
<< "\n"
|
||||
<< " const uint8_t *Ptr = DecodeTable;\n"
|
||||
<< " uint32_t CurFieldValue = 0;\n"
|
||||
<< " InsnType CurFieldValue = 0;\n"
|
||||
<< " DecodeStatus S = MCDisassembler::Success;\n"
|
||||
<< " while (true) {\n"
|
||||
<< " ptrdiff_t Loc = Ptr - DecodeTable;\n"
|
||||
|
|
@ -2188,7 +2223,7 @@ static void emitDecodeInstruction(formatted_raw_ostream &OS) {
|
|||
<< " unsigned Len = *++Ptr;\n"
|
||||
<< " InsnType FieldValue = fieldFromInstruction(insn, Start, Len);\n"
|
||||
<< " // Decode the field value.\n"
|
||||
<< " uint32_t ExpectedValue = decodeULEB128(++Ptr, &Len);\n"
|
||||
<< " InsnType ExpectedValue = decodeULEB128(++Ptr, &Len);\n"
|
||||
<< " Ptr += Len;\n"
|
||||
<< " // NumToSkip is a plain 24-bit integer.\n"
|
||||
<< " unsigned NumToSkip = *Ptr++;\n"
|
||||
|
|
@ -2335,37 +2370,52 @@ void FixedLenDecoderEmitter::run(raw_ostream &o) {
|
|||
// Parameterize the decoders based on namespace and instruction width.
|
||||
const auto &NumberedInstructions = Target.getInstructionsByEnumValue();
|
||||
NumberedEncodings.reserve(NumberedInstructions.size());
|
||||
for (const auto &NumberedInstruction : NumberedInstructions)
|
||||
DenseMap<Record *, unsigned> IndexOfInstruction;
|
||||
for (const auto &NumberedInstruction : NumberedInstructions) {
|
||||
IndexOfInstruction[NumberedInstruction->TheDef] = NumberedEncodings.size();
|
||||
NumberedEncodings.emplace_back(NumberedInstruction->TheDef, NumberedInstruction);
|
||||
}
|
||||
for (const auto &NumberedAlias : RK.getAllDerivedDefinitions("AdditionalEncoding"))
|
||||
NumberedEncodings.emplace_back(
|
||||
NumberedAlias,
|
||||
&Target.getInstruction(NumberedAlias->getValueAsDef("AliasOf")));
|
||||
|
||||
std::map<std::pair<std::string, unsigned>,
|
||||
std::vector<unsigned>> OpcMap;
|
||||
std::map<std::pair<std::string, unsigned>, std::vector<EncodingIDAndOpcode>>
|
||||
OpcMap;
|
||||
std::map<unsigned, std::vector<OperandInfo>> Operands;
|
||||
|
||||
for (unsigned i = 0; i < NumberedEncodings.size(); ++i) {
|
||||
const Record *EncodingDef = NumberedEncodings[i].EncodingDef;
|
||||
const CodeGenInstruction *Inst = NumberedEncodings[i].Inst;
|
||||
const Record *Def = Inst->TheDef;
|
||||
unsigned Size = Def->getValueAsInt("Size");
|
||||
unsigned Size = EncodingDef->getValueAsInt("Size");
|
||||
if (Def->getValueAsString("Namespace") == "TargetOpcode" ||
|
||||
Def->getValueAsBit("isPseudo") ||
|
||||
Def->getValueAsBit("isAsmParserOnly") ||
|
||||
Def->getValueAsBit("isCodeGenOnly"))
|
||||
Def->getValueAsBit("isCodeGenOnly")) {
|
||||
NumEncodingsLackingDisasm++;
|
||||
continue;
|
||||
}
|
||||
|
||||
StringRef DecoderNamespace = Def->getValueAsString("DecoderNamespace");
|
||||
if (i < NumberedInstructions.size())
|
||||
NumInstructions++;
|
||||
NumEncodings++;
|
||||
|
||||
StringRef DecoderNamespace = EncodingDef->getValueAsString("DecoderNamespace");
|
||||
|
||||
if (Size) {
|
||||
if (populateInstruction(Target, *Inst, i, Operands)) {
|
||||
OpcMap[std::make_pair(DecoderNamespace, Size)].push_back(i);
|
||||
}
|
||||
if (populateInstruction(Target, *EncodingDef, *Inst, i, Operands)) {
|
||||
OpcMap[std::make_pair(DecoderNamespace, Size)].emplace_back(i, IndexOfInstruction.find(Def)->second);
|
||||
} else
|
||||
NumEncodingsOmitted++;
|
||||
}
|
||||
}
|
||||
|
||||
DecoderTableInfo TableInfo;
|
||||
for (const auto &Opc : OpcMap) {
|
||||
// Emit the decoder for this namespace+width combination.
|
||||
ArrayRef<EncodingAndInst> NumberedEncodingsRef(NumberedEncodings.data(),
|
||||
NumberedEncodings.size());
|
||||
ArrayRef<const EncodingAndInst> NumberedEncodingsRef(
|
||||
NumberedEncodings.data(), NumberedEncodings.size());
|
||||
FilterChooser FC(NumberedEncodingsRef, Opc.second, Operands,
|
||||
8 * Opc.first.second, this);
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue