forked from OSchip/llvm-project
1. Fix a case that was marking the invalid reg. num. (-1) as used,
causing a nasty array bound error later. 2. Fix silly typo causing logical shift of unsigned long to use SRL instead of SRLX. llvm-svn: 7330
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45766ab682
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@ -1538,7 +1538,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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BuildMI(V9::JMPLRETi, 3).addReg(returnAddrTmp).addSImm(8)
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.addMReg(target.getRegInfo().getZeroRegNum(), MOTy::Def);
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// If ther is a value to return, we need to:
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// If there is a value to return, we need to:
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// (a) Sign-extend the value if it is smaller than 8 bytes (reg size)
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// (b) Insert a copy to copy the return value to the appropriate reg.
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// -- For FP values, create a FMOVS or FMOVD instruction
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@ -1580,7 +1580,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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new TmpInstruction(mcfi, retValToUse, NULL, "argReg");
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retMI->addImplicitRef(retVReg);
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if (retType->isFloatingPoint())
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M = (BuildMI(retType==Type::FloatTy? V9::FMOVS : V9::FMOVD, 2)
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.addReg(retValToUse).addReg(retVReg, MOTy::Def));
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@ -2511,7 +2511,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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CallArgInfo& argInfo = argDesc->getArgInfo(argNo);
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Value* argVal = argInfo.getArgVal(); // don't use callInstr arg here
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const Type* argType = argVal->getType();
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unsigned regType = regInfo.getRegType(argType);
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unsigned regType = regInfo.getRegTypeForDataType(argType);
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unsigned argSize = target.getTargetData().getTypeSize(argType);
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int regNumForArg = TargetRegInfo::getInvalidRegNum();
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unsigned regClassIDOfArgReg;
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@ -2523,15 +2523,31 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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// K = #integer argument registers.
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bool isFPArg = argVal->getType()->isFloatingPoint();
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if (isVarArgs && isFPArg) {
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// If it is a function with no prototype, pass value
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// as an FP value as well as a varargs value
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if (noPrototype)
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argInfo.setUseFPArgReg();
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// If this arg. is in the first $K$ regs, add copy-
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if (noPrototype) {
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// It is a function with no prototype: pass value
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// as an FP value as well as a varargs value. The FP value
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// may go in a register or on the stack. The copy instruction
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// to the outgoing reg/stack is created by the normal argument
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// handling code since this is the "normal" passing mode.
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//
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regNumForArg = regInfo.regNumForFPArg(regType,
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false, false, argNo,
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regClassIDOfArgReg);
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if (regNumForArg == regInfo.getInvalidRegNum())
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argInfo.setUseStackSlot();
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else
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argInfo.setUseFPArgReg();
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}
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// If this arg. is in the first $K$ regs, add special copy-
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// float-to-int instructions to pass the value as an int.
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// To check if it is in teh first $K$, get the register
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// number for the arg #i.
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// To check if it is in the first $K$, get the register
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// number for the arg #i. These copy instructions are
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// generated here because they are extra cases and not needed
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// for the normal argument handling (some code reuse is
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// possible though -- later).
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//
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int copyRegNum = regInfo.regNumForIntArg(false, false, argNo,
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regClassIDOfArgReg);
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if (copyRegNum != regInfo.getInvalidRegNum()) {
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@ -2543,7 +2559,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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argVal, NULL,
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"argRegCopy");
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callMI->addImplicitRef(argVReg);
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// Get a temp stack location to use to copy
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// float-to-int via the stack.
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//
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@ -2630,7 +2646,9 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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M = BuildMI(storeOpCode, 3).addReg(argVal)
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.addMReg(regInfo.getStackPointer()).addSImm(argOffset);
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mvec.push_back(M);
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} else {
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}
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else if (regNumForArg != regInfo.getInvalidRegNum()) {
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// Create a virtual register to represent the arg reg. Mark
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// this vreg as being an implicit operand of the call MI.
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TmpInstruction* argVReg =
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@ -2656,6 +2674,9 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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mvec.push_back(M);
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}
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else
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assert(argInfo.getArgCopy() != regInfo.getInvalidRegNum() &&
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"Arg. not in stack slot, primary or secondary register?");
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}
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// add call instruction and delay slot before copying return value
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@ -2736,7 +2757,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot,
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"Shr unsupported for other types");
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Add3OperandInstr(opType->isSigned()
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? (opType == Type::LongTy ? V9::SRAXr6 : V9::SRAr5)
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: (opType == Type::LongTy ? V9::SRLXr6 : V9::SRLr5),
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: (opType == Type::ULongTy ? V9::SRLXr6 : V9::SRLr5),
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subtreeRoot, mvec);
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break;
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}
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