forked from OSchip/llvm-project
[X86] Sort bits in getHostCPUFeatures again.
llvm-svn: 318792
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@ -1258,19 +1258,13 @@ bool sys::getHostCPUFeatures(StringMap<bool> &Features) {
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Features["prefetchwt1"] = HasLeaf7 && ((ECX >> 0) & 1);
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Features["avx512vbmi"] = HasLeaf7 && ((ECX >> 1) & 1) && HasAVX512Save;
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Features["pku"] = HasLeaf7 && ((ECX >> 4) & 1);
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Features["avx512vbmi2"] = HasLeaf7 && ((ECX >> 6) & 1) && HasAVX512Save;
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Features["vaes"] = HasLeaf7 && ((ECX >> 9) & 1) && HasAVXSave;
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Features["vpclmulqdq"] = HasLeaf7 && ((ECX >> 10) & 1) && HasAVXSave;
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Features["avx512vnni"] = HasLeaf7 && ((ECX >> 11) & 1) && HasAVX512Save;
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Features["avx512bitalg"] = HasLeaf7 && ((ECX >> 12) & 1) && HasAVX512Save;
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Features["avx512vpopcntdq"] = HasLeaf7 && ((ECX >> 14) & 1) && HasAVX512Save;
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Features["pku"] = HasLeaf7 && ((ECX >> 4) & 1);
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Features["vaes"] = HasLeaf7 && ((ECX >> 9) & 1) && HasAVXSave;
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// VPCLMULQDQ (carry-less multiplication quadword)
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Features["vpclmulqdq"] = HasLeaf7 && ((ECX >> 10) & 1) && HasAVXSave;
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// Enable Vector Neural Network Instructions
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Features["avx512vnni"] = HasLeaf7 && ((ECX >> 11) & 1) && HasAVX512Save;
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// Enable Bit Algorithms
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Features["avx512bitalg"] = HasLeaf7 && ((ECX >> 12) & 1) && HasAVX512Save;
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bool HasLeafD = MaxLevel >= 0xd &&
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!getX86CpuIDAndInfoEx(0xd, 0x1, &EAX, &EBX, &ECX, &EDX);
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