diff --git a/llvm/utils/TableGen/CodeEmitterGen.cpp b/llvm/utils/TableGen/CodeEmitterGen.cpp index f1857f506e62..a057dec7ce3b 100644 --- a/llvm/utils/TableGen/CodeEmitterGen.cpp +++ b/llvm/utils/TableGen/CodeEmitterGen.cpp @@ -156,7 +156,7 @@ void CodeEmitterGen::run(raw_ostream &o) { BitsInit *BI = R->getValueAsBitsInit("Inst"); const std::vector &Vals = R->getValues(); - CodeGenInstruction &CGI = Target.getInstruction(InstName); + CodeGenInstruction &CGI = Target.getInstruction(R); // Loop over all of the fields in the instruction, determining which are the // operands to the instruction. diff --git a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp index 9fd557f03b82..fafcd8c30ef9 100644 --- a/llvm/utils/TableGen/CodeGenDAGPatterns.cpp +++ b/llvm/utils/TableGen/CodeGenDAGPatterns.cpp @@ -1141,7 +1141,7 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) { "Only supports zero or one result instrs!"); CodeGenInstruction &InstInfo = - CDP.getTargetInfo().getInstruction(getOperator()->getName()); + CDP.getTargetInfo().getInstruction(getOperator()); EEVT::TypeSet ResultType; @@ -2083,7 +2083,7 @@ void CodeGenDAGPatterns::ParseInstructions() { std::vector Results; std::vector Operands; - CodeGenInstruction &InstInfo =Target.getInstruction(Instrs[i]->getName()); + CodeGenInstruction &InstInfo = Target.getInstruction(Instrs[i]); if (InstInfo.OperandList.size() != 0) { if (InstInfo.NumDefs == 0) { @@ -2150,7 +2150,7 @@ void CodeGenDAGPatterns::ParseInstructions() { // Parse the operands list from the (ops) list, validating it. assert(I->getArgList().empty() && "Args list should still be empty here!"); - CodeGenInstruction &CGI = Target.getInstruction(Instrs[i]->getName()); + CodeGenInstruction &CGI = Target.getInstruction(Instrs[i]); // Check that all of the results occur first in the list. std::vector Results; diff --git a/llvm/utils/TableGen/CodeGenTarget.cpp b/llvm/utils/TableGen/CodeGenTarget.cpp index ec6a31fd195f..499d8aca9e16 100644 --- a/llvm/utils/TableGen/CodeGenTarget.cpp +++ b/llvm/utils/TableGen/CodeGenTarget.cpp @@ -138,6 +138,12 @@ Record *CodeGenTarget::getInstructionSet() const { return TargetRec->getValueAsDef("InstructionSet"); } + +CodeGenInstruction &CodeGenTarget::getInstruction(const Record *InstRec) const { + return getInstruction(InstRec->getName()); +} + + /// getAsmParser - Return the AssemblyParser definition for this target. /// Record *CodeGenTarget::getAsmParser() const { diff --git a/llvm/utils/TableGen/CodeGenTarget.h b/llvm/utils/TableGen/CodeGenTarget.h index 1df74af36220..d20e868da726 100644 --- a/llvm/utils/TableGen/CodeGenTarget.h +++ b/llvm/utils/TableGen/CodeGenTarget.h @@ -193,12 +193,15 @@ public: if (Instructions.empty()) ReadInstructions(); return Instructions; } - +private: CodeGenInstruction &getInstruction(const std::string &Name) const { const std::map &Insts = getInstructions(); assert(Insts.count(Name) && "Not an instruction!"); return const_cast(Insts.find(Name)->second); } +public: + + CodeGenInstruction &getInstruction(const Record *InstRec) const; typedef std::map::const_iterator inst_iterator; diff --git a/llvm/utils/TableGen/DAGISelEmitter.cpp b/llvm/utils/TableGen/DAGISelEmitter.cpp index 73feac165120..ef9b73451158 100644 --- a/llvm/utils/TableGen/DAGISelEmitter.cpp +++ b/llvm/utils/TableGen/DAGISelEmitter.cpp @@ -75,7 +75,7 @@ static unsigned getResultPatternCost(TreePatternNode *P, Record *Op = P->getOperator(); if (Op->isSubClassOf("Instruction")) { Cost++; - CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op->getName()); + CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op); if (II.usesCustomInserter) Cost += 10; } diff --git a/llvm/utils/TableGen/DAGISelMatcherGen.cpp b/llvm/utils/TableGen/DAGISelMatcherGen.cpp index 4d0b74b53101..0d7d9ae73a54 100644 --- a/llvm/utils/TableGen/DAGISelMatcherGen.cpp +++ b/llvm/utils/TableGen/DAGISelMatcherGen.cpp @@ -627,7 +627,7 @@ EmitResultInstructionAsOperand(const TreePatternNode *N, SmallVectorImpl &OutputOps) { Record *Op = N->getOperator(); const CodeGenTarget &CGT = CGP.getTargetInfo(); - CodeGenInstruction &II = CGT.getInstruction(Op->getName()); + CodeGenInstruction &II = CGT.getInstruction(Op); const DAGInstruction &Inst = CGP.getInstruction(Op); // If we can, get the pattern for the instruction we're generating. We derive diff --git a/llvm/utils/TableGen/FastISelEmitter.cpp b/llvm/utils/TableGen/FastISelEmitter.cpp index b94ded645261..52f9563ec726 100644 --- a/llvm/utils/TableGen/FastISelEmitter.cpp +++ b/llvm/utils/TableGen/FastISelEmitter.cpp @@ -254,7 +254,7 @@ void FastISelMap::CollectPatterns(CodeGenDAGPatterns &CGP) { Record *Op = Dst->getOperator(); if (!Op->isSubClassOf("Instruction")) continue; - CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op->getName()); + CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(Op); if (II.OperandList.empty()) continue;