forked from OSchip/llvm-project
[mlir] Add std.powf to ROCDL lowering.
Differential Revision: https://reviews.llvm.org/D93313
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@ -84,7 +84,7 @@ void mlir::configureGpuToROCDLConversionLegality(ConversionTarget &target) {
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target.addIllegalDialect<gpu::GPUDialect>();
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target.addIllegalOp<LLVM::CosOp, LLVM::ExpOp, LLVM::FAbsOp, LLVM::FCeilOp,
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LLVM::FFloorOp, LLVM::LogOp, LLVM::Log10Op, LLVM::Log2Op,
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LLVM::SinOp, LLVM::SqrtOp>();
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LLVM::PowOp, LLVM::SinOp, LLVM::SqrtOp>();
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// TODO: Remove once we support replacing non-root ops.
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target.addLegalOp<gpu::YieldOp, gpu::GPUModuleOp, gpu::ModuleEndOp>();
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@ -123,6 +123,8 @@ void mlir::populateGpuToROCDLConversionPatterns(
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"__ocml_log10_f64");
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patterns.insert<OpToFuncCallLowering<Log2Op>>(converter, "__ocml_log2_f32",
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"__ocml_log2_f64");
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patterns.insert<OpToFuncCallLowering<PowFOp>>(converter, "__ocml_pow_f32",
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"__ocml_pow_f64");
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patterns.insert<OpToFuncCallLowering<RsqrtOp>>(converter, "__ocml_rsqrt_f32",
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"__ocml_rsqrt_f64");
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patterns.insert<OpToFuncCallLowering<SinOp>>(converter, "__ocml_sin_f32",
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@ -310,3 +310,18 @@ gpu.module @test_module {
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std.return %result32, %result64 : f32, f64
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}
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}
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// -----
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gpu.module @test_module {
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// CHECK: llvm.func @__ocml_pow_f32(!llvm.float, !llvm.float) -> !llvm.float
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// CHECK: llvm.func @__ocml_pow_f64(!llvm.double, !llvm.double) -> !llvm.double
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// CHECK-LABEL: func @gpu_pow
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func @gpu_pow(%arg_f32 : f32, %arg_f64 : f64) -> (f32, f64) {
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%result32 = std.powf %arg_f32, %arg_f32 : f32
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// CHECK: llvm.call @__ocml_pow_f32(%{{.*}}, %{{.*}}) : (!llvm.float, !llvm.float) -> !llvm.float
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%result64 = std.powf %arg_f64, %arg_f64 : f64
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// CHECK: llvm.call @__ocml_pow_f64(%{{.*}}, %{{.*}}) : (!llvm.double, !llvm.double) -> !llvm.double
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std.return %result32, %result64 : f32, f64
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}
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}
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