From 9a5a83a5187d7a7f0293e0e7dacf46989cf2d80e Mon Sep 17 00:00:00 2001 From: Asaf Badouh Date: Thu, 24 Dec 2015 08:25:00 +0000 Subject: [PATCH] [X86][PKU] Add {RD,WR}PKRU encoding Differential Revision: http://reviews.llvm.org/D15711 llvm-svn: 256366 --- llvm/include/llvm/IR/IntrinsicsX86.td | 8 ++++++++ llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 12 ++++++------ llvm/lib/Target/X86/X86InstrSystem.td | 6 ++++++ llvm/test/MC/X86/X86_64-pku.s | 8 ++++++++ llvm/utils/TableGen/X86RecognizableInstr.cpp | 12 ++++++------ 5 files changed, 34 insertions(+), 12 deletions(-) create mode 100644 llvm/test/MC/X86/X86_64-pku.s diff --git a/llvm/include/llvm/IR/IntrinsicsX86.td b/llvm/include/llvm/IR/IntrinsicsX86.td index 8f8c9ac3b693..cd5496003258 100644 --- a/llvm/include/llvm/IR/IntrinsicsX86.td +++ b/llvm/include/llvm/IR/IntrinsicsX86.td @@ -3896,6 +3896,14 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". Intrinsic<[], [llvm_ptr_ty, llvm_i32_ty, llvm_i32_ty], []>; } +//===----------------------------------------------------------------------===// +// Support protection key +let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". + def int_x86_rdpkru : GCCBuiltin <"__builtin_ia32_rdpkru">, + Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>; + def int_x86_wrpkru : GCCBuiltin<"__builtin_ia32_wrpkru">, + Intrinsic<[], [llvm_i32_ty], [IntrNoMem]>; +} //===----------------------------------------------------------------------===// // Half float conversion diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index f0d00b0c1bc3..462fe0841aea 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -707,12 +707,12 @@ namespace X86II { case X86II::MRM_E3: case X86II::MRM_E4: case X86II::MRM_E5: case X86II::MRM_E8: case X86II::MRM_E9: case X86II::MRM_EA: case X86II::MRM_EB: case X86II::MRM_EC: case X86II::MRM_ED: - case X86II::MRM_EE: case X86II::MRM_F0: case X86II::MRM_F1: - case X86II::MRM_F2: case X86II::MRM_F3: case X86II::MRM_F4: - case X86II::MRM_F5: case X86II::MRM_F6: case X86II::MRM_F7: - case X86II::MRM_F8: case X86II::MRM_F9: case X86II::MRM_FA: - case X86II::MRM_FB: case X86II::MRM_FC: case X86II::MRM_FD: - case X86II::MRM_FE: case X86II::MRM_FF: + case X86II::MRM_EE: case X86II::MRM_EF: case X86II::MRM_F0: + case X86II::MRM_F1: case X86II::MRM_F2: case X86II::MRM_F3: + case X86II::MRM_F4: case X86II::MRM_F5: case X86II::MRM_F6: + case X86II::MRM_F7: case X86II::MRM_F8: case X86II::MRM_F9: + case X86II::MRM_FA: case X86II::MRM_FB: case X86II::MRM_FC: + case X86II::MRM_FD: case X86II::MRM_FE: case X86II::MRM_FF: return -1; } } diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td index ce2646e8bc1b..85e17f516f91 100644 --- a/llvm/lib/Target/X86/X86InstrSystem.td +++ b/llvm/lib/Target/X86/X86InstrSystem.td @@ -549,6 +549,12 @@ let Defs = [RAX, RSI, RDI], Uses = [RAX, RSI, RDI] in { } let Defs = [RAX, RDX, RSI], Uses = [RAX, RSI] in def MONTMUL : I<0xa6, MRM_C0, (outs), (ins), "montmul", []>, TB; +//==-----------------------------------------------------------------------===// +// PKU - enable protection key +let Defs = [EAX, EDX], Uses = [ECX] in + def RDPKRU : I<0x01, MRM_EE, (outs), (ins), "rdpkru", []>, TB; +let Uses = [EAX, ECX, EDX] in + def WRPKRU : I<0x01, MRM_EF, (outs), (ins), "wrpkru", []>, TB; //===----------------------------------------------------------------------===// // FS/GS Base Instructions diff --git a/llvm/test/MC/X86/X86_64-pku.s b/llvm/test/MC/X86/X86_64-pku.s new file mode 100644 index 000000000000..5cb669d5d8fc --- /dev/null +++ b/llvm/test/MC/X86/X86_64-pku.s @@ -0,0 +1,8 @@ +// RUN: llvm-mc -triple x86_64-unknown-unknown -mattr=+pku --show-encoding < %s | FileCheck %s +// CHECK: rdpkru +// CHECK: encoding: [0x0f,0x01,0xee] + rdpkru + +// CHECK: wrpkru +// CHECK: encoding: [0x0f,0x01,0xef] + wrpkru \ No newline at end of file diff --git a/llvm/utils/TableGen/X86RecognizableInstr.cpp b/llvm/utils/TableGen/X86RecognizableInstr.cpp index dba1e6b92b9a..8a5ae12f67fb 100644 --- a/llvm/utils/TableGen/X86RecognizableInstr.cpp +++ b/llvm/utils/TableGen/X86RecognizableInstr.cpp @@ -796,12 +796,12 @@ void RecognizableInstr::emitInstructionSpecifier() { case X86Local::MRM_E3: case X86Local::MRM_E4: case X86Local::MRM_E5: case X86Local::MRM_E8: case X86Local::MRM_E9: case X86Local::MRM_EA: case X86Local::MRM_EB: case X86Local::MRM_EC: case X86Local::MRM_ED: - case X86Local::MRM_EE: case X86Local::MRM_F0: case X86Local::MRM_F1: - case X86Local::MRM_F2: case X86Local::MRM_F3: case X86Local::MRM_F4: - case X86Local::MRM_F5: case X86Local::MRM_F6: case X86Local::MRM_F7: - case X86Local::MRM_F9: case X86Local::MRM_FA: case X86Local::MRM_FB: - case X86Local::MRM_FC: case X86Local::MRM_FD: case X86Local::MRM_FE: - case X86Local::MRM_FF: + case X86Local::MRM_EE: case X86Local::MRM_EF: case X86Local::MRM_F0: + case X86Local::MRM_F1: case X86Local::MRM_F2: case X86Local::MRM_F3: + case X86Local::MRM_F4: case X86Local::MRM_F5: case X86Local::MRM_F6: + case X86Local::MRM_F7: case X86Local::MRM_F9: case X86Local::MRM_FA: + case X86Local::MRM_FB: case X86Local::MRM_FC: case X86Local::MRM_FD: + case X86Local::MRM_FE: case X86Local::MRM_FF: // Ignored. break; }