From 9a1a1f7bb2f182e457595f1f207fa50d5e24283f Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Thu, 21 Mar 2019 20:56:05 +0000 Subject: [PATCH] Mips: Don't create copy of nothing This was creating a copy of the register the pseudo itself was def'ing, leaving a copy of an undefined register. I'm not sure how the verifier is not catching this, but this avoids asserting in a future change to RegAllocFast llvm-svn: 356716 --- llvm/lib/Target/Mips/MipsISelLowering.cpp | 2 - llvm/test/CodeGen/Mips/atomic.ll | 130 +++++++++------------- llvm/test/CodeGen/Mips/atomic64.ll | 27 ++--- llvm/test/CodeGen/Mips/atomicCmpSwapPW.ll | 46 ++++---- 4 files changed, 86 insertions(+), 119 deletions(-) diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 95c0103bbc80..21c7cf2dd79a 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -1750,12 +1750,10 @@ MipsTargetLowering::emitAtomicCmpSwap(MachineInstr &MI, // after fast register allocation, the spills will end up outside of the // blocks that their values are defined in, causing livein errors. - unsigned DestCopy = MRI.createVirtualRegister(MRI.getRegClass(Dest)); unsigned PtrCopy = MRI.createVirtualRegister(MRI.getRegClass(Ptr)); unsigned OldValCopy = MRI.createVirtualRegister(MRI.getRegClass(OldVal)); unsigned NewValCopy = MRI.createVirtualRegister(MRI.getRegClass(NewVal)); - BuildMI(*BB, II, DL, TII->get(Mips::COPY), DestCopy).addReg(Dest); BuildMI(*BB, II, DL, TII->get(Mips::COPY), PtrCopy).addReg(Ptr); BuildMI(*BB, II, DL, TII->get(Mips::COPY), OldValCopy).addReg(OldVal); BuildMI(*BB, II, DL, TII->get(Mips::COPY), NewValCopy).addReg(NewVal); diff --git a/llvm/test/CodeGen/Mips/atomic.ll b/llvm/test/CodeGen/Mips/atomic.ll index b0207ffb02d9..aa2f9c1fb279 100644 --- a/llvm/test/CodeGen/Mips/atomic.ll +++ b/llvm/test/CodeGen/Mips/atomic.ll @@ -1935,32 +1935,29 @@ define i32 @AtomicCmpSwap32(i32 signext %oldval, i32 signext %newval) nounwind { ; MIPS32O0: # %bb.0: # %entry ; MIPS32O0-NEXT: lui $2, %hi(_gp_disp) ; MIPS32O0-NEXT: addiu $2, $2, %lo(_gp_disp) -; MIPS32O0-NEXT: addiu $sp, $sp, -16 +; MIPS32O0-NEXT: addiu $sp, $sp, -8 ; MIPS32O0-NEXT: addu $1, $2, $25 -; MIPS32O0-NEXT: sw $5, 12($sp) -; MIPS32O0-NEXT: lw $2, 12($sp) +; MIPS32O0-NEXT: sw $5, 4($sp) +; MIPS32O0-NEXT: lw $2, 4($sp) ; MIPS32O0-NEXT: lw $1, %got(x)($1) -; MIPS32O0-NEXT: lw $3, 8($sp) # 4-byte Folded Reload -; MIPS32O0-NEXT: move $5, $4 +; MIPS32O0-NEXT: move $3, $4 ; MIPS32O0-NEXT: $BB7_1: # %entry ; MIPS32O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS32O0-NEXT: ll $6, 0($1) -; MIPS32O0-NEXT: bne $6, $5, $BB7_3 +; MIPS32O0-NEXT: ll $5, 0($1) +; MIPS32O0-NEXT: bne $5, $3, $BB7_3 ; MIPS32O0-NEXT: nop ; MIPS32O0-NEXT: # %bb.2: # %entry ; MIPS32O0-NEXT: # in Loop: Header=BB7_1 Depth=1 -; MIPS32O0-NEXT: move $7, $2 -; MIPS32O0-NEXT: sc $7, 0($1) -; MIPS32O0-NEXT: beqz $7, $BB7_1 +; MIPS32O0-NEXT: move $6, $2 +; MIPS32O0-NEXT: sc $6, 0($1) +; MIPS32O0-NEXT: beqz $6, $BB7_1 ; MIPS32O0-NEXT: nop ; MIPS32O0-NEXT: $BB7_3: # %entry -; MIPS32O0-NEXT: xor $1, $6, $4 +; MIPS32O0-NEXT: xor $1, $5, $4 ; MIPS32O0-NEXT: sltiu $1, $1, 1 -; MIPS32O0-NEXT: move $2, $6 -; MIPS32O0-NEXT: sw $6, 8($sp) # 4-byte Folded Spill -; MIPS32O0-NEXT: sw $3, 4($sp) # 4-byte Folded Spill +; MIPS32O0-NEXT: move $2, $5 ; MIPS32O0-NEXT: sw $1, 0($sp) # 4-byte Folded Spill -; MIPS32O0-NEXT: addiu $sp, $sp, 16 +; MIPS32O0-NEXT: addiu $sp, $sp, 8 ; MIPS32O0-NEXT: jr $ra ; MIPS32O0-NEXT: nop ; @@ -2013,30 +2010,27 @@ define i32 @AtomicCmpSwap32(i32 signext %oldval, i32 signext %newval) nounwind { ; MIPS32R6O0: # %bb.0: # %entry ; MIPS32R6O0-NEXT: lui $2, %hi(_gp_disp) ; MIPS32R6O0-NEXT: addiu $2, $2, %lo(_gp_disp) -; MIPS32R6O0-NEXT: addiu $sp, $sp, -24 +; MIPS32R6O0-NEXT: addiu $sp, $sp, -16 ; MIPS32R6O0-NEXT: addu $1, $2, $25 ; MIPS32R6O0-NEXT: move $2, $5 ; MIPS32R6O0-NEXT: move $3, $4 -; MIPS32R6O0-NEXT: sw $5, 20($sp) -; MIPS32R6O0-NEXT: lw $5, 20($sp) +; MIPS32R6O0-NEXT: sw $5, 12($sp) +; MIPS32R6O0-NEXT: lw $5, 12($sp) ; MIPS32R6O0-NEXT: lw $1, %got(x)($1) -; MIPS32R6O0-NEXT: lw $6, 16($sp) # 4-byte Folded Reload ; MIPS32R6O0-NEXT: $BB7_1: # %entry ; MIPS32R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS32R6O0-NEXT: ll $7, 0($1) -; MIPS32R6O0-NEXT: bnec $7, $4, $BB7_3 +; MIPS32R6O0-NEXT: ll $6, 0($1) +; MIPS32R6O0-NEXT: bnec $6, $4, $BB7_3 ; MIPS32R6O0-NEXT: # %bb.2: # %entry ; MIPS32R6O0-NEXT: # in Loop: Header=BB7_1 Depth=1 -; MIPS32R6O0-NEXT: move $8, $5 -; MIPS32R6O0-NEXT: sc $8, 0($1) -; MIPS32R6O0-NEXT: beqzc $8, $BB7_1 +; MIPS32R6O0-NEXT: move $7, $5 +; MIPS32R6O0-NEXT: sc $7, 0($1) +; MIPS32R6O0-NEXT: beqzc $7, $BB7_1 ; MIPS32R6O0-NEXT: $BB7_3: # %entry -; MIPS32R6O0-NEXT: sw $2, 12($sp) # 4-byte Folded Spill -; MIPS32R6O0-NEXT: move $2, $7 -; MIPS32R6O0-NEXT: sw $3, 8($sp) # 4-byte Folded Spill -; MIPS32R6O0-NEXT: sw $7, 16($sp) # 4-byte Folded Spill -; MIPS32R6O0-NEXT: sw $6, 4($sp) # 4-byte Folded Spill -; MIPS32R6O0-NEXT: addiu $sp, $sp, 24 +; MIPS32R6O0-NEXT: sw $2, 8($sp) # 4-byte Folded Spill +; MIPS32R6O0-NEXT: move $2, $6 +; MIPS32R6O0-NEXT: sw $3, 4($sp) # 4-byte Folded Spill +; MIPS32R6O0-NEXT: addiu $sp, $sp, 16 ; MIPS32R6O0-NEXT: jrc $ra ; ; MIPS4-LABEL: AtomicCmpSwap32: @@ -2141,20 +2135,17 @@ define i32 @AtomicCmpSwap32(i32 signext %oldval, i32 signext %newval) nounwind { ; MIPS64R6O0-NEXT: sw $3, 12($sp) ; MIPS64R6O0-NEXT: lw $3, 12($sp) ; MIPS64R6O0-NEXT: ld $1, %got_disp(x)($1) -; MIPS64R6O0-NEXT: lw $6, 8($sp) # 4-byte Folded Reload ; MIPS64R6O0-NEXT: .LBB7_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $7, 0($1) -; MIPS64R6O0-NEXT: bnec $7, $2, .LBB7_3 +; MIPS64R6O0-NEXT: ll $6, 0($1) +; MIPS64R6O0-NEXT: bnec $6, $2, .LBB7_3 ; MIPS64R6O0-NEXT: # %bb.2: # %entry ; MIPS64R6O0-NEXT: # in Loop: Header=BB7_1 Depth=1 -; MIPS64R6O0-NEXT: move $8, $3 -; MIPS64R6O0-NEXT: sc $8, 0($1) -; MIPS64R6O0-NEXT: beqzc $8, .LBB7_1 +; MIPS64R6O0-NEXT: move $7, $3 +; MIPS64R6O0-NEXT: sc $7, 0($1) +; MIPS64R6O0-NEXT: beqzc $7, .LBB7_1 ; MIPS64R6O0-NEXT: .LBB7_3: # %entry -; MIPS64R6O0-NEXT: move $2, $7 -; MIPS64R6O0-NEXT: sw $7, 8($sp) # 4-byte Folded Spill -; MIPS64R6O0-NEXT: sw $6, 4($sp) # 4-byte Folded Spill +; MIPS64R6O0-NEXT: move $2, $6 ; MIPS64R6O0-NEXT: daddiu $sp, $sp, 16 ; MIPS64R6O0-NEXT: jrc $ra ; @@ -6982,37 +6973,34 @@ define i32 @zeroreg() nounwind { ; MIPS32O0: # %bb.0: # %entry ; MIPS32O0-NEXT: lui $2, %hi(_gp_disp) ; MIPS32O0-NEXT: addiu $2, $2, %lo(_gp_disp) -; MIPS32O0-NEXT: addiu $sp, $sp, -16 +; MIPS32O0-NEXT: addiu $sp, $sp, -8 ; MIPS32O0-NEXT: addu $1, $2, $25 ; MIPS32O0-NEXT: sync ; MIPS32O0-NEXT: lw $1, %got(a)($1) ; MIPS32O0-NEXT: addiu $2, $zero, 0 ; MIPS32O0-NEXT: addiu $3, $zero, 1 -; MIPS32O0-NEXT: lw $4, 12($sp) # 4-byte Folded Reload -; MIPS32O0-NEXT: move $5, $3 +; MIPS32O0-NEXT: move $4, $3 ; MIPS32O0-NEXT: $BB17_1: # %entry ; MIPS32O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS32O0-NEXT: ll $6, 0($1) -; MIPS32O0-NEXT: bne $6, $5, $BB17_3 +; MIPS32O0-NEXT: ll $5, 0($1) +; MIPS32O0-NEXT: bne $5, $4, $BB17_3 ; MIPS32O0-NEXT: nop ; MIPS32O0-NEXT: # %bb.2: # %entry ; MIPS32O0-NEXT: # in Loop: Header=BB17_1 Depth=1 -; MIPS32O0-NEXT: move $7, $2 -; MIPS32O0-NEXT: sc $7, 0($1) -; MIPS32O0-NEXT: beqz $7, $BB17_1 +; MIPS32O0-NEXT: move $6, $2 +; MIPS32O0-NEXT: sc $6, 0($1) +; MIPS32O0-NEXT: beqz $6, $BB17_1 ; MIPS32O0-NEXT: nop ; MIPS32O0-NEXT: $BB17_3: # %entry -; MIPS32O0-NEXT: xor $1, $6, $3 +; MIPS32O0-NEXT: xor $1, $5, $3 ; MIPS32O0-NEXT: sltiu $1, $1, 1 ; MIPS32O0-NEXT: sync ; MIPS32O0-NEXT: addiu $2, $zero, 1 -; MIPS32O0-NEXT: xor $2, $6, $2 +; MIPS32O0-NEXT: xor $2, $5, $2 ; MIPS32O0-NEXT: sltiu $2, $2, 1 ; MIPS32O0-NEXT: andi $2, $2, 1 -; MIPS32O0-NEXT: sw $6, 12($sp) # 4-byte Folded Spill -; MIPS32O0-NEXT: sw $4, 8($sp) # 4-byte Folded Spill ; MIPS32O0-NEXT: sw $1, 4($sp) # 4-byte Folded Spill -; MIPS32O0-NEXT: addiu $sp, $sp, 16 +; MIPS32O0-NEXT: addiu $sp, $sp, 8 ; MIPS32O0-NEXT: jr $ra ; MIPS32O0-NEXT: nop ; @@ -7071,30 +7059,25 @@ define i32 @zeroreg() nounwind { ; MIPS32R6O0: # %bb.0: # %entry ; MIPS32R6O0-NEXT: lui $2, %hi(_gp_disp) ; MIPS32R6O0-NEXT: addiu $2, $2, %lo(_gp_disp) -; MIPS32R6O0-NEXT: addiu $sp, $sp, -8 ; MIPS32R6O0-NEXT: addu $1, $2, $25 ; MIPS32R6O0-NEXT: sync ; MIPS32R6O0-NEXT: lw $1, %got(a)($1) ; MIPS32R6O0-NEXT: addiu $2, $zero, 0 ; MIPS32R6O0-NEXT: addiu $3, $zero, 1 -; MIPS32R6O0-NEXT: lw $4, 4($sp) # 4-byte Folded Reload -; MIPS32R6O0-NEXT: move $5, $3 +; MIPS32R6O0-NEXT: move $4, $3 ; MIPS32R6O0-NEXT: $BB17_1: # %entry ; MIPS32R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS32R6O0-NEXT: ll $6, 0($1) -; MIPS32R6O0-NEXT: bnec $6, $5, $BB17_3 +; MIPS32R6O0-NEXT: ll $5, 0($1) +; MIPS32R6O0-NEXT: bnec $5, $4, $BB17_3 ; MIPS32R6O0-NEXT: # %bb.2: # %entry ; MIPS32R6O0-NEXT: # in Loop: Header=BB17_1 Depth=1 -; MIPS32R6O0-NEXT: move $7, $2 -; MIPS32R6O0-NEXT: sc $7, 0($1) -; MIPS32R6O0-NEXT: beqzc $7, $BB17_1 +; MIPS32R6O0-NEXT: move $6, $2 +; MIPS32R6O0-NEXT: sc $6, 0($1) +; MIPS32R6O0-NEXT: beqzc $6, $BB17_1 ; MIPS32R6O0-NEXT: $BB17_3: # %entry -; MIPS32R6O0-NEXT: xor $1, $6, $3 +; MIPS32R6O0-NEXT: xor $1, $5, $3 ; MIPS32R6O0-NEXT: sltiu $2, $1, 1 ; MIPS32R6O0-NEXT: sync -; MIPS32R6O0-NEXT: sw $6, 4($sp) # 4-byte Folded Spill -; MIPS32R6O0-NEXT: sw $4, 0($sp) # 4-byte Folded Spill -; MIPS32R6O0-NEXT: addiu $sp, $sp, 8 ; MIPS32R6O0-NEXT: jrc $ra ; ; MIPS4-LABEL: zeroreg: @@ -7204,7 +7187,6 @@ define i32 @zeroreg() nounwind { ; ; MIPS64R6O0-LABEL: zeroreg: ; MIPS64R6O0: # %bb.0: # %entry -; MIPS64R6O0-NEXT: daddiu $sp, $sp, -16 ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(zeroreg))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(zeroreg))) @@ -7212,24 +7194,20 @@ define i32 @zeroreg() nounwind { ; MIPS64R6O0-NEXT: ld $1, %got_disp(a)($1) ; MIPS64R6O0-NEXT: addiu $2, $zero, 0 ; MIPS64R6O0-NEXT: addiu $3, $zero, 1 -; MIPS64R6O0-NEXT: lw $4, 12($sp) # 4-byte Folded Reload -; MIPS64R6O0-NEXT: move $5, $3 +; MIPS64R6O0-NEXT: move $4, $3 ; MIPS64R6O0-NEXT: .LBB17_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: ll $6, 0($1) -; MIPS64R6O0-NEXT: bnec $6, $5, .LBB17_3 +; MIPS64R6O0-NEXT: ll $5, 0($1) +; MIPS64R6O0-NEXT: bnec $5, $4, .LBB17_3 ; MIPS64R6O0-NEXT: # %bb.2: # %entry ; MIPS64R6O0-NEXT: # in Loop: Header=BB17_1 Depth=1 -; MIPS64R6O0-NEXT: move $7, $2 -; MIPS64R6O0-NEXT: sc $7, 0($1) -; MIPS64R6O0-NEXT: beqzc $7, .LBB17_1 +; MIPS64R6O0-NEXT: move $6, $2 +; MIPS64R6O0-NEXT: sc $6, 0($1) +; MIPS64R6O0-NEXT: beqzc $6, .LBB17_1 ; MIPS64R6O0-NEXT: .LBB17_3: # %entry -; MIPS64R6O0-NEXT: xor $2, $6, $3 +; MIPS64R6O0-NEXT: xor $2, $5, $3 ; MIPS64R6O0-NEXT: sltiu $2, $2, 1 ; MIPS64R6O0-NEXT: sync -; MIPS64R6O0-NEXT: sw $6, 12($sp) # 4-byte Folded Spill -; MIPS64R6O0-NEXT: sw $4, 8($sp) # 4-byte Folded Spill -; MIPS64R6O0-NEXT: daddiu $sp, $sp, 16 ; MIPS64R6O0-NEXT: jrc $ra ; ; MM32-LABEL: zeroreg: diff --git a/llvm/test/CodeGen/Mips/atomic64.ll b/llvm/test/CodeGen/Mips/atomic64.ll index c8f08df8813a..38b47e8a6946 100644 --- a/llvm/test/CodeGen/Mips/atomic64.ll +++ b/llvm/test/CodeGen/Mips/atomic64.ll @@ -1274,32 +1274,29 @@ define i64 @AtomicCmpSwap64(i64 signext %oldval, i64 signext %newval) nounwind { ; ; MIPS64R6O0-LABEL: AtomicCmpSwap64: ; MIPS64R6O0: # %bb.0: # %entry -; MIPS64R6O0-NEXT: daddiu $sp, $sp, -48 +; MIPS64R6O0-NEXT: daddiu $sp, $sp, -32 ; MIPS64R6O0-NEXT: lui $1, %hi(%neg(%gp_rel(AtomicCmpSwap64))) ; MIPS64R6O0-NEXT: daddu $1, $1, $25 ; MIPS64R6O0-NEXT: daddiu $1, $1, %lo(%neg(%gp_rel(AtomicCmpSwap64))) ; MIPS64R6O0-NEXT: move $2, $5 ; MIPS64R6O0-NEXT: move $3, $4 -; MIPS64R6O0-NEXT: sd $5, 40($sp) -; MIPS64R6O0-NEXT: ld $5, 40($sp) +; MIPS64R6O0-NEXT: sd $5, 24($sp) +; MIPS64R6O0-NEXT: ld $5, 24($sp) ; MIPS64R6O0-NEXT: ld $1, %got_disp(x)($1) -; MIPS64R6O0-NEXT: ld $6, 32($sp) # 8-byte Folded Reload ; MIPS64R6O0-NEXT: .LBB7_1: # %entry ; MIPS64R6O0-NEXT: # =>This Inner Loop Header: Depth=1 -; MIPS64R6O0-NEXT: lld $7, 0($1) -; MIPS64R6O0-NEXT: bnec $7, $4, .LBB7_3 +; MIPS64R6O0-NEXT: lld $6, 0($1) +; MIPS64R6O0-NEXT: bnec $6, $4, .LBB7_3 ; MIPS64R6O0-NEXT: # %bb.2: # %entry ; MIPS64R6O0-NEXT: # in Loop: Header=BB7_1 Depth=1 -; MIPS64R6O0-NEXT: move $8, $5 -; MIPS64R6O0-NEXT: scd $8, 0($1) -; MIPS64R6O0-NEXT: beqzc $8, .LBB7_1 +; MIPS64R6O0-NEXT: move $7, $5 +; MIPS64R6O0-NEXT: scd $7, 0($1) +; MIPS64R6O0-NEXT: beqzc $7, .LBB7_1 ; MIPS64R6O0-NEXT: .LBB7_3: # %entry -; MIPS64R6O0-NEXT: sd $2, 24($sp) # 8-byte Folded Spill -; MIPS64R6O0-NEXT: move $2, $7 -; MIPS64R6O0-NEXT: sd $3, 16($sp) # 8-byte Folded Spill -; MIPS64R6O0-NEXT: sd $7, 32($sp) # 8-byte Folded Spill -; MIPS64R6O0-NEXT: sd $6, 8($sp) # 8-byte Folded Spill -; MIPS64R6O0-NEXT: daddiu $sp, $sp, 48 +; MIPS64R6O0-NEXT: sd $2, 16($sp) # 8-byte Folded Spill +; MIPS64R6O0-NEXT: move $2, $6 +; MIPS64R6O0-NEXT: sd $3, 8($sp) # 8-byte Folded Spill +; MIPS64R6O0-NEXT: daddiu $sp, $sp, 32 ; MIPS64R6O0-NEXT: jrc $ra ; ; O1-LABEL: AtomicCmpSwap64: diff --git a/llvm/test/CodeGen/Mips/atomicCmpSwapPW.ll b/llvm/test/CodeGen/Mips/atomicCmpSwapPW.ll index bc4b48993500..c07d42de529e 100644 --- a/llvm/test/CodeGen/Mips/atomicCmpSwapPW.ll +++ b/llvm/test/CodeGen/Mips/atomicCmpSwapPW.ll @@ -18,24 +18,22 @@ define void @foo(i32 %new, i32 %old) { ; O32-NEXT: lui $3, %hi(sym) ; O32-NEXT: lw $3, %lo(sym)($3) ; O32-NEXT: sync -; O32-NEXT: lw $6, 12($sp) # 4-byte Folded Reload ; O32-NEXT: $BB0_1: # %entry ; O32-NEXT: # =>This Inner Loop Header: Depth=1 -; O32-NEXT: ll $7, 0($3) -; O32-NEXT: bne $7, $4, $BB0_3 +; O32-NEXT: ll $6, 0($3) +; O32-NEXT: bne $6, $4, $BB0_3 ; O32-NEXT: nop ; O32-NEXT: # %bb.2: # %entry ; O32-NEXT: # in Loop: Header=BB0_1 Depth=1 -; O32-NEXT: move $8, $5 -; O32-NEXT: sc $8, 0($3) -; O32-NEXT: beqz $8, $BB0_1 +; O32-NEXT: move $7, $5 +; O32-NEXT: sc $7, 0($3) +; O32-NEXT: beqz $7, $BB0_1 ; O32-NEXT: nop ; O32-NEXT: $BB0_3: # %entry ; O32-NEXT: sync -; O32-NEXT: sw $1, 8($sp) # 4-byte Folded Spill -; O32-NEXT: sw $2, 4($sp) # 4-byte Folded Spill -; O32-NEXT: sw $7, 12($sp) # 4-byte Folded Spill -; O32-NEXT: sw $6, 0($sp) # 4-byte Folded Spill +; O32-NEXT: sw $1, 12($sp) # 4-byte Folded Spill +; O32-NEXT: sw $2, 8($sp) # 4-byte Folded Spill +; O32-NEXT: sw $6, 4($sp) # 4-byte Folded Spill ; O32-NEXT: addiu $sp, $sp, 16 ; O32-NEXT: jr $ra ; O32-NEXT: nop @@ -51,22 +49,20 @@ define void @foo(i32 %new, i32 %old) { ; N32-NEXT: lui $3, %hi(sym) ; N32-NEXT: lw $3, %lo(sym)($3) ; N32-NEXT: sync -; N32-NEXT: lw $6, 12($sp) # 4-byte Folded Reload ; N32-NEXT: .LBB0_1: # %entry ; N32-NEXT: # =>This Inner Loop Header: Depth=1 -; N32-NEXT: ll $7, 0($3) -; N32-NEXT: bne $7, $2, .LBB0_3 +; N32-NEXT: ll $6, 0($3) +; N32-NEXT: bne $6, $2, .LBB0_3 ; N32-NEXT: nop ; N32-NEXT: # %bb.2: # %entry ; N32-NEXT: # in Loop: Header=BB0_1 Depth=1 -; N32-NEXT: move $8, $1 -; N32-NEXT: sc $8, 0($3) -; N32-NEXT: beqz $8, .LBB0_1 +; N32-NEXT: move $7, $1 +; N32-NEXT: sc $7, 0($3) +; N32-NEXT: beqz $7, .LBB0_1 ; N32-NEXT: nop ; N32-NEXT: .LBB0_3: # %entry ; N32-NEXT: sync -; N32-NEXT: sw $7, 12($sp) # 4-byte Folded Spill -; N32-NEXT: sw $6, 8($sp) # 4-byte Folded Spill +; N32-NEXT: sw $6, 12($sp) # 4-byte Folded Spill ; N32-NEXT: addiu $sp, $sp, 16 ; N32-NEXT: jr $ra ; N32-NEXT: nop @@ -86,22 +82,20 @@ define void @foo(i32 %new, i32 %old) { ; N64-NEXT: dsll $3, $3, 16 ; N64-NEXT: ld $3, %lo(sym)($3) ; N64-NEXT: sync -; N64-NEXT: lw $6, 12($sp) # 4-byte Folded Reload ; N64-NEXT: .LBB0_1: # %entry ; N64-NEXT: # =>This Inner Loop Header: Depth=1 -; N64-NEXT: ll $7, 0($3) -; N64-NEXT: bne $7, $2, .LBB0_3 +; N64-NEXT: ll $6, 0($3) +; N64-NEXT: bne $6, $2, .LBB0_3 ; N64-NEXT: nop ; N64-NEXT: # %bb.2: # %entry ; N64-NEXT: # in Loop: Header=BB0_1 Depth=1 -; N64-NEXT: move $8, $1 -; N64-NEXT: sc $8, 0($3) -; N64-NEXT: beqz $8, .LBB0_1 +; N64-NEXT: move $7, $1 +; N64-NEXT: sc $7, 0($3) +; N64-NEXT: beqz $7, .LBB0_1 ; N64-NEXT: nop ; N64-NEXT: .LBB0_3: # %entry ; N64-NEXT: sync -; N64-NEXT: sw $7, 12($sp) # 4-byte Folded Spill -; N64-NEXT: sw $6, 8($sp) # 4-byte Folded Spill +; N64-NEXT: sw $6, 12($sp) # 4-byte Folded Spill ; N64-NEXT: daddiu $sp, $sp, 16 ; N64-NEXT: jr $ra ; N64-NEXT: nop