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[IR] Require ArrayRef of 'uint32_t' instead of 'int' for the mask argument for one of the signatures of CreateShuffleVector. This better emphasises that you can't use it for the -1 as undef behavior. 

llvm-svn: 272491
This commit is contained in:
Craig Topper 2016-06-12 00:41:19 +00:00
parent 778a7eddb5
commit 99d1eab327
5 changed files with 15 additions and 20 deletions
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1
llvm/include/llvm/IR/Constants.h
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@ -725,7 +725,6 @@ public:
static Constant *get(LLVMContext &Context, ArrayRef<uint8_t> Elts);
static Constant *get(LLVMContext &Context, ArrayRef<uint16_t> Elts);
static Constant *get(LLVMContext &Context, ArrayRef<uint32_t> Elts);
static Constant *get(LLVMContext &Context, ArrayRef<int32_t> Elts);
static Constant *get(LLVMContext &Context, ArrayRef<uint64_t> Elts);
static Constant *get(LLVMContext &Context, ArrayRef<float> Elts);
static Constant *get(LLVMContext &Context, ArrayRef<double> Elts);

2
llvm/include/llvm/IR/IRBuilder.h
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@ -1646,7 +1646,7 @@ public:
return Insert(new ShuffleVectorInst(V1, V2, Mask), Name);
}
Value *CreateShuffleVector(Value *V1, Value *V2, ArrayRef<int> IntMask,
Value *CreateShuffleVector(Value *V1, Value *V2, ArrayRef<uint32_t> IntMask,
const Twine &Name = "") {
Value *Mask = ConstantDataVector::get(Context, IntMask);
return CreateShuffleVector(V1, V2, Mask, Name);

21
llvm/lib/IR/AutoUpgrade.cpp
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@ -352,7 +352,7 @@ static Value *UpgradeX86PSLLDQIntrinsics(IRBuilder<> &Builder, LLVMContext &C,
// If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
// we'll just return the zero vector.
if (Shift < 16) {
int Idxs[64];
uint32_t Idxs[64];
// 256/512-bit version is split into 2/4 16-byte lanes.
for (unsigned l = 0; l != NumElts; l += 16)
for (unsigned i = 0; i != 16; ++i) {
@ -390,7 +390,7 @@ static Value *UpgradeX86PALIGNRIntrinsics(IRBuilder<> &Builder, LLVMContext &C,
Op0 = llvm::Constant::getNullValue(Op0->getType());
}
int Indices[64];
uint32_t Indices[64];
// 256-bit palignr operates on 128-bit lanes so we need to handle that
for (unsigned l = 0; l != NumElts; l += 16) {
for (unsigned i = 0; i != 16; ++i) {
@ -434,7 +434,7 @@ static Value *UpgradeX86PSRLDQIntrinsics(IRBuilder<> &Builder, LLVMContext &C,
// If shift is less than 16, emit a shuffle to move the bytes. Otherwise,
// we'll just return the zero vector.
if (Shift < 16) {
int Idxs[64];
uint32_t Idxs[64];
// 256/512-bit version is split into 2/4 16-byte lanes.
for (unsigned l = 0; l != NumElts; l += 16)
for (unsigned i = 0; i != 16; ++i) {
@ -474,7 +474,7 @@ static Value *UpgradeMaskedStore(IRBuilder<> &Builder, LLVMContext &C,
// If we have less than 8 elements, then the starting mask was an i8 and
// we need to extract down to the right number of elements.
if (NumElts < 8) {
int Indices[4];
uint32_t Indices[4];
for (unsigned i = 0; i != NumElts; ++i)
Indices[i] = i;
Mask = Builder.CreateShuffleVector(Mask, Mask,
@ -508,7 +508,7 @@ static Value *UpgradeMaskedLoad(IRBuilder<> &Builder, LLVMContext &C,
// If we have less than 8 elements, then the starting mask was an i8 and
// we need to extract down to the right number of elements.
if (NumElts < 8) {
int Indices[4];
uint32_t Indices[4];
for (unsigned i = 0; i != NumElts; ++i)
Indices[i] = i;
Mask = Builder.CreateShuffleVector(Mask, Mask,
@ -562,8 +562,9 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
unsigned NumDstElts = DstTy->getNumElements();
if (NumDstElts < SrcTy->getNumElements()) {
assert(NumDstElts == 2 && "Unexpected vector size");
const int ShuffleMask[2] = { 0, 1 };
Rep = Builder.CreateShuffleVector(Rep, UndefValue::get(SrcTy), ShuffleMask);
uint32_t ShuffleMask[2] = { 0, 1 };
Rep = Builder.CreateShuffleVector(Rep, UndefValue::get(SrcTy),
ShuffleMask);
}
bool Int2Double = (StringRef::npos != Name.find("cvtdq2"));
@ -748,8 +749,8 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
unsigned NumDstElts = DstTy->getNumElements();
// Extract a subvector of the first NumDstElts lanes and sign/zero extend.
SmallVector<int, 8> ShuffleMask;
for (int i = 0; i != (int)NumDstElts; ++i)
SmallVector<uint32_t, 8> ShuffleMask;
for (unsigned i = 0; i != NumDstElts; ++i)
ShuffleMask.push_back(i);
Value *SV = Builder.CreateShuffleVector(
@ -764,7 +765,7 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
Value *Op = Builder.CreatePointerCast(CI->getArgOperand(0),
PointerType::getUnqual(VT));
Value *Load = Builder.CreateLoad(VT, Op);
const int Idxs[4] = { 0, 1, 0, 1 };
uint32_t Idxs[4] = { 0, 1, 0, 1 };
Rep = Builder.CreateShuffleVector(Load, UndefValue::get(Load->getType()),
Idxs);
} else if (Name.startswith("llvm.x86.avx2.pbroadcast") ||

5
llvm/lib/IR/Constants.cpp
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@ -2500,11 +2500,6 @@ Constant *ConstantDataVector::get(LLVMContext &Context, ArrayRef<uint32_t> Elts)
const char *Data = reinterpret_cast<const char *>(Elts.data());
return getImpl(StringRef(const_cast<char *>(Data), Elts.size()*4), Ty);
}
Constant *ConstantDataVector::get(LLVMContext &Context, ArrayRef<int32_t> Elts){
Type *Ty = VectorType::get(Type::getInt32Ty(Context), Elts.size());
const char *Data = reinterpret_cast<const char *>(Elts.data());
return getImpl(StringRef(const_cast<char *>(Data), Elts.size()*4), Ty);
}
Constant *ConstantDataVector::get(LLVMContext &Context, ArrayRef<uint64_t> Elts){
Type *Ty = VectorType::get(Type::getInt64Ty(Context), Elts.size());
const char *Data = reinterpret_cast<const char *>(Elts.data());

6
llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
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@ -502,7 +502,7 @@ static Value *simplifyX86insertps(const IntrinsicInst &II,
return ZeroVector;
// Initialize by passing all of the first source bits through.
int ShuffleMask[4] = { 0, 1, 2, 3 };
uint32_t ShuffleMask[4] = { 0, 1, 2, 3 };
// We may replace the second operand with the zero vector.
Value *V1 = II.getArgOperand(1);
@ -890,7 +890,7 @@ static Value *simplifyX86vperm2(const IntrinsicInst &II,
// If 0 or 1 zero mask bits are set, this is a simple shuffle.
unsigned NumElts = VecTy->getNumElements();
unsigned HalfSize = NumElts / 2;
SmallVector<int, 8> ShuffleMask(NumElts);
SmallVector<uint32_t, 8> ShuffleMask(NumElts);
// The high bit of the selection field chooses the 1st or 2nd operand.
bool LowInputSelect = Imm & 0x02;
@ -1568,7 +1568,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
if (isa<ConstantDataVector>(Arg)) {
auto VectorHalfAsShorts = Arg;
if (RetWidth < ArgWidth) {
SmallVector<int, 8> SubVecMask;
SmallVector<uint32_t, 8> SubVecMask;
for (unsigned i = 0; i != RetWidth; ++i)
SubVecMask.push_back((int)i);
VectorHalfAsShorts = Builder->CreateShuffleVector(