forked from OSchip/llvm-project
[AArch64] Add a test case for the repairing of definitions.
llvm-svn: 266026
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904a2c7422
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@ -21,6 +21,10 @@
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entry:
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ret void
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}
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define void @defaultMappingDefRepair() {
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entry:
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ret void
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}
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...
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---
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@ -100,3 +104,27 @@ body: |
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%0(32) = COPY %s0
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%1(32) = G_ADD i32 %0, %0
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...
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---
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# Check that we repair the definition of %1.
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# %1 is forced to be into FPR, but its definition actually
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# requires that it lives in GPR. Make sure regbankselect
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# fixes that.
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name: defaultMappingDefRepair
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isSSA: true
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# CHECK: registers:
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# CHECK-NEXT: - { id: 0, class: gpr }
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# CHECK-NEXT: - { id: 1, class: fpr }
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# CHECK-NEXT: - { id: 2, class: gpr }
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: fpr }
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body: |
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bb.0.entry:
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liveins: %w0
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; CHECK: %0(32) = COPY %w0
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; CHECK-NEXT: %2(32) = G_ADD i32 %0, %w0
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; CHECK-NEXT: %1(32) = COPY %2
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%0(32) = COPY %w0
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%1(32) = G_ADD i32 %0, %w0
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...
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