forked from OSchip/llvm-project
[tests][LV] precommit tests for D93317
This commit is contained in:
Philip Reames
parent
cfa1010c42
commit
99ac8868cf
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@ -1,16 +1,80 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -loop-vectorize < %s | FileCheck %s
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target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
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; Check that we vectorize only bottom-tested loops.
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; This is a reduced testcase from PR21302.
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define void @bottom_tested(i16* %p, i32 %n) {
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; CHECK-LABEL: @bottom_tested(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: [[TMP0:%.*]] = icmp sgt i32 [[N:%.*]], 0
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; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP0]], i32 [[N]], i32 0
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; CHECK-NEXT: [[TMP1:%.*]] = add nuw i32 [[SMAX]], 1
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[TMP1]], 2
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
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; CHECK: vector.ph:
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; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[TMP1]], 2
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; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[TMP1]], [[N_MOD_VF]]
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; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
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; CHECK: vector.body:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[INDEX]], 0
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; CHECK-NEXT: [[TMP3:%.*]] = sext i32 [[TMP2]] to i64
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; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds i16, i16* [[P:%.*]], i64 [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds i16, i16* [[TMP4]], i32 0
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; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16* [[TMP5]] to <2 x i16>*
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; CHECK-NEXT: store <2 x i16> zeroinitializer, <2 x i16>* [[TMP6]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add i32 [[INDEX]], 2
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; CHECK-NEXT: [[TMP7:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP7]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]]
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; CHECK: middle.block:
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; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[TMP1]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[CMP_N]], label [[IF_END:%.*]], label [[SCALAR_PH]]
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; CHECK: scalar.ph:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INC:%.*]], [[FOR_COND]] ]
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; CHECK-NEXT: [[IPROM:%.*]] = sext i32 [[I]] to i64
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; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds i16, i16* [[P]], i64 [[IPROM]]
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; CHECK-NEXT: store i16 0, i16* [[B]], align 4
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; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I]], [[N]]
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_COND]], label [[IF_END]], [[LOOP2:!llvm.loop !.*]]
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; CHECK: if.end:
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; CHECK-NEXT: ret void
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;
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; rdar://problem/18886083
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entry:
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br label %for.cond
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%struct.X = type { i32, i16 }
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; CHECK-LABEL: @foo(
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; CHECK-NOT: vector.body
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for.cond:
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%i = phi i32 [ 0, %entry ], [ %inc, %for.cond ]
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%iprom = sext i32 %i to i64
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%b = getelementptr inbounds i16, i16* %p, i64 %iprom
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store i16 0, i16* %b, align 4
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%inc = add nsw i32 %i, 1
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%cmp = icmp slt i32 %i, %n
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br i1 %cmp, label %for.cond, label %if.end
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define void @foo(i32 %n) {
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if.end:
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ret void
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}
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define void @early_exit(i16* %p, i32 %n) {
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; CHECK-LABEL: @early_exit(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[IF_END:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[IPROM:%.*]] = sext i32 [[I]] to i64
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; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds i16, i16* [[P:%.*]], i64 [[IPROM]]
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; CHECK-NEXT: store i16 0, i16* [[B]], align 4
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; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1
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; CHECK-NEXT: br label [[FOR_COND]]
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; CHECK: if.end:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for.cond
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@ -21,7 +85,7 @@ for.cond:
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for.body:
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%iprom = sext i32 %i to i64
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%b = getelementptr inbounds %struct.X, %struct.X* undef, i64 %iprom, i32 1
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%b = getelementptr inbounds i16, i16* %p, i64 %iprom
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store i16 0, i16* %b, align 4
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%inc = add nsw i32 %i, 1
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br label %for.cond
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@ -29,3 +93,248 @@ for.body:
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if.end:
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ret void
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}
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; multiple exit - no values inside the loop used outside
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define void @multiple_unique_exit(i16* %p, i32 %n) {
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; CHECK-LABEL: @multiple_unique_exit(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[IF_END:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[IPROM:%.*]] = sext i32 [[I]] to i64
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; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds i16, i16* [[P:%.*]], i64 [[IPROM]]
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; CHECK-NEXT: store i16 0, i16* [[B]], align 4
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; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1
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; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[I]], 2096
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END]]
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; CHECK: if.end:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for.cond
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for.cond:
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%i = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%cmp = icmp slt i32 %i, %n
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br i1 %cmp, label %for.body, label %if.end
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for.body:
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%iprom = sext i32 %i to i64
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%b = getelementptr inbounds i16, i16* %p, i64 %iprom
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store i16 0, i16* %b, align 4
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%inc = add nsw i32 %i, 1
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%cmp2 = icmp slt i32 %i, 2096
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br i1 %cmp2, label %for.cond, label %if.end
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if.end:
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ret void
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}
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; multiple exit - with an lcssa phi
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define i32 @multiple_unique_exit2(i16* %p, i32 %n) {
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; CHECK-LABEL: @multiple_unique_exit2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[IF_END:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[IPROM:%.*]] = sext i32 [[I]] to i64
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; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds i16, i16* [[P:%.*]], i64 [[IPROM]]
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; CHECK-NEXT: store i16 0, i16* [[B]], align 4
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; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1
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; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[I]], 2096
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END]]
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; CHECK: if.end:
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; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[FOR_BODY]] ], [ [[I]], [[FOR_COND]] ]
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; CHECK-NEXT: ret i32 [[I_LCSSA]]
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;
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entry:
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br label %for.cond
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for.cond:
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%i = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%cmp = icmp slt i32 %i, %n
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br i1 %cmp, label %for.body, label %if.end
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for.body:
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%iprom = sext i32 %i to i64
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%b = getelementptr inbounds i16, i16* %p, i64 %iprom
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store i16 0, i16* %b, align 4
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%inc = add nsw i32 %i, 1
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%cmp2 = icmp slt i32 %i, 2096
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br i1 %cmp2, label %for.cond, label %if.end
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if.end:
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ret i32 %i
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}
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; multiple exit w/a non lcssa phi
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define i32 @multiple_unique_exit3(i16* %p, i32 %n) {
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; CHECK-LABEL: @multiple_unique_exit3(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[IF_END:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[IPROM:%.*]] = sext i32 [[I]] to i64
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; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds i16, i16* [[P:%.*]], i64 [[IPROM]]
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; CHECK-NEXT: store i16 0, i16* [[B]], align 4
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; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1
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; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[I]], 2096
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END]]
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; CHECK: if.end:
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; CHECK-NEXT: [[EXIT:%.*]] = phi i32 [ 0, [[FOR_COND]] ], [ 1, [[FOR_BODY]] ]
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; CHECK-NEXT: ret i32 [[EXIT]]
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;
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entry:
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br label %for.cond
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for.cond:
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%i = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%cmp = icmp slt i32 %i, %n
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br i1 %cmp, label %for.body, label %if.end
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for.body:
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%iprom = sext i32 %i to i64
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%b = getelementptr inbounds i16, i16* %p, i64 %iprom
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store i16 0, i16* %b, align 4
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%inc = add nsw i32 %i, 1
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%cmp2 = icmp slt i32 %i, 2096
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br i1 %cmp2, label %for.cond, label %if.end
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if.end:
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%exit = phi i32 [0, %for.cond], [1, %for.body]
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ret i32 %exit
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}
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; multiple exits w/distinct target blocks
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define i32 @multiple_exit_blocks(i16* %p, i32 %n) {
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; CHECK-LABEL: @multiple_exit_blocks(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_BODY:%.*]] ]
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I]], [[N:%.*]]
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; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[IF_END:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[IPROM:%.*]] = sext i32 [[I]] to i64
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; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds i16, i16* [[P:%.*]], i64 [[IPROM]]
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; CHECK-NEXT: store i16 0, i16* [[B]], align 4
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; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1
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; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[I]], 2096
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; CHECK-NEXT: br i1 [[CMP2]], label [[FOR_COND]], label [[IF_END2:%.*]]
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; CHECK: if.end:
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; CHECK-NEXT: ret i32 0
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; CHECK: if.end2:
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; CHECK-NEXT: ret i32 1
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;
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entry:
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br label %for.cond
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for.cond:
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%i = phi i32 [ 0, %entry ], [ %inc, %for.body ]
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%cmp = icmp slt i32 %i, %n
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br i1 %cmp, label %for.body, label %if.end
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for.body:
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%iprom = sext i32 %i to i64
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%b = getelementptr inbounds i16, i16* %p, i64 %iprom
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store i16 0, i16* %b, align 4
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%inc = add nsw i32 %i, 1
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%cmp2 = icmp slt i32 %i, 2096
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br i1 %cmp2, label %for.cond, label %if.end2
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if.end:
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ret i32 0
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if.end2:
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ret i32 1
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}
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; unique exit case but with a switch as two edges between the same pair of
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; blocks is an often missed edge case
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define i32 @multiple_exit_switch(i16* %p, i32 %n) {
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; CHECK-LABEL: @multiple_exit_switch(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_COND]] ]
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; CHECK-NEXT: [[IPROM:%.*]] = sext i32 [[I]] to i64
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; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds i16, i16* [[P:%.*]], i64 [[IPROM]]
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; CHECK-NEXT: store i16 0, i16* [[B]], align 4
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; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1
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; CHECK-NEXT: switch i32 [[I]], label [[FOR_COND]] [
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; CHECK-NEXT: i32 2096, label [[IF_END:%.*]]
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; CHECK-NEXT: i32 2097, label [[IF_END]]
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; CHECK-NEXT: ]
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; CHECK: if.end:
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; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[I]], [[FOR_COND]] ], [ [[I]], [[FOR_COND]] ]
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; CHECK-NEXT: ret i32 [[I_LCSSA]]
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;
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entry:
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br label %for.cond
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for.cond:
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%i = phi i32 [ 0, %entry ], [ %inc, %for.cond ]
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%iprom = sext i32 %i to i64
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%b = getelementptr inbounds i16, i16* %p, i64 %iprom
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store i16 0, i16* %b, align 4
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%inc = add nsw i32 %i, 1
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switch i32 %i, label %for.cond [
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i32 2096, label %if.end
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i32 2097, label %if.end
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]
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if.end:
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ret i32 %i
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}
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; multiple exit case but with a switch as multiple exiting edges from
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; a single block is a commonly missed edge case
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define i32 @multiple_exit_switch2(i16* %p, i32 %n) {
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; CHECK-LABEL: @multiple_exit_switch2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_COND:%.*]]
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; CHECK: for.cond:
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; CHECK-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[INC:%.*]], [[FOR_COND]] ]
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; CHECK-NEXT: [[IPROM:%.*]] = sext i32 [[I]] to i64
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; CHECK-NEXT: [[B:%.*]] = getelementptr inbounds i16, i16* [[P:%.*]], i64 [[IPROM]]
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; CHECK-NEXT: store i16 0, i16* [[B]], align 4
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; CHECK-NEXT: [[INC]] = add nsw i32 [[I]], 1
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; CHECK-NEXT: switch i32 [[I]], label [[FOR_COND]] [
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; CHECK-NEXT: i32 2096, label [[IF_END:%.*]]
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; CHECK-NEXT: i32 2097, label [[IF_END2:%.*]]
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; CHECK-NEXT: ]
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; CHECK: if.end:
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; CHECK-NEXT: ret i32 0
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; CHECK: if.end2:
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; CHECK-NEXT: ret i32 1
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;
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entry:
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br label %for.cond
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for.cond:
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%i = phi i32 [ 0, %entry ], [ %inc, %for.cond ]
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%iprom = sext i32 %i to i64
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%b = getelementptr inbounds i16, i16* %p, i64 %iprom
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store i16 0, i16* %b, align 4
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%inc = add nsw i32 %i, 1
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switch i32 %i, label %for.cond [
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i32 2096, label %if.end
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i32 2097, label %if.end2
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]
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if.end:
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ret i32 0
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if.end2:
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ret i32 1
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}
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