[InstCombine] Use SimplifyDemandedVectorEltsLow helper function. NFCI.

Use the SimplifyDemandedVectorEltsLow helper function introduced in D12680.

llvm-svn: 248089
This commit is contained in:
Simon Pilgrim 2015-09-19 11:41:53 +00:00
parent 5881d349f9
commit 996725eb17
1 changed files with 8 additions and 17 deletions

View File

@ -854,9 +854,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
} }
// We only use the lowest lanes of the argument. // We only use the lowest lanes of the argument.
APInt DemandedElts = APInt::getLowBitsSet(ArgWidth, RetWidth); if (Value *V = SimplifyDemandedVectorEltsLow(Arg, ArgWidth, RetWidth)) {
APInt UndefElts(ArgWidth, 0);
if (Value *V = SimplifyDemandedVectorElts(Arg, DemandedElts, UndefElts)) {
II->setArgOperand(0, V); II->setArgOperand(0, V);
return II; return II;
} }
@ -873,12 +871,9 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
case Intrinsic::x86_sse2_cvttsd2si64: { case Intrinsic::x86_sse2_cvttsd2si64: {
// These intrinsics only demand the 0th element of their input vectors. If // These intrinsics only demand the 0th element of their input vectors. If
// we can simplify the input based on that, do so now. // we can simplify the input based on that, do so now.
unsigned VWidth = Value *Arg = II->getArgOperand(0);
cast<VectorType>(II->getArgOperand(0)->getType())->getNumElements(); unsigned VWidth = Arg->getType()->getVectorNumElements();
APInt DemandedElts(VWidth, 1); if (Value *V = SimplifyDemandedVectorEltsLow(Arg, VWidth, 1)) {
APInt UndefElts(VWidth, 0);
if (Value *V = SimplifyDemandedVectorElts(II->getArgOperand(0),
DemandedElts, UndefElts)) {
II->setArgOperand(0, V); II->setArgOperand(0, V);
return II; return II;
} }
@ -929,16 +924,12 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
// SSE2/AVX2 uses only the first 64-bits of the 128-bit vector // SSE2/AVX2 uses only the first 64-bits of the 128-bit vector
// operand to compute the shift amount. // operand to compute the shift amount.
auto ShiftAmt = II->getArgOperand(1); Value *Arg1 = II->getArgOperand(1);
auto ShiftType = cast<VectorType>(ShiftAmt->getType()); assert(Arg1->getType()->getPrimitiveSizeInBits() == 128 &&
assert(ShiftType->getPrimitiveSizeInBits() == 128 &&
"Unexpected packed shift size"); "Unexpected packed shift size");
unsigned VWidth = ShiftType->getNumElements(); unsigned VWidth = Arg1->getType()->getVectorNumElements();
APInt DemandedElts = APInt::getLowBitsSet(VWidth, VWidth / 2); if (Value *V = SimplifyDemandedVectorEltsLow(Arg1, VWidth, VWidth / 2)) {
APInt UndefElts(VWidth, 0);
if (Value *V =
SimplifyDemandedVectorElts(ShiftAmt, DemandedElts, UndefElts)) {
II->setArgOperand(1, V); II->setArgOperand(1, V);
return II; return II;
} }