forked from OSchip/llvm-project
[InstCombine] Use SimplifyDemandedVectorEltsLow helper function. NFCI.
Use the SimplifyDemandedVectorEltsLow helper function introduced in D12680. llvm-svn: 248089
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@ -854,9 +854,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
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}
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}
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// We only use the lowest lanes of the argument.
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// We only use the lowest lanes of the argument.
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APInt DemandedElts = APInt::getLowBitsSet(ArgWidth, RetWidth);
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if (Value *V = SimplifyDemandedVectorEltsLow(Arg, ArgWidth, RetWidth)) {
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APInt UndefElts(ArgWidth, 0);
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if (Value *V = SimplifyDemandedVectorElts(Arg, DemandedElts, UndefElts)) {
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II->setArgOperand(0, V);
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II->setArgOperand(0, V);
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return II;
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return II;
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}
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}
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@ -873,12 +871,9 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
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case Intrinsic::x86_sse2_cvttsd2si64: {
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case Intrinsic::x86_sse2_cvttsd2si64: {
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// These intrinsics only demand the 0th element of their input vectors. If
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// These intrinsics only demand the 0th element of their input vectors. If
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// we can simplify the input based on that, do so now.
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// we can simplify the input based on that, do so now.
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unsigned VWidth =
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Value *Arg = II->getArgOperand(0);
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cast<VectorType>(II->getArgOperand(0)->getType())->getNumElements();
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unsigned VWidth = Arg->getType()->getVectorNumElements();
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APInt DemandedElts(VWidth, 1);
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if (Value *V = SimplifyDemandedVectorEltsLow(Arg, VWidth, 1)) {
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APInt UndefElts(VWidth, 0);
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if (Value *V = SimplifyDemandedVectorElts(II->getArgOperand(0),
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DemandedElts, UndefElts)) {
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II->setArgOperand(0, V);
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II->setArgOperand(0, V);
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return II;
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return II;
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}
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}
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@ -929,16 +924,12 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) {
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// SSE2/AVX2 uses only the first 64-bits of the 128-bit vector
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// SSE2/AVX2 uses only the first 64-bits of the 128-bit vector
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// operand to compute the shift amount.
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// operand to compute the shift amount.
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auto ShiftAmt = II->getArgOperand(1);
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Value *Arg1 = II->getArgOperand(1);
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auto ShiftType = cast<VectorType>(ShiftAmt->getType());
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assert(Arg1->getType()->getPrimitiveSizeInBits() == 128 &&
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assert(ShiftType->getPrimitiveSizeInBits() == 128 &&
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"Unexpected packed shift size");
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"Unexpected packed shift size");
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unsigned VWidth = ShiftType->getNumElements();
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unsigned VWidth = Arg1->getType()->getVectorNumElements();
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APInt DemandedElts = APInt::getLowBitsSet(VWidth, VWidth / 2);
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if (Value *V = SimplifyDemandedVectorEltsLow(Arg1, VWidth, VWidth / 2)) {
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APInt UndefElts(VWidth, 0);
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if (Value *V =
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SimplifyDemandedVectorElts(ShiftAmt, DemandedElts, UndefElts)) {
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II->setArgOperand(1, V);
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II->setArgOperand(1, V);
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return II;
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return II;
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}
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}
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