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[NVPTX] Fix case where a sext load of an i1 type may produce an 

ld.u1 instead of an ld.u8.

llvm-svn: 182924
This commit is contained in:
Justin Holewinski 2013-05-30 12:22:39 +00:00
parent 2714ba03f6
commit 994d66a345
2 changed files with 18 additions and 2 deletions
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6
llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
View File

@ -205,7 +205,8 @@ SDNode *NVPTXDAGToDAGISel::SelectLoad(SDNode *N) {
// type is integer // type is integer
// Float : ISD::NON_EXTLOAD or ISD::EXTLOAD and the type is float // Float : ISD::NON_EXTLOAD or ISD::EXTLOAD and the type is float
MVT ScalarVT = SimpleVT.getScalarType(); MVT ScalarVT = SimpleVT.getScalarType();
unsigned fromTypeWidth = ScalarVT.getSizeInBits(); // Read at least 8 bits (predicates are stored as 8-bit values)
unsigned fromTypeWidth = std::max(8U, ScalarVT.getSizeInBits());
unsigned int fromType; unsigned int fromType;
if ((LD->getExtensionType() == ISD::SEXTLOAD)) if ((LD->getExtensionType() == ISD::SEXTLOAD))
fromType = NVPTX::PTXLdStInstCode::Signed; fromType = NVPTX::PTXLdStInstCode::Signed;
@ -430,7 +431,8 @@ SDNode *NVPTXDAGToDAGISel::SelectLoadVector(SDNode *N) {
// type is integer // type is integer
// Float : ISD::NON_EXTLOAD or ISD::EXTLOAD and the type is float // Float : ISD::NON_EXTLOAD or ISD::EXTLOAD and the type is float
MVT ScalarVT = SimpleVT.getScalarType(); MVT ScalarVT = SimpleVT.getScalarType();
unsigned FromTypeWidth = ScalarVT.getSizeInBits(); // Read at least 8 bits (predicates are stored as 8-bit values)
unsigned FromTypeWidth = std::max(8U, ScalarVT.getSizeInBits());
unsigned int FromType; unsigned int FromType;
// The last operand holds the original LoadSDNode::getExtensionType() value // The last operand holds the original LoadSDNode::getExtensionType() value
unsigned ExtensionType = cast<ConstantSDNode>( unsigned ExtensionType = cast<ConstantSDNode>(

14
llvm/test/CodeGen/NVPTX/load-sext-i1.ll Normal file
View File

@ -0,0 +1,14 @@
; RUN: llc < %s -march=nvptx -mcpu=sm_20 -drvcuda | FileCheck %s
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
define void @main(i1* %a1, i32 %a2, i32* %arg3) {
; CHECK: ld.u8
; CHECK-NOT: ld.u1
%t1 = getelementptr i1* %a1, i32 %a2
%t2 = load i1* %t1
%t3 = sext i1 %t2 to i32
store i32 %t3, i32* %arg3
ret void
}