forked from OSchip/llvm-project
AMDGPUCodeGen: Fix warnings in r303111. [-Wunused-variable]
llvm-svn: 303137
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@ -136,9 +136,11 @@ void PHILinearize::phiInfoElementAddSource(PHIInfoElementT *Info,
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// sources, because we cannot have different registers with
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// identical predecessors, but we can have the same register for
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// multiple predecessors.
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#if !defined(NDEBUG)
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for (auto SI : phiInfoElementGetSources(Info)) {
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assert((SI.second != SourceMBB || SourceReg == SI.first));
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}
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#endif
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phiInfoElementGetSources(Info).insert(PHISourceT(SourceReg, SourceMBB));
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}
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@ -564,8 +564,8 @@ void SIInstrInfo::insertVectorSelect(MachineBasicBlock &MBB,
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unsigned TrueReg,
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unsigned FalseReg) const {
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MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
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const TargetRegisterClass *RegClass = MRI.getRegClass(DstReg);
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assert(RegClass == &AMDGPU::VGPR_32RegClass && "Not a VGPR32 reg");
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assert(MRI.getRegClass(DstReg) == &AMDGPU::VGPR_32RegClass &&
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"Not a VGPR32 reg");
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if (Cond.size() == 1) {
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BuildMI(MBB, I, DL, get(AMDGPU::V_CNDMASK_B32_e64), DstReg)
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