From 992ac2d5c2af380ad094bcf6fc38927f7d539194 Mon Sep 17 00:00:00 2001 From: Alexey Bataev Date: Tue, 24 Jan 2017 10:44:00 +0000 Subject: [PATCH] [SLP] Additional test for checking that instruction with extra args is not reconstructed. llvm-svn: 292911 --- .../SLPVectorizer/X86/horizontal-list.ll | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) diff --git a/llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll b/llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll index 4ed4561f7629..78f47f29d132 100644 --- a/llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll @@ -1032,3 +1032,60 @@ define float @extra_args(float* nocapture readonly %x, i32 %a, i32 %b) { ret float %add4.6 } +define float @extra_args_no_replace(float* nocapture readonly %x, i32 %a, i32 %b) { +; CHECK-LABEL: @extra_args_no_replace( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[B:%.*]], [[A:%.*]] +; CHECK-NEXT: [[CONV:%.*]] = sitofp i32 [[MUL]] to float +; CHECK-NEXT: [[TMP0:%.*]] = load float, float* [[X:%.*]], align 4 +; CHECK-NEXT: [[ADD:%.*]] = fadd fast float [[CONV]], 3.000000e+00 +; CHECK-NEXT: [[ADD1:%.*]] = fadd fast float [[TMP0]], [[ADD]] +; CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, float* [[X]], i64 1 +; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[ARRAYIDX3]], align 4 +; CHECK-NEXT: [[ADD4:%.*]] = fadd fast float [[TMP1]], [[ADD1]] +; CHECK-NEXT: [[ARRAYIDX3_1:%.*]] = getelementptr inbounds float, float* [[X]], i64 2 +; CHECK-NEXT: [[TMP2:%.*]] = load float, float* [[ARRAYIDX3_1]], align 4 +; CHECK-NEXT: [[ADD4_1:%.*]] = fadd fast float [[TMP2]], [[ADD4]] +; CHECK-NEXT: [[ARRAYIDX3_2:%.*]] = getelementptr inbounds float, float* [[X]], i64 3 +; CHECK-NEXT: [[TMP3:%.*]] = load float, float* [[ARRAYIDX3_2]], align 4 +; CHECK-NEXT: [[ADD4_2:%.*]] = fadd fast float [[TMP3]], [[ADD4_1]] +; CHECK-NEXT: [[ARRAYIDX3_3:%.*]] = getelementptr inbounds float, float* [[X]], i64 4 +; CHECK-NEXT: [[TMP4:%.*]] = load float, float* [[ARRAYIDX3_3]], align 4 +; CHECK-NEXT: [[ADD4_3:%.*]] = fadd fast float [[TMP4]], [[ADD4_2]] +; CHECK-NEXT: [[ADD5:%.*]] = fadd fast float [[ADD4_3]], [[CONV]] +; CHECK-NEXT: [[ARRAYIDX3_4:%.*]] = getelementptr inbounds float, float* [[X]], i64 5 +; CHECK-NEXT: [[TMP5:%.*]] = load float, float* [[ARRAYIDX3_4]], align 4 +; CHECK-NEXT: [[ADD4_4:%.*]] = fadd fast float [[TMP5]], [[ADD5]] +; CHECK-NEXT: [[ARRAYIDX3_5:%.*]] = getelementptr inbounds float, float* [[X]], i64 6 +; CHECK-NEXT: [[TMP6:%.*]] = load float, float* [[ARRAYIDX3_5]], align 4 +; CHECK-NEXT: [[ADD4_5:%.*]] = fadd fast float [[TMP6]], [[ADD4_4]] +; CHECK-NEXT: ret float [[ADD4_5]] +; + entry: + %mul = mul nsw i32 %b, %a + %conv = sitofp i32 %mul to float + %0 = load float, float* %x, align 4 + %add = fadd fast float %conv, 3.000000e+00 + %add1 = fadd fast float %0, %add + %arrayidx3 = getelementptr inbounds float, float* %x, i64 1 + %1 = load float, float* %arrayidx3, align 4 + %add4 = fadd fast float %1, %add1 + %arrayidx3.1 = getelementptr inbounds float, float* %x, i64 2 + %2 = load float, float* %arrayidx3.1, align 4 + %add4.1 = fadd fast float %2, %add4 + %arrayidx3.2 = getelementptr inbounds float, float* %x, i64 3 + %3 = load float, float* %arrayidx3.2, align 4 + %add4.2 = fadd fast float %3, %add4.1 + %arrayidx3.3 = getelementptr inbounds float, float* %x, i64 4 + %4 = load float, float* %arrayidx3.3, align 4 + %add4.3 = fadd fast float %4, %add4.2 + %add5 = fadd fast float %add4.3, %conv + %arrayidx3.4 = getelementptr inbounds float, float* %x, i64 5 + %5 = load float, float* %arrayidx3.4, align 4 + %add4.4 = fadd fast float %5, %add5 + %arrayidx3.5 = getelementptr inbounds float, float* %x, i64 6 + %6 = load float, float* %arrayidx3.5, align 4 + %add4.5 = fadd fast float %6, %add4.4 + ret float %add4.5 +} +