forked from OSchip/llvm-project
Try to lower memset/memcpy/memmove to vector instructions on ARM where the alignment permits.
llvm-svn: 143582
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parent
324dbd3b83
commit
9929c423a1
llvm
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@ -8127,6 +8127,34 @@ bool ARMTargetLowering::allowsUnalignedMemoryAccesses(EVT VT) const {
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}
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}
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static bool memOpAlign(unsigned DstAlign, unsigned SrcAlign,
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unsigned AlignCheck) {
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return ((SrcAlign == 0 || SrcAlign % AlignCheck == 0) &&
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(DstAlign == 0 || DstAlign % AlignCheck == 0));
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}
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EVT ARMTargetLowering::getOptimalMemOpType(uint64_t Size,
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unsigned DstAlign, unsigned SrcAlign,
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bool NonScalarIntSafe,
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bool MemcpyStrSrc,
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MachineFunction &MF) const {
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const Function *F = MF.getFunction();
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// See if we can use NEON instructions for this...
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if (NonScalarIntSafe &&
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!F->hasFnAttr(Attribute::NoImplicitFloat) &&
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Subtarget->hasNEON()) {
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if (memOpAlign(SrcAlign, DstAlign, 16) && Size >= 16) {
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return MVT::v4i32;
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} else if (memOpAlign(SrcAlign, DstAlign, 8) && Size >= 8) {
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return MVT::v2i32;
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}
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}
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// Let the target-independent logic figure it out.
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return MVT::Other;
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}
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static bool isLegalT1AddressImmediate(int64_t V, EVT VT) {
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if (V < 0)
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return false;
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@ -266,9 +266,14 @@ namespace llvm {
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/// allowsUnalignedMemoryAccesses - Returns true if the target allows
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/// unaligned memory accesses. of the specified type.
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/// FIXME: Add getOptimalMemOpType to implement memcpy with NEON?
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virtual bool allowsUnalignedMemoryAccesses(EVT VT) const;
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virtual EVT getOptimalMemOpType(uint64_t Size,
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unsigned DstAlign, unsigned SrcAlign,
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bool NonScalarIntSafe,
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bool MemcpyStrSrc,
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MachineFunction &MF) const;
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/// isLegalAddressingMode - Return true if the addressing mode represented
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/// by AM is legal for this target, for a load/store of the specified type.
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virtual bool isLegalAddressingMode(const AddrMode &AM, Type *Ty)const;
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@ -0,0 +1,20 @@
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; RUN: llc -march=arm -mcpu=cortex-a8 < %s | FileCheck %s
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; Should trigger a NEON store.
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; CHECK: vstr.64
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define void @f_0_12(i8* nocapture %c) nounwind optsize {
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entry:
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call void @llvm.memset.p0i8.i64(i8* %c, i8 0, i64 12, i32 8, i1 false)
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ret void
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}
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; Trigger multiple NEON stores.
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; CHECK: vstmia
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; CHECK-NEXT: vstmia
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define void @f_0_40(i8* nocapture %c) nounwind optsize {
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entry:
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call void @llvm.memset.p0i8.i64(i8* %c, i8 0, i64 40, i32 16, i1 false)
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ret void
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}
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declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
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