forked from OSchip/llvm-project
[InstCombine] Add basic vector test coverage for icmp_eq/ne zero combines
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915310bf14
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98c5eebcf7
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@ -15,6 +15,23 @@ define i1 @and_consts(i32 %k, i32 %c1, i32 %c2) {
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ret i1 %or
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}
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define <2 x i1> @and_consts_vector(<2 x i32> %k, <2 x i32> %c1, <2 x i32> %c2) {
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; CHECK-LABEL: @and_consts_vector(
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; CHECK-NEXT: [[T1:%.*]] = and <2 x i32> [[K:%.*]], <i32 4, i32 4>
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; CHECK-NEXT: [[T2:%.*]] = icmp eq <2 x i32> [[T1]], zeroinitializer
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; CHECK-NEXT: [[T5:%.*]] = and <2 x i32> [[K]], <i32 8, i32 8>
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; CHECK-NEXT: [[T6:%.*]] = icmp eq <2 x i32> [[T5]], zeroinitializer
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[T2]], [[T6]]
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; CHECK-NEXT: ret <2 x i1> [[OR]]
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;
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%t1 = and <2 x i32> <i32 4, i32 4>, %k
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%t2 = icmp eq <2 x i32> %t1, zeroinitializer
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%t5 = and <2 x i32> <i32 8, i32 8>, %k
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%t6 = icmp eq <2 x i32> %t5, zeroinitializer
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%or = or <2 x i1> %t2, %t6
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ret <2 x i1> %or
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}
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define i1 @foo1_and(i32 %k, i32 %c1, i32 %c2) {
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; CHECK-LABEL: @foo1_and(
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; CHECK-NEXT: [[T:%.*]] = shl i32 1, [[C1:%.*]]
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@ -34,6 +51,27 @@ define i1 @foo1_and(i32 %k, i32 %c1, i32 %c2) {
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ret i1 %or
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}
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define <2 x i1> @foo1_and_vector(<2 x i32> %k, <2 x i32> %c1, <2 x i32> %c2) {
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; CHECK-LABEL: @foo1_and_vector(
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; CHECK-NEXT: [[T:%.*]] = shl <2 x i32> <i32 1, i32 1>, [[C1:%.*]]
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; CHECK-NEXT: [[T4:%.*]] = shl <2 x i32> <i32 1, i32 1>, [[C2:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = and <2 x i32> [[T]], [[K:%.*]]
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; CHECK-NEXT: [[T2:%.*]] = icmp eq <2 x i32> [[T1]], zeroinitializer
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; CHECK-NEXT: [[T5:%.*]] = and <2 x i32> [[T4]], [[K]]
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; CHECK-NEXT: [[T6:%.*]] = icmp eq <2 x i32> [[T5]], zeroinitializer
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[T2]], [[T6]]
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; CHECK-NEXT: ret <2 x i1> [[OR]]
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;
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%t = shl <2 x i32> <i32 1, i32 1>, %c1
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%t4 = shl <2 x i32> <i32 1, i32 1>, %c2
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%t1 = and <2 x i32> %t, %k
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%t2 = icmp eq <2 x i32> %t1, zeroinitializer
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%t5 = and <2 x i32> %t4, %k
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%t6 = icmp eq <2 x i32> %t5, zeroinitializer
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%or = or <2 x i1> %t2, %t6
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ret <2 x i1> %or
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}
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; Same as above but with operands commuted one of the ands, but not the other.
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define i1 @foo1_and_commuted(i32 %k, i32 %c1, i32 %c2) {
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; CHECK-LABEL: @foo1_and_commuted(
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@ -56,6 +94,29 @@ define i1 @foo1_and_commuted(i32 %k, i32 %c1, i32 %c2) {
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ret i1 %or
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}
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define <2 x i1> @foo1_and_commuted_vector(<2 x i32> %k, <2 x i32> %c1, <2 x i32> %c2) {
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; CHECK-LABEL: @foo1_and_commuted_vector(
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; CHECK-NEXT: [[K2:%.*]] = mul <2 x i32> [[K:%.*]], [[K]]
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; CHECK-NEXT: [[T:%.*]] = shl <2 x i32> <i32 1, i32 1>, [[C1:%.*]]
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; CHECK-NEXT: [[T4:%.*]] = shl <2 x i32> <i32 1, i32 1>, [[C2:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = and <2 x i32> [[K2]], [[T]]
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; CHECK-NEXT: [[T2:%.*]] = icmp eq <2 x i32> [[T1]], zeroinitializer
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; CHECK-NEXT: [[T5:%.*]] = and <2 x i32> [[T4]], [[K2]]
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; CHECK-NEXT: [[T6:%.*]] = icmp eq <2 x i32> [[T5]], zeroinitializer
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[T2]], [[T6]]
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; CHECK-NEXT: ret <2 x i1> [[OR]]
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;
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%k2 = mul <2 x i32> %k, %k ; to trick the complexity sorting
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%t = shl <2 x i32> <i32 1, i32 1>, %c1
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%t4 = shl <2 x i32> <i32 1, i32 1>, %c2
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%t1 = and <2 x i32> %k2, %t
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%t2 = icmp eq <2 x i32> %t1, zeroinitializer
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%t5 = and <2 x i32> %t4, %k2
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%t6 = icmp eq <2 x i32> %t5, zeroinitializer
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%or = or <2 x i1> %t2, %t6
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ret <2 x i1> %or
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}
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define i1 @or_consts(i32 %k, i32 %c1, i32 %c2) {
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; CHECK-LABEL: @or_consts(
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; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[K:%.*]], 12
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@ -70,6 +131,23 @@ define i1 @or_consts(i32 %k, i32 %c1, i32 %c2) {
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ret i1 %or
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}
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define <2 x i1> @or_consts_vector(<2 x i32> %k, <2 x i32> %c1, <2 x i32> %c2) {
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; CHECK-LABEL: @or_consts_vector(
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; CHECK-NEXT: [[T1:%.*]] = and <2 x i32> [[K:%.*]], <i32 4, i32 4>
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; CHECK-NEXT: [[T2:%.*]] = icmp ne <2 x i32> [[T1]], zeroinitializer
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; CHECK-NEXT: [[T5:%.*]] = and <2 x i32> [[K]], <i32 8, i32 8>
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; CHECK-NEXT: [[T6:%.*]] = icmp ne <2 x i32> [[T5]], zeroinitializer
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; CHECK-NEXT: [[OR:%.*]] = and <2 x i1> [[T2]], [[T6]]
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; CHECK-NEXT: ret <2 x i1> [[OR]]
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;
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%t1 = and <2 x i32> <i32 4, i32 4>, %k
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%t2 = icmp ne <2 x i32> %t1, zeroinitializer
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%t5 = and <2 x i32> <i32 8, i32 8>, %k
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%t6 = icmp ne <2 x i32> %t5, zeroinitializer
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%or = and <2 x i1> %t2, %t6
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ret <2 x i1> %or
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}
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define i1 @foo1_or(i32 %k, i32 %c1, i32 %c2) {
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; CHECK-LABEL: @foo1_or(
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; CHECK-NEXT: [[T:%.*]] = shl i32 1, [[C1:%.*]]
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@ -89,6 +167,27 @@ define i1 @foo1_or(i32 %k, i32 %c1, i32 %c2) {
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ret i1 %or
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}
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define <2 x i1> @foo1_or_vector(<2 x i32> %k, <2 x i32> %c1, <2 x i32> %c2) {
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; CHECK-LABEL: @foo1_or_vector(
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; CHECK-NEXT: [[T:%.*]] = shl <2 x i32> <i32 1, i32 1>, [[C1:%.*]]
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; CHECK-NEXT: [[T4:%.*]] = shl <2 x i32> <i32 1, i32 1>, [[C2:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = and <2 x i32> [[T]], [[K:%.*]]
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; CHECK-NEXT: [[T2:%.*]] = icmp ne <2 x i32> [[T1]], zeroinitializer
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; CHECK-NEXT: [[T5:%.*]] = and <2 x i32> [[T4]], [[K]]
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; CHECK-NEXT: [[T6:%.*]] = icmp ne <2 x i32> [[T5]], zeroinitializer
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; CHECK-NEXT: [[OR:%.*]] = and <2 x i1> [[T2]], [[T6]]
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; CHECK-NEXT: ret <2 x i1> [[OR]]
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;
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%t = shl <2 x i32> <i32 1, i32 1>, %c1
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%t4 = shl <2 x i32> <i32 1, i32 1>, %c2
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%t1 = and <2 x i32> %t, %k
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%t2 = icmp ne <2 x i32> %t1, zeroinitializer
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%t5 = and <2 x i32> %t4, %k
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%t6 = icmp ne <2 x i32> %t5, zeroinitializer
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%or = and <2 x i1> %t2, %t6
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ret <2 x i1> %or
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}
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; Same as above but with operands commuted one of the ors, but not the other.
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define i1 @foo1_or_commuted(i32 %k, i32 %c1, i32 %c2) {
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; CHECK-LABEL: @foo1_or_commuted(
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@ -111,6 +210,29 @@ define i1 @foo1_or_commuted(i32 %k, i32 %c1, i32 %c2) {
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ret i1 %or
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}
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define <2 x i1> @foo1_or_commuted_vector(<2 x i32> %k, <2 x i32> %c1, <2 x i32> %c2) {
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; CHECK-LABEL: @foo1_or_commuted_vector(
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; CHECK-NEXT: [[K2:%.*]] = mul <2 x i32> [[K:%.*]], [[K]]
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; CHECK-NEXT: [[T:%.*]] = shl <2 x i32> <i32 1, i32 1>, [[C1:%.*]]
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; CHECK-NEXT: [[T4:%.*]] = shl <2 x i32> <i32 1, i32 1>, [[C2:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = and <2 x i32> [[K2]], [[T]]
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; CHECK-NEXT: [[T2:%.*]] = icmp ne <2 x i32> [[T1]], zeroinitializer
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; CHECK-NEXT: [[T5:%.*]] = and <2 x i32> [[T4]], [[K2]]
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; CHECK-NEXT: [[T6:%.*]] = icmp ne <2 x i32> [[T5]], zeroinitializer
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; CHECK-NEXT: [[OR:%.*]] = and <2 x i1> [[T2]], [[T6]]
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; CHECK-NEXT: ret <2 x i1> [[OR]]
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;
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%k2 = mul <2 x i32> %k, %k ; to trick the complexity sorting
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%t = shl <2 x i32> <i32 1, i32 1>, %c1
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%t4 = shl <2 x i32> <i32 1, i32 1>, %c2
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%t1 = and <2 x i32> %k2, %t
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%t2 = icmp ne <2 x i32> %t1, zeroinitializer
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%t5 = and <2 x i32> %t4, %k2
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%t6 = icmp ne <2 x i32> %t5, zeroinitializer
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%or = and <2 x i1> %t2, %t6
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ret <2 x i1> %or
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}
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define i1 @foo1_and_signbit_lshr(i32 %k, i32 %c1, i32 %c2) {
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; CHECK-LABEL: @foo1_and_signbit_lshr(
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; CHECK-NEXT: [[T:%.*]] = shl i32 1, [[C1:%.*]]
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@ -130,6 +252,27 @@ define i1 @foo1_and_signbit_lshr(i32 %k, i32 %c1, i32 %c2) {
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ret i1 %or
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}
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define <2 x i1> @foo1_and_signbit_lshr_vector(<2 x i32> %k, <2 x i32> %c1, <2 x i32> %c2) {
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; CHECK-LABEL: @foo1_and_signbit_lshr_vector(
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; CHECK-NEXT: [[T:%.*]] = shl <2 x i32> <i32 1, i32 1>, [[C1:%.*]]
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; CHECK-NEXT: [[T4:%.*]] = lshr <2 x i32> <i32 -2147483648, i32 -2147483648>, [[C2:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = and <2 x i32> [[T]], [[K:%.*]]
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; CHECK-NEXT: [[T2:%.*]] = icmp eq <2 x i32> [[T1]], zeroinitializer
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; CHECK-NEXT: [[T5:%.*]] = and <2 x i32> [[T4]], [[K]]
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; CHECK-NEXT: [[T6:%.*]] = icmp eq <2 x i32> [[T5]], zeroinitializer
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; CHECK-NEXT: [[OR:%.*]] = or <2 x i1> [[T2]], [[T6]]
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; CHECK-NEXT: ret <2 x i1> [[OR]]
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;
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%t = shl <2 x i32> <i32 1, i32 1>, %c1
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%t4 = lshr <2 x i32> <i32 -2147483648, i32 -2147483648>, %c2
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%t1 = and <2 x i32> %t, %k
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%t2 = icmp eq <2 x i32> %t1, zeroinitializer
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%t5 = and <2 x i32> %t4, %k
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%t6 = icmp eq <2 x i32> %t5, zeroinitializer
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%or = or <2 x i1> %t2, %t6
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ret <2 x i1> %or
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}
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define i1 @foo1_or_signbit_lshr(i32 %k, i32 %c1, i32 %c2) {
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; CHECK-LABEL: @foo1_or_signbit_lshr(
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; CHECK-NEXT: [[T:%.*]] = shl i32 1, [[C1:%.*]]
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@ -149,6 +292,27 @@ define i1 @foo1_or_signbit_lshr(i32 %k, i32 %c1, i32 %c2) {
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ret i1 %or
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}
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define <2 x i1> @foo1_or_signbit_lshr_vector(<2 x i32> %k, <2 x i32> %c1, <2 x i32> %c2) {
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; CHECK-LABEL: @foo1_or_signbit_lshr_vector(
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; CHECK-NEXT: [[T:%.*]] = shl <2 x i32> <i32 1, i32 1>, [[C1:%.*]]
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; CHECK-NEXT: [[T4:%.*]] = lshr <2 x i32> <i32 -2147483648, i32 -2147483648>, [[C2:%.*]]
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; CHECK-NEXT: [[T1:%.*]] = and <2 x i32> [[T]], [[K:%.*]]
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; CHECK-NEXT: [[T2:%.*]] = icmp ne <2 x i32> [[T1]], zeroinitializer
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; CHECK-NEXT: [[T5:%.*]] = and <2 x i32> [[T4]], [[K]]
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; CHECK-NEXT: [[T6:%.*]] = icmp ne <2 x i32> [[T5]], zeroinitializer
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; CHECK-NEXT: [[OR:%.*]] = and <2 x i1> [[T2]], [[T6]]
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; CHECK-NEXT: ret <2 x i1> [[OR]]
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;
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%t = shl <2 x i32> <i32 1, i32 1>, %c1
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%t4 = lshr <2 x i32> <i32 -2147483648, i32 -2147483648>, %c2
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%t1 = and <2 x i32> %t, %k
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%t2 = icmp ne <2 x i32> %t1, zeroinitializer
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%t5 = and <2 x i32> %t4, %k
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%t6 = icmp ne <2 x i32> %t5, zeroinitializer
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%or = and <2 x i1> %t2, %t6
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ret <2 x i1> %or
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}
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; Same as last two, but shift-of-signbit replaced with 'icmp s*'
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define i1 @foo1_and_signbit_lshr_without_shifting_signbit(i32 %k, i32 %c1, i32 %c2) {
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; CHECK-LABEL: @foo1_and_signbit_lshr_without_shifting_signbit(
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