forked from OSchip/llvm-project
[TableGen] Teach tablegen to allow SDNPCommutable nodes with more than 2 operands.
Summary: Tablegen already supports commutable instrinsics with more than 2 operands. There it just assumes the first two operands are commutable. I plan to use this to improve the generation of FMA patterns in the X86 backend. Reviewers: aymanmus, zvi, RKSimon, spatel, arsenm Reviewed By: arsenm Subscribers: arsenm, llvm-commits Differential Revision: https://reviews.llvm.org/D37430 llvm-svn: 312464
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@ -3744,7 +3744,7 @@ static void GenerateVariantsOf(TreePatternNode *N,
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// If this node is commutative, consider the commuted order.
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bool isCommIntrinsic = N->isCommutativeIntrinsic(CDP);
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if (NodeInfo.hasProperty(SDNPCommutative) || isCommIntrinsic) {
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assert((N->getNumChildren()==2 || isCommIntrinsic) &&
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assert((N->getNumChildren()>=2 || isCommIntrinsic) &&
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"Commutative but doesn't have 2 children!");
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// Don't count children which are actually register references.
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unsigned NC = 0;
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@ -3772,9 +3772,14 @@ static void GenerateVariantsOf(TreePatternNode *N,
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for (unsigned i = 3; i != NC; ++i)
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Variants.push_back(ChildVariants[i]);
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CombineChildVariants(N, Variants, OutVariants, CDP, DepVars);
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} else if (NC == 2)
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CombineChildVariants(N, ChildVariants[1], ChildVariants[0],
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OutVariants, CDP, DepVars);
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} else if (NC == N->getNumChildren()) {
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std::vector<std::vector<TreePatternNode*> > Variants;
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Variants.push_back(ChildVariants[1]);
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Variants.push_back(ChildVariants[0]);
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for (unsigned i = 2; i != NC; ++i)
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Variants.push_back(ChildVariants[i]);
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CombineChildVariants(N, Variants, OutVariants, CDP, DepVars);
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}
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}
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}
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