forked from OSchip/llvm-project
parent
5beef2d242
commit
984d0ba6b6
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@ -7300,8 +7300,8 @@ processInstruction(MCInst &Inst,
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if ((isARMLowRegister(Inst.getOperand(1).getReg()) &&
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isARMLowRegister(Inst.getOperand(2).getReg())) &&
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Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg() &&
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(!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR ||
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inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR) &&
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((!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR) ||
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(inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR)) &&
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(!static_cast<ARMOperand*>(Operands[3])->isToken() ||
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!static_cast<ARMOperand*>(Operands[3])->getToken().equals_lower(".w"))) {
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unsigned NewOpc;
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@ -7339,8 +7339,8 @@ processInstruction(MCInst &Inst,
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isARMLowRegister(Inst.getOperand(2).getReg())) &&
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(Inst.getOperand(0).getReg() == Inst.getOperand(1).getReg() ||
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Inst.getOperand(0).getReg() == Inst.getOperand(2).getReg()) &&
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(!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR ||
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inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR) &&
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((!inITBlock() && Inst.getOperand(5).getReg() == ARM::CPSR) ||
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(inITBlock() && Inst.getOperand(5).getReg() != ARM::CPSR)) &&
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(!static_cast<ARMOperand*>(Operands[3])->isToken() ||
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!static_cast<ARMOperand*>(Operands[3])->getToken().equals_lower(".w"))) {
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unsigned NewOpc;
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