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[AVX512] Fix cvtusi2sd instruction Opcode, it should be 0x7B instead of 0x2A. 

llvm-svn: 272122
This commit is contained in:
Igor Breger 2016-06-08 07:48:23 +00:00
parent 50e94a3b34
commit 982e4003a6
1 changed files with 1 additions and 1 deletions
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llvm/lib/Target/X86/X86InstrAVX512.td
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@ -5097,7 +5097,7 @@ let isCodeGenOnly = 1 , Predicates = [HasAVX512] in {
int_x86_sse2_cvtsi642sd, i64mem, loadi64, "cvtsi2sd{q}", int_x86_sse2_cvtsi642sd, i64mem, loadi64, "cvtsi2sd{q}",
SSE_CVT_Scalar, 0>, XD, EVEX_4V, VEX_W; SSE_CVT_Scalar, 0>, XD, EVEX_4V, VEX_W;
defm Int_VCVTUSI2SDZ : sse12_cvt_sint_3addr<0x2A, GR32, VR128X, defm Int_VCVTUSI2SDZ : sse12_cvt_sint_3addr<0x7B, GR32, VR128X,
int_x86_avx512_cvtusi2sd, i32mem, loadi32, "cvtusi2sd{l}", int_x86_avx512_cvtusi2sd, i32mem, loadi32, "cvtusi2sd{l}",
SSE_CVT_Scalar, 0>, XD, EVEX_4V; SSE_CVT_Scalar, 0>, XD, EVEX_4V;
} // isCodeGenOnly = 1, Predicates = [HasAVX512] } // isCodeGenOnly = 1, Predicates = [HasAVX512]