forked from OSchip/llvm-project
[AArch64][GlobalISel] Implement moreElements legalization for G_SHUFFLE_VECTOR.
Differential Revision: https://reviews.llvm.org/D103301
This commit is contained in:
Amara Emerson
parent
1f40870dda
commit
97c426394a
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@ -293,6 +293,8 @@ public:
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LegalizeResult moreElementsVectorPhi(MachineInstr &MI, unsigned TypeIdx,
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LLT MoreTy);
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LegalizeResult moreElementsVectorShuffle(MachineInstr &MI, unsigned TypeIdx,
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LLT MoreTy);
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LegalizeResult fewerElementsVectorUnmergeValues(MachineInstr &MI,
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unsigned TypeIdx,
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@ -4871,11 +4871,56 @@ LegalizerHelper::moreElementsVector(MachineInstr &MI, unsigned TypeIdx,
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}
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case TargetOpcode::G_PHI:
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return moreElementsVectorPhi(MI, TypeIdx, MoreTy);
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case TargetOpcode::G_SHUFFLE_VECTOR:
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return moreElementsVectorShuffle(MI, TypeIdx, MoreTy);
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default:
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return UnableToLegalize;
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}
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}
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LegalizerHelper::LegalizeResult
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LegalizerHelper::moreElementsVectorShuffle(MachineInstr &MI,
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unsigned int TypeIdx, LLT MoreTy) {
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if (TypeIdx != 0)
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return UnableToLegalize;
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Register DstReg = MI.getOperand(0).getReg();
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Register Src1Reg = MI.getOperand(1).getReg();
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Register Src2Reg = MI.getOperand(2).getReg();
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ArrayRef<int> Mask = MI.getOperand(3).getShuffleMask();
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LLT DstTy = MRI.getType(DstReg);
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LLT Src1Ty = MRI.getType(Src1Reg);
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LLT Src2Ty = MRI.getType(Src2Reg);
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unsigned NumElts = DstTy.getNumElements();
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unsigned WidenNumElts = MoreTy.getNumElements();
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// Expect a canonicalized shuffle.
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if (DstTy != Src1Ty || DstTy != Src2Ty)
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return UnableToLegalize;
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moreElementsVectorSrc(MI, MoreTy, 1);
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moreElementsVectorSrc(MI, MoreTy, 2);
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// Adjust mask based on new input vector length.
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SmallVector<int, 16> NewMask;
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for (unsigned I = 0; I != NumElts; ++I) {
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int Idx = Mask[I];
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if (Idx < static_cast<int>(NumElts))
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NewMask.push_back(Idx);
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else
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NewMask.push_back(Idx - NumElts + WidenNumElts);
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}
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for (unsigned I = NumElts; I != WidenNumElts; ++I)
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NewMask.push_back(-1);
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moreElementsVectorDst(MI, MoreTy, 0);
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MIRBuilder.setInstrAndDebugLoc(MI);
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MIRBuilder.buildShuffleVector(MI.getOperand(0).getReg(),
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MI.getOperand(1).getReg(),
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MI.getOperand(2).getReg(), NewMask);
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MI.eraseFromParent();
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return Legalized;
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}
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void LegalizerHelper::multiplyRegisters(SmallVectorImpl<Register> &DstRegs,
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ArrayRef<Register> Src1Regs,
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ArrayRef<Register> Src2Regs,
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@ -698,6 +698,7 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
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.lowerIf([=](const LegalityQuery &Query) {
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return !Query.Types[1].isVector();
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})
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.moreElementsToNextPow2(0)
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.clampNumElements(0, v4s32, v4s32)
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.clampNumElements(0, v2s64, v2s64);
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@ -212,3 +212,88 @@ body: |
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RET_ReallyLR
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...
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---
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name: oversize_shuffle_v6i64
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alignment: 4
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tracksRegLiveness: true
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frameInfo:
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maxAlignment: 8
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fixedStack:
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- { id: 0, offset: 24, size: 8, alignment: 8, isImmutable: true }
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- { id: 1, offset: 16, size: 8, alignment: 16, isImmutable: true }
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- { id: 2, offset: 8, size: 8, alignment: 8, isImmutable: true }
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- { id: 3, size: 8, alignment: 16, isImmutable: true }
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body: |
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bb.1:
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liveins: $d0, $d1, $d2, $d3, $d4, $d5, $d6, $d7, $x0
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; CHECK-LABEL: name: oversize_shuffle_v6i64
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; CHECK: liveins: $d0, $d1, $d2, $d3, $d4, $d5, $d6, $d7, $x0
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; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $d0
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; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $d1
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; CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY $d2
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; CHECK: [[COPY3:%[0-9]+]]:_(s64) = COPY $d3
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; CHECK: [[COPY4:%[0-9]+]]:_(s64) = COPY $d4
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; CHECK: [[COPY5:%[0-9]+]]:_(s64) = COPY $d5
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; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[COPY2]](s64), [[COPY3]](s64)
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; CHECK: [[BUILD_VECTOR1:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[COPY4]](s64), [[COPY5]](s64)
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; CHECK: [[BUILD_VECTOR2:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64)
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; CHECK: [[BUILD_VECTOR3:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[COPY]](s64), [[COPY1]](s64)
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; CHECK: [[COPY6:%[0-9]+]]:_(s64) = COPY $d6
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; CHECK: [[COPY7:%[0-9]+]]:_(s64) = COPY $d7
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; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0
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; CHECK: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[FRAME_INDEX]](p0) :: (invariant load (s64) from %fixed-stack.0, align 16)
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; CHECK: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1
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; CHECK: [[LOAD1:%[0-9]+]]:_(s64) = G_LOAD [[FRAME_INDEX1]](p0) :: (invariant load (s64) from %fixed-stack.1)
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; CHECK: [[FRAME_INDEX2:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.2
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; CHECK: [[LOAD2:%[0-9]+]]:_(s64) = G_LOAD [[FRAME_INDEX2]](p0) :: (invariant load (s64) from %fixed-stack.2, align 16)
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; CHECK: [[FRAME_INDEX3:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.3
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; CHECK: [[LOAD3:%[0-9]+]]:_(s64) = G_LOAD [[FRAME_INDEX3]](p0) :: (invariant load (s64) from %fixed-stack.3)
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; CHECK: [[BUILD_VECTOR4:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[COPY6]](s64), [[COPY7]](s64)
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; CHECK: [[BUILD_VECTOR5:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[LOAD2]](s64), [[LOAD3]](s64)
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; CHECK: [[COPY8:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK: [[DEF:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF
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; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
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; CHECK: [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
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; CHECK: [[EVEC:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR]](<2 x s64>), [[C1]](s64)
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; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK: [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; CHECK: [[EVEC1:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR1]](<2 x s64>), [[C3]](s64)
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; CHECK: [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK: [[EVEC2:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR4]](<2 x s64>), [[C1]](s64)
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; CHECK: [[EVEC3:%[0-9]+]]:_(s64) = G_EXTRACT_VECTOR_ELT [[BUILD_VECTOR2]](<2 x s64>), [[C3]](s64)
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; CHECK: [[BUILD_VECTOR6:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[EVEC]](s64), [[EVEC1]](s64)
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; CHECK: [[BUILD_VECTOR7:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[EVEC2]](s64), [[EVEC3]](s64)
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; CHECK: [[SHUF:%[0-9]+]]:_(<2 x s64>) = G_SHUFFLE_VECTOR [[BUILD_VECTOR3]](<2 x s64>), [[BUILD_VECTOR5]], shufflemask(1, 3)
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; CHECK: G_STORE [[BUILD_VECTOR6]](<2 x s64>), [[COPY8]](p0) :: (store (<2 x s64>), align 64)
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; CHECK: [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 16
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; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY8]], [[C5]](s64)
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; CHECK: G_STORE [[BUILD_VECTOR7]](<2 x s64>), [[PTR_ADD]](p0) :: (store (<2 x s64>) into unknown-address + 16)
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; CHECK: [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 32
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; CHECK: [[PTR_ADD1:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY8]], [[C6]](s64)
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; CHECK: G_STORE [[SHUF]](<2 x s64>), [[PTR_ADD1]](p0) :: (store (<2 x s64>) into unknown-address + 32, align 32)
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; CHECK: RET_ReallyLR
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%3:_(s64) = COPY $d0
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%4:_(s64) = COPY $d1
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%5:_(s64) = COPY $d2
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%6:_(s64) = COPY $d3
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%7:_(s64) = COPY $d4
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%8:_(s64) = COPY $d5
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%0:_(<6 x s64>) = G_BUILD_VECTOR %3(s64), %4(s64), %5(s64), %6(s64), %7(s64), %8(s64)
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%9:_(s64) = COPY $d6
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%10:_(s64) = COPY $d7
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%15:_(p0) = G_FRAME_INDEX %fixed-stack.3
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%11:_(s64) = G_LOAD %15(p0) :: (invariant load 8 from %fixed-stack.3, align 16)
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%16:_(p0) = G_FRAME_INDEX %fixed-stack.2
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%12:_(s64) = G_LOAD %16(p0) :: (invariant load 8 from %fixed-stack.2)
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%17:_(p0) = G_FRAME_INDEX %fixed-stack.1
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%13:_(s64) = G_LOAD %17(p0) :: (invariant load 8 from %fixed-stack.1, align 16)
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%18:_(p0) = G_FRAME_INDEX %fixed-stack.0
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%14:_(s64) = G_LOAD %18(p0) :: (invariant load 8 from %fixed-stack.0)
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%1:_(<6 x s64>) = G_BUILD_VECTOR %9(s64), %10(s64), %11(s64), %12(s64), %13(s64), %14(s64)
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%2:_(p0) = COPY $x0
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%19:_(<6 x s64>) = G_SHUFFLE_VECTOR %0(<6 x s64>), %1, shufflemask(3, 4, 7, 0, 1, 11)
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G_STORE %19(<6 x s64>), %2(p0) :: (store 48, align 64)
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RET_ReallyLR
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...
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@ -4007,4 +4007,51 @@ TEST_F(AArch64GISelMITest, widenScalarUnmerge) {
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EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF;
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}
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// Test moreElements of G_SHUFFLE_VECTOR.
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TEST_F(AArch64GISelMITest, moreElementsShuffle) {
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setUp();
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if (!TM)
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return;
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DefineLegalizerInfo(A, {});
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LLT S64{LLT::scalar(64)};
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LLT V6S64 = LLT::fixed_vector(6, S64);
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auto V1 = B.buildBuildVector(V6S64, {Copies[0], Copies[1], Copies[0],
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Copies[1], Copies[0], Copies[1]});
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auto V2 = B.buildBuildVector(V6S64, {Copies[0], Copies[1], Copies[0],
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Copies[1], Copies[0], Copies[1]});
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auto Shuffle = B.buildShuffleVector(V6S64, V1, V2, {3, 4, 7, 0, 1, 11});
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AInfo Info(MF->getSubtarget());
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DummyGISelObserver Observer;
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LegalizerHelper Helper(*MF, Info, Observer, B);
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// Perform Legalization
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B.setInsertPt(*EntryMBB, Shuffle->getIterator());
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EXPECT_EQ(LegalizerHelper::LegalizeResult::Legalized,
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Helper.moreElementsVector(*Shuffle, 0, LLT::fixed_vector(8, S64)));
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const auto *CheckStr = R"(
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CHECK: [[COPY0:%[0-9]+]]:_(s64) = COPY
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CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY
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CHECK: [[COPY2:%[0-9]+]]:_(s64) = COPY
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CHECK: [[BV1:%[0-9]+]]:_(<6 x s64>) = G_BUILD_VECTOR
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CHECK: [[BV2:%[0-9]+]]:_(<6 x s64>) = G_BUILD_VECTOR
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CHECK: [[IMPDEF1:%[0-9]+]]:_(<8 x s64>) = G_IMPLICIT_DEF
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CHECK: [[INSERT1:%[0-9]+]]:_(<8 x s64>) = G_INSERT [[IMPDEF1]]:_, [[BV1]]:_(<6 x s64>), 0
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CHECK: [[IMPDEF2:%[0-9]+]]:_(<8 x s64>) = G_IMPLICIT_DEF
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CHECK: [[INSERT2:%[0-9]+]]:_(<8 x s64>) = G_INSERT [[IMPDEF2]]:_, [[BV2]]:_(<6 x s64>), 0
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CHECK: [[SHUF:%[0-9]+]]:_(<8 x s64>) = G_SHUFFLE_VECTOR [[INSERT1]]:_(<8 x s64>), [[INSERT2]]:_, shufflemask(3, 4, 9, 0, 1, 13, undef, undef)
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CHECK: [[IMPDEF3:%[0-9]+]]:_(<8 x s64>) = G_IMPLICIT_DEF
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CHECK: [[CONCAT:%[0-9]+]]:_(<24 x s64>) = G_CONCAT_VECTORS [[SHUF]]:_(<8 x s64>), [[IMPDEF3]]:_(<8 x s64>), [[IMPDEF3]]:_(<8 x s64>)
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CHECK: [[UNMERGE:%[0-9]+]]:_(<6 x s64>), [[UNMERGE2:%[0-9]+]]:_(<6 x s64>), [[UNMERGE3:%[0-9]+]]:_(<6 x s64>), [[UNMERGE4:%[0-9]+]]:_(<6 x s64>) = G_UNMERGE_VALUES [[CONCAT]]:_(<24 x s64>)
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)";
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// Check
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EXPECT_TRUE(CheckMachineFunction(*MF, CheckStr)) << *MF;
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}
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} // namespace
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