forked from OSchip/llvm-project
parent
01d48ec041
commit
97b9a4b412
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@ -941,33 +941,14 @@ bool SimpleRegisterCoalescing::CanCoalesceWithImpDef(MachineInstr *CopyMI,
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LiveInterval &ImpLi) const{
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if (!CopyMI->killsRegister(ImpLi.reg))
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return false;
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unsigned CopyIdx = li_->getDefIndex(li_->getInstructionIndex(CopyMI));
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LiveInterval::iterator LR = li.FindLiveRangeContaining(CopyIdx);
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if (LR == li.end())
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return false;
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if (LR->valno->hasPHIKill())
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return false;
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if (LR->valno->def != CopyIdx)
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return false;
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// Make sure all of val# uses are copies.
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for (MachineRegisterInfo::use_iterator UI = mri_->use_begin(li.reg),
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// Make sure this is the only use.
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for (MachineRegisterInfo::use_iterator UI = mri_->use_begin(ImpLi.reg),
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UE = mri_->use_end(); UI != UE;) {
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MachineInstr *UseMI = &*UI;
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++UI;
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if (JoinedCopies.count(UseMI))
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if (CopyMI == UseMI || JoinedCopies.count(UseMI))
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continue;
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unsigned UseIdx = li_->getUseIndex(li_->getInstructionIndex(UseMI));
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LiveInterval::iterator ULR = li.FindLiveRangeContaining(UseIdx);
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if (ULR == li.end() || ULR->valno != LR->valno)
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continue;
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// If the use is not a use, then it's not safe to coalesce the move.
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unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
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if (!tii_->isMoveInstr(*UseMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx)) {
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if (UseMI->getOpcode() == TargetInstrInfo::INSERT_SUBREG &&
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UseMI->getOperand(1).getReg() == li.reg)
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continue;
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return false;
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}
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return false;
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}
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return true;
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}
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@ -2554,56 +2535,6 @@ static bool isZeroLengthInterval(LiveInterval *li) {
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return true;
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}
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/// TurnCopyIntoImpDef - If source of the specified copy is an implicit def,
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/// turn the copy into an implicit def.
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bool
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SimpleRegisterCoalescing::TurnCopyIntoImpDef(MachineBasicBlock::iterator &I,
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MachineBasicBlock *MBB,
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unsigned DstReg, unsigned SrcReg) {
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MachineInstr *CopyMI = &*I;
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unsigned CopyIdx = li_->getDefIndex(li_->getInstructionIndex(CopyMI));
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if (!li_->hasInterval(SrcReg))
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return false;
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LiveInterval &SrcInt = li_->getInterval(SrcReg);
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if (!SrcInt.empty())
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return false;
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if (!li_->hasInterval(DstReg))
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return false;
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LiveInterval &DstInt = li_->getInterval(DstReg);
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const LiveRange *DstLR = DstInt.getLiveRangeContaining(CopyIdx);
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// If the valno extends beyond this basic block, then it's not safe to delete
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// the val# or else livein information won't be correct.
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MachineBasicBlock *EndMBB = li_->getMBBFromIndex(DstLR->end);
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if (EndMBB != MBB)
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return false;
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DstInt.removeValNo(DstLR->valno);
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li_->RemoveMachineInstrFromMaps(CopyMI);
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CopyMI->eraseFromParent();
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bool NoUse = mri_->use_empty(SrcReg);
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if (NoUse) {
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for (MachineRegisterInfo::reg_iterator RI = mri_->reg_begin(SrcReg),
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RE = mri_->reg_end(); RI != RE; ) {
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assert(RI.getOperand().isDef());
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MachineInstr *DefMI = &*RI;
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++RI;
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// The implicit_def source has no other uses, delete it.
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assert(DefMI->getOpcode() == TargetInstrInfo::IMPLICIT_DEF);
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li_->RemoveMachineInstrFromMaps(DefMI);
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DefMI->eraseFromParent();
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}
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}
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// Mark uses of implicit_def isUndef.
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for (MachineRegisterInfo::use_iterator RI = mri_->use_begin(DstReg),
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RE = mri_->use_end(); RI != RE; ++RI) {
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assert((*RI).getParent() == MBB);
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RI.getOperand().setIsUndef();
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}
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++I;
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return true;
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}
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bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
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mf_ = &fn;
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@ -2716,7 +2647,7 @@ bool SimpleRegisterCoalescing::runOnMachineFunction(MachineFunction &fn) {
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li_->RemoveMachineInstrFromMaps(MI);
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mii = mbbi->erase(mii);
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++numPeep;
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} else if (!isMove || !TurnCopyIntoImpDef(mii, mbb, DstReg, SrcReg)) {
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} else {
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SmallSet<unsigned, 4> UniqueUses;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &mop = MI->getOperand(i);
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@ -208,12 +208,6 @@ namespace llvm {
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bool ReMaterializeTrivialDef(LiveInterval &SrcInt, unsigned DstReg,
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unsigned DstSubIdx, MachineInstr *CopyMI);
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/// TurnCopyIntoImpDef - If source of the specified copy is an implicit def,
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/// turn the copy into an implicit def.
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bool TurnCopyIntoImpDef(MachineBasicBlock::iterator &I,
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MachineBasicBlock *MBB,
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unsigned DstReg, unsigned SrcReg);
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/// CanCoalesceWithImpDef - Returns true if the specified copy instruction
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/// from an implicit def to another register can be coalesced away.
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bool CanCoalesceWithImpDef(MachineInstr *CopyMI,
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