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Associate a MemOperand with LDWCP nodes introduced during ISel. 

This information is required if we want LDWCP to be hoisted out of loops.

llvm-svn: 139495
This commit is contained in:
Richard Osborne 2011-09-12 14:43:23 +00:00
parent dcde6e30b9
commit 97a2a5c4dc
2 changed files with 26 additions and 3 deletions
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11
llvm/lib/Target/XCore/XCoreISelDAGToDAG.cpp
View File

@ -169,9 +169,14 @@ SDNode *XCoreDAGToDAGISel::Select(SDNode *N) {
CurDAG->getTargetConstantPool(ConstantInt::get(
Type::getInt32Ty(*CurDAG->getContext()), Val),
TLI.getPointerTy());
return CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32,
MVT::Other, CPIdx,
CurDAG->getEntryNode());
SDNode *node = CurDAG->getMachineNode(XCore::LDWCP_lru6, dl, MVT::i32,
MVT::Other, CPIdx,
CurDAG->getEntryNode());
MachineSDNode::mmo_iterator MemOp = MF->allocateMemRefsArray(1);
MemOp[0] = MF->getMachineMemOperand(
MachinePointerInfo::getConstantPool(), MachineMemOperand::MOLoad, 4, 4);
cast<MachineSDNode>(node)->setMemRefs(MemOp, MemOp + 1);
return node;
}
break;
}

18
llvm/test/CodeGen/XCore/licm-ldwcp.ll Normal file
View File

@ -0,0 +1,18 @@
; RUN: llc < %s -march=xcore -asm-verbose=0 | FileCheck %s
; MachineLICM should hoist the LDWCP out of the loop.
; CHECK: f:
; CHECK-NEXT: ldw [[REG:r[0-9]+]], cp[.LCPI0_0]
; CHECK-NEXT: .LBB0_1:
; CHECK-NEXT: stw [[REG]], r0[0]
; CHECK-NEXT: bu .LBB0_1
define void @f(i32* nocapture %p) noreturn nounwind {
entry:
br label %bb
bb: ; preds = %bb, %entry
volatile store i32 525509670, i32* %p, align 4
br label %bb
}