[MIRParser] Non-generic virtual register may have a type.

When generic virtual registers get constrained, because of a use on a
target specific operation for instance, we end up with regular virtual
registers with a type and that's perfectly fine.

llvm-svn: 290376

llvm/lib/CodeGen/MIRParser/MIParser.cpp

@@ -1029,9 +1029,6 @@ bool MIParser::parseRegisterOperand(MachineOperand &Dest,
     // Virtual registers may have a size with GlobalISel.
     if (!TargetRegisterInfo::isVirtualRegister(Reg))
       return error("unexpected size on physical register");
-    if (RegInfo->Kind != VRegInfo::GENERIC &&
-        RegInfo->Kind != VRegInfo::REGBANK)
-      return error("unexpected size on non-generic virtual register");
 
     LLT Ty;
     if (parseLowLevelType(Token.location(), Ty))

llvm/test/CodeGen/MIR/X86/unexpected-size-non-generic-register.mir

@@ -1,14 +0,0 @@
-# RUN: not llc -march=x86-64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
-# This test ensures that an error is reported when a register operand is sized
-# but isn't generic like a regular virtual register (gr32).
-
----
-name:            test_size_regclass
-registers:
-  - { id: 0, class: gr32 }
-body: |
-  bb.0.entry:
-    liveins: %edi
-    ; CHECK: [[@LINE+1]]:8: unexpected size on non-generic virtual register
-    %0(32) = G_ADD i32 %edi, %edi
-...