forked from OSchip/llvm-project
Add a few more missing MMX operations. This should be it.
llvm-svn: 112740
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@ -630,6 +630,9 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_ssse3_pshuf_b_128 : GCCBuiltin<"__builtin_ia32_pshufb128">,
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Intrinsic<[llvm_v16i8_ty], [llvm_v16i8_ty,
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llvm_v16i8_ty], [IntrNoMem]>;
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def int_x86_ssse3_pshuf_w : GCCBuiltin<"__builtin_ia32_pshufw">,
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Intrinsic<[llvm_v4i16_ty], [llvm_v4i16_ty, llvm_i32_ty],
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[IntrNoMem]>;
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}
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// Sign ops
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@ -1567,12 +1570,20 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
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def int_x86_mmx_movnt_dq : GCCBuiltin<"__builtin_ia32_movntq">,
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Intrinsic<[], [llvm_ptr_ty, llvm_v1i64_ty], []>;
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def int_x86_mmx_cvtsi32_MMX : GCCBuiltin<"__builtin_ia32_vec_init_v2si">,
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def int_x86_mmx_palignr_b : GCCBuiltin<"__builtin_ia32_palignr">,
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty,
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llvm_v1i64_ty, llvm_i32_ty], [IntrNoMem]>;
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def int_x86_mmx_pextr_w :
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Intrinsic<[llvm_i32_ty], [llvm_v1i64_ty, llvm_i32_ty],
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[IntrNoMem]>;
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def int_x86_mmx_pinsr_w :
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Intrinsic<[llvm_v1i64_ty], [llvm_v1i64_ty,
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llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
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def int_x86_mmx_cvtsi32_si64 : GCCBuiltin<"__builtin_ia32_vec_init_v2si">,
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Intrinsic<[llvm_v1i64_ty], [llvm_i32_ty], [IntrNoMem]>;
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def int_x86_mmx_cvtsi64_MMX :
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Intrinsic<[llvm_v1i64_ty], [llvm_i64_ty], [IntrNoMem]>;
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def int_x86_mmx_MMX_si32 : GCCBuiltin<"__builtin_ia32_vec_ext_v2si">,
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def int_x86_mmx_cvtsi64_si32 : GCCBuiltin<"__builtin_ia32_vec_ext_v2si">,
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Intrinsic<[llvm_i32_ty], [llvm_v1i64_ty], [IntrNoMem]>;
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def int_x86_mmx_MMX_si64 :
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Intrinsic<[llvm_i64_ty], [llvm_v1i64_ty], [IntrNoMem]>;
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}
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