forked from OSchip/llvm-project
[InstCombine] Use different icmp pattern in test (NFC)
Use an and/or of icmp pattern that produces different code depending on whether it is part of a logical or bitwise and/or.
This commit is contained in:
Nikita Popov
parent
bb8e02325f
commit
973c7e0654
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@ -1277,517 +1277,717 @@ define i1 @is_ascii_alphabetic_inverted(i32 %char) {
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ret i1 %logical
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}
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define i1 @bitwise_and_bitwise_and_icmps(i8 %x, i8 %y) {
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define i1 @bitwise_and_bitwise_and_icmps(i8 %x, i8 %y, i8 %z) {
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; CHECK-LABEL: @bitwise_and_bitwise_and_icmps(
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; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X:%.*]], 0
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; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[C1]], [[TMP1]]
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; CHECK-NEXT: ret i1 [[TMP2]]
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; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
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; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
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; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]
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; CHECK-NEXT: [[TMP4:%.*]] = and i1 [[C1]], [[TMP3]]
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; CHECK-NEXT: ret i1 [[TMP4]]
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;
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%c1 = icmp eq i8 %y, 42
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%c2 = icmp slt i8 %x, 1
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%c3 = icmp sgt i8 %x, -1
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%x.m1 = and i8 %x, 1
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%z.shift = shl i8 1, %z
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%x.m2 = and i8 %x, %z.shift
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%c2 = icmp ne i8 %x.m1, 0
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%c3 = icmp ne i8 %x.m2, 0
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%and1 = and i1 %c1, %c2
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%and2 = and i1 %and1, %c3
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ret i1 %and2
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}
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define i1 @bitwise_and_bitwise_and_icmps_comm1(i8 %x, i8 %y) {
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define i1 @bitwise_and_bitwise_and_icmps_comm1(i8 %x, i8 %y, i8 %z) {
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; CHECK-LABEL: @bitwise_and_bitwise_and_icmps_comm1(
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; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X:%.*]], 0
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; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[C1]], [[TMP1]]
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; CHECK-NEXT: ret i1 [[TMP2]]
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; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
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; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
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; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]
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; CHECK-NEXT: [[TMP4:%.*]] = and i1 [[C1]], [[TMP3]]
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; CHECK-NEXT: ret i1 [[TMP4]]
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;
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%c1 = icmp eq i8 %y, 42
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%c2 = icmp slt i8 %x, 1
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%c3 = icmp sgt i8 %x, -1
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%x.m1 = and i8 %x, 1
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%z.shift = shl i8 1, %z
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%x.m2 = and i8 %x, %z.shift
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%c2 = icmp ne i8 %x.m1, 0
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%c3 = icmp ne i8 %x.m2, 0
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%and1 = and i1 %c1, %c2
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%and2 = and i1 %c3, %and1
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ret i1 %and2
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}
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define i1 @bitwise_and_bitwise_and_icmps_comm2(i8 %x, i8 %y) {
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define i1 @bitwise_and_bitwise_and_icmps_comm2(i8 %x, i8 %y, i8 %z) {
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; CHECK-LABEL: @bitwise_and_bitwise_and_icmps_comm2(
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; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X:%.*]], 0
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; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[C1]]
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; CHECK-NEXT: ret i1 [[TMP2]]
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; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
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; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
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; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]
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; CHECK-NEXT: [[TMP4:%.*]] = and i1 [[TMP3]], [[C1]]
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; CHECK-NEXT: ret i1 [[TMP4]]
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;
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%c1 = icmp eq i8 %y, 42
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%c2 = icmp slt i8 %x, 1
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%c3 = icmp sgt i8 %x, -1
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%x.m1 = and i8 %x, 1
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%z.shift = shl i8 1, %z
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%x.m2 = and i8 %x, %z.shift
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%c2 = icmp ne i8 %x.m1, 0
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%c3 = icmp ne i8 %x.m2, 0
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%and1 = and i1 %c2, %c1
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%and2 = and i1 %and1, %c3
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ret i1 %and2
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}
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define i1 @bitwise_and_bitwise_and_icmps_comm3(i8 %x, i8 %y) {
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define i1 @bitwise_and_bitwise_and_icmps_comm3(i8 %x, i8 %y, i8 %z) {
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; CHECK-LABEL: @bitwise_and_bitwise_and_icmps_comm3(
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; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X:%.*]], 0
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; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[C1]]
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; CHECK-NEXT: ret i1 [[TMP2]]
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; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
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; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
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; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
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; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]
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; CHECK-NEXT: [[TMP4:%.*]] = and i1 [[TMP3]], [[C1]]
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; CHECK-NEXT: ret i1 [[TMP4]]
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;
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%c1 = icmp eq i8 %y, 42
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%c2 = icmp slt i8 %x, 1
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%c3 = icmp sgt i8 %x, -1
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%x.m1 = and i8 %x, 1
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%z.shift = shl i8 1, %z
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%x.m2 = and i8 %x, %z.shift
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%c2 = icmp ne i8 %x.m1, 0
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%c3 = icmp ne i8 %x.m2, 0
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%and1 = and i1 %c2, %c1
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%and2 = and i1 %c3, %and1
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ret i1 %and2
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}
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define i1 @bitwise_and_logical_and_icmps(i8 %x, i8 %y) {
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define i1 @bitwise_and_logical_and_icmps(i8 %x, i8 %y, i8 %z) {
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; CHECK-LABEL: @bitwise_and_logical_and_icmps(
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; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
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; CHECK-NEXT: [[C2:%.*]] = icmp slt i8 [[X:%.*]], 1
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; CHECK-NEXT: [[C3:%.*]] = icmp sgt i8 [[X]], -1
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; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
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; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
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; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
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; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
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; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
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; CHECK-NEXT: [[AND1:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
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; CHECK-NEXT: [[AND2:%.*]] = and i1 [[AND1]], [[C3]]
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; CHECK-NEXT: ret i1 [[AND2]]
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;
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%c1 = icmp eq i8 %y, 42
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%c2 = icmp slt i8 %x, 1
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%c3 = icmp sgt i8 %x, -1
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%x.m1 = and i8 %x, 1
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%z.shift = shl i8 1, %z
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%x.m2 = and i8 %x, %z.shift
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%c2 = icmp ne i8 %x.m1, 0
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%c3 = icmp ne i8 %x.m2, 0
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%and1 = select i1 %c1, i1 %c2, i1 false
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%and2 = and i1 %and1, %c3
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ret i1 %and2
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}
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define i1 @bitwise_and_logical_and_icmps_comm1(i8 %x, i8 %y) {
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define i1 @bitwise_and_logical_and_icmps_comm1(i8 %x, i8 %y, i8 %z) {
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; CHECK-LABEL: @bitwise_and_logical_and_icmps_comm1(
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; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
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; CHECK-NEXT: [[C2:%.*]] = icmp slt i8 [[X:%.*]], 1
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; CHECK-NEXT: [[C3:%.*]] = icmp sgt i8 [[X]], -1
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; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
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; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
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; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
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; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
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; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
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; CHECK-NEXT: [[AND1:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
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; CHECK-NEXT: [[AND2:%.*]] = and i1 [[C3]], [[AND1]]
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; CHECK-NEXT: ret i1 [[AND2]]
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;
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%c1 = icmp eq i8 %y, 42
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%c2 = icmp slt i8 %x, 1
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%c3 = icmp sgt i8 %x, -1
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%x.m1 = and i8 %x, 1
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%z.shift = shl i8 1, %z
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%x.m2 = and i8 %x, %z.shift
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%c2 = icmp ne i8 %x.m1, 0
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%c3 = icmp ne i8 %x.m2, 0
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%and1 = select i1 %c1, i1 %c2, i1 false
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%and2 = and i1 %c3, %and1
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ret i1 %and2
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}
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define i1 @bitwise_and_logical_and_icmps_comm2(i8 %x, i8 %y) {
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define i1 @bitwise_and_logical_and_icmps_comm2(i8 %x, i8 %y, i8 %z) {
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; CHECK-LABEL: @bitwise_and_logical_and_icmps_comm2(
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; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
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; CHECK-NEXT: [[C2:%.*]] = icmp slt i8 [[X:%.*]], 1
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; CHECK-NEXT: [[C3:%.*]] = icmp sgt i8 [[X]], -1
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; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
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; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
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; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
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; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
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; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
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; CHECK-NEXT: [[AND1:%.*]] = select i1 [[C2]], i1 [[C1]], i1 false
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; CHECK-NEXT: [[AND2:%.*]] = and i1 [[AND1]], [[C3]]
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; CHECK-NEXT: ret i1 [[AND2]]
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;
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%c1 = icmp eq i8 %y, 42
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%c2 = icmp slt i8 %x, 1
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%c3 = icmp sgt i8 %x, -1
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%x.m1 = and i8 %x, 1
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%z.shift = shl i8 1, %z
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%x.m2 = and i8 %x, %z.shift
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%c2 = icmp ne i8 %x.m1, 0
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%c3 = icmp ne i8 %x.m2, 0
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%and1 = select i1 %c2, i1 %c1, i1 false
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%and2 = and i1 %and1, %c3
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ret i1 %and2
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}
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define i1 @bitwise_and_logical_and_icmps_comm3(i8 %x, i8 %y) {
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define i1 @bitwise_and_logical_and_icmps_comm3(i8 %x, i8 %y, i8 %z) {
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; CHECK-LABEL: @bitwise_and_logical_and_icmps_comm3(
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; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
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; CHECK-NEXT: [[C2:%.*]] = icmp slt i8 [[X:%.*]], 1
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; CHECK-NEXT: [[C3:%.*]] = icmp sgt i8 [[X]], -1
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; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
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; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
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; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
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; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
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; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
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; CHECK-NEXT: [[AND1:%.*]] = select i1 [[C2]], i1 [[C1]], i1 false
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; CHECK-NEXT: [[AND2:%.*]] = and i1 [[C3]], [[AND1]]
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; CHECK-NEXT: ret i1 [[AND2]]
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;
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%c1 = icmp eq i8 %y, 42
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%c2 = icmp slt i8 %x, 1
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%c3 = icmp sgt i8 %x, -1
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%x.m1 = and i8 %x, 1
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%z.shift = shl i8 1, %z
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%x.m2 = and i8 %x, %z.shift
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%c2 = icmp ne i8 %x.m1, 0
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%c3 = icmp ne i8 %x.m2, 0
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%and1 = select i1 %c2, i1 %c1, i1 false
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%and2 = and i1 %c3, %and1
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ret i1 %and2
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}
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define i1 @logical_and_bitwise_and_icmps(i8 %x, i8 %y) {
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define i1 @logical_and_bitwise_and_icmps(i8 %x, i8 %y, i8 %z) {
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; CHECK-LABEL: @logical_and_bitwise_and_icmps(
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; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X:%.*]], 0
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; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[C1]], [[TMP1]]
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; CHECK-NEXT: ret i1 [[TMP2]]
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; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
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; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
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; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
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; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
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; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
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; CHECK-NEXT: [[AND1:%.*]] = and i1 [[C1]], [[C2]]
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; CHECK-NEXT: [[AND2:%.*]] = select i1 [[AND1]], i1 [[C3]], i1 false
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; CHECK-NEXT: ret i1 [[AND2]]
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;
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%c1 = icmp eq i8 %y, 42
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%c2 = icmp slt i8 %x, 1
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%c3 = icmp sgt i8 %x, -1
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%x.m1 = and i8 %x, 1
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%z.shift = shl i8 1, %z
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%x.m2 = and i8 %x, %z.shift
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%c2 = icmp ne i8 %x.m1, 0
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%c3 = icmp ne i8 %x.m2, 0
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%and1 = and i1 %c1, %c2
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%and2 = select i1 %and1, i1 %c3, i1 false
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ret i1 %and2
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}
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define i1 @logical_and_bitwise_and_icmps_comm1(i8 %x, i8 %y) {
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define i1 @logical_and_bitwise_and_icmps_comm1(i8 %x, i8 %y, i8 %z) {
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; CHECK-LABEL: @logical_and_bitwise_and_icmps_comm1(
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; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
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; CHECK-NEXT: [[C2:%.*]] = icmp slt i8 [[X:%.*]], 1
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; CHECK-NEXT: [[C3:%.*]] = icmp sgt i8 [[X]], -1
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; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
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; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
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; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
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; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
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; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
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; CHECK-NEXT: [[AND1:%.*]] = and i1 [[C1]], [[C2]]
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; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C3]], i1 [[AND1]], i1 false
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; CHECK-NEXT: ret i1 [[AND2]]
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;
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%c1 = icmp eq i8 %y, 42
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%c2 = icmp slt i8 %x, 1
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%c3 = icmp sgt i8 %x, -1
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%x.m1 = and i8 %x, 1
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%z.shift = shl i8 1, %z
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%x.m2 = and i8 %x, %z.shift
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%c2 = icmp ne i8 %x.m1, 0
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%c3 = icmp ne i8 %x.m2, 0
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%and1 = and i1 %c1, %c2
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%and2 = select i1 %c3, i1 %and1, i1 false
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ret i1 %and2
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}
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define i1 @logical_and_bitwise_and_icmps_comm2(i8 %x, i8 %y) {
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define i1 @logical_and_bitwise_and_icmps_comm2(i8 %x, i8 %y, i8 %z) {
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; CHECK-LABEL: @logical_and_bitwise_and_icmps_comm2(
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; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X:%.*]], 0
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; CHECK-NEXT: [[TMP2:%.*]] = and i1 [[TMP1]], [[C1]]
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; CHECK-NEXT: ret i1 [[TMP2]]
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; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
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; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
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; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
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; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
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; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
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; CHECK-NEXT: [[AND1:%.*]] = and i1 [[C2]], [[C1]]
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; CHECK-NEXT: [[AND2:%.*]] = select i1 [[AND1]], i1 [[C3]], i1 false
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; CHECK-NEXT: ret i1 [[AND2]]
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;
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%c1 = icmp eq i8 %y, 42
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%c2 = icmp slt i8 %x, 1
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%c3 = icmp sgt i8 %x, -1
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%x.m1 = and i8 %x, 1
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%z.shift = shl i8 1, %z
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%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp ne i8 %x.m1, 0
|
||||
%c3 = icmp ne i8 %x.m2, 0
|
||||
%and1 = and i1 %c2, %c1
|
||||
%and2 = select i1 %and1, i1 %c3, i1 false
|
||||
ret i1 %and2
|
||||
}
|
||||
|
||||
define i1 @logical_and_bitwise_and_icmps_comm3(i8 %x, i8 %y) {
|
||||
define i1 @logical_and_bitwise_and_icmps_comm3(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @logical_and_bitwise_and_icmps_comm3(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp slt i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp sgt i8 [[X]], -1
|
||||
; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
|
||||
; CHECK-NEXT: [[AND1:%.*]] = and i1 [[C2]], [[C1]]
|
||||
; CHECK-NEXT: [[AND2:%.*]] = select i1 [[C3]], i1 [[AND1]], i1 false
|
||||
; CHECK-NEXT: ret i1 [[AND2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp slt i8 %x, 1
|
||||
%c3 = icmp sgt i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp ne i8 %x.m1, 0
|
||||
%c3 = icmp ne i8 %x.m2, 0
|
||||
%and1 = and i1 %c2, %c1
|
||||
%and2 = select i1 %c3, i1 %and1, i1 false
|
||||
ret i1 %and2
|
||||
}
|
||||
|
||||
define i1 @logical_and_logical_and_icmps(i8 %x, i8 %y) {
|
||||
define i1 @logical_and_logical_and_icmps(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @logical_and_logical_and_icmps(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp slt i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp sgt i8 [[X]], -1
|
||||
; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
|
||||
; CHECK-NEXT: [[AND1:%.*]] = select i1 [[C1]], i1 [[C2]], i1 false
|
||||
; CHECK-NEXT: [[AND2:%.*]] = select i1 [[AND1]], i1 [[C3]], i1 false
|
||||
; CHECK-NEXT: ret i1 [[AND2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp slt i8 %x, 1
|
||||
%c3 = icmp sgt i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp ne i8 %x.m1, 0
|
||||
%c3 = icmp ne i8 %x.m2, 0
|
||||
%and1 = select i1 %c1, i1 %c2, i1 false
|
||||
%and2 = select i1 %and1, i1 %c3, i1 false
|
||||
ret i1 %and2
|
||||
}
|
||||
|
||||
define i1 @logical_and_logical_and_icmps_comm1(i8 %x, i8 %y) {
|
||||
define i1 @logical_and_logical_and_icmps_comm1(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @logical_and_logical_and_icmps_comm1(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp slt i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp sgt i8 [[X]], -1
|
||||
; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C3]], i1 [[C1]], i1 false
|
||||
; CHECK-NEXT: [[AND2:%.*]] = and i1 [[TMP1]], [[C2]]
|
||||
; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP1]], i1 [[C2]], i1 false
|
||||
; CHECK-NEXT: ret i1 [[AND2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp slt i8 %x, 1
|
||||
%c3 = icmp sgt i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp ne i8 %x.m1, 0
|
||||
%c3 = icmp ne i8 %x.m2, 0
|
||||
%and1 = select i1 %c1, i1 %c2, i1 false
|
||||
%and2 = select i1 %c3, i1 %and1, i1 false
|
||||
ret i1 %and2
|
||||
}
|
||||
|
||||
define i1 @logical_and_logical_and_icmps_comm2(i8 %x, i8 %y) {
|
||||
define i1 @logical_and_logical_and_icmps_comm2(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @logical_and_logical_and_icmps_comm2(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp slt i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp sgt i8 [[X]], -1
|
||||
; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp ne i8 [[X_M1]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp ne i8 [[X_M2]], 0
|
||||
; CHECK-NEXT: [[AND1:%.*]] = select i1 [[C2]], i1 [[C1]], i1 false
|
||||
; CHECK-NEXT: [[AND2:%.*]] = and i1 [[AND1]], [[C3]]
|
||||
; CHECK-NEXT: [[AND2:%.*]] = select i1 [[AND1]], i1 [[C3]], i1 false
|
||||
; CHECK-NEXT: ret i1 [[AND2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp slt i8 %x, 1
|
||||
%c3 = icmp sgt i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp ne i8 %x.m1, 0
|
||||
%c3 = icmp ne i8 %x.m2, 0
|
||||
%and1 = select i1 %c2, i1 %c1, i1 false
|
||||
%and2 = select i1 %and1, i1 %c3, i1 false
|
||||
ret i1 %and2
|
||||
}
|
||||
|
||||
define i1 @logical_and_logical_and_icmps_comm3(i8 %x, i8 %y) {
|
||||
define i1 @logical_and_logical_and_icmps_comm3(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @logical_and_logical_and_icmps_comm3(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP1]], i1 [[C1]], i1 false
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i8 [[TMP2]], [[TMP1]]
|
||||
; CHECK-NEXT: [[AND2:%.*]] = select i1 [[TMP3]], i1 [[C1]], i1 false
|
||||
; CHECK-NEXT: ret i1 [[AND2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp slt i8 %x, 1
|
||||
%c3 = icmp sgt i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp ne i8 %x.m1, 0
|
||||
%c3 = icmp ne i8 %x.m2, 0
|
||||
%and1 = select i1 %c2, i1 %c1, i1 false
|
||||
%and2 = select i1 %c3, i1 %and1, i1 false
|
||||
ret i1 %and2
|
||||
}
|
||||
|
||||
define i1 @bitwise_or_bitwise_or_icmps(i8 %x, i8 %y) {
|
||||
define i1 @bitwise_or_bitwise_or_icmps(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @bitwise_or_bitwise_or_icmps(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = or i1 [[C1]], [[TMP1]]
|
||||
; CHECK-NEXT: ret i1 [[TMP2]]
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[C1]], [[TMP3]]
|
||||
; CHECK-NEXT: ret i1 [[TMP4]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = or i1 %c1, %c2
|
||||
%or2 = or i1 %or1, %c3
|
||||
ret i1 %or2
|
||||
}
|
||||
|
||||
define i1 @bitwise_or_bitwise_or_icmps_comm1(i8 %x, i8 %y) {
|
||||
define i1 @bitwise_or_bitwise_or_icmps_comm1(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @bitwise_or_bitwise_or_icmps_comm1(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = or i1 [[C1]], [[TMP1]]
|
||||
; CHECK-NEXT: ret i1 [[TMP2]]
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[C1]], [[TMP3]]
|
||||
; CHECK-NEXT: ret i1 [[TMP4]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = or i1 %c1, %c2
|
||||
%or2 = or i1 %c3, %or1
|
||||
ret i1 %or2
|
||||
}
|
||||
|
||||
define i1 @bitwise_or_bitwise_or_icmps_comm2(i8 %x, i8 %y) {
|
||||
define i1 @bitwise_or_bitwise_or_icmps_comm2(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @bitwise_or_bitwise_or_icmps_comm2(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = or i1 [[TMP1]], [[C1]]
|
||||
; CHECK-NEXT: ret i1 [[TMP2]]
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[TMP3]], [[C1]]
|
||||
; CHECK-NEXT: ret i1 [[TMP4]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = or i1 %c2, %c1
|
||||
%or2 = or i1 %or1, %c3
|
||||
ret i1 %or2
|
||||
}
|
||||
|
||||
define i1 @bitwise_or_bitwise_or_icmps_comm3(i8 %x, i8 %y) {
|
||||
define i1 @bitwise_or_bitwise_or_icmps_comm3(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @bitwise_or_bitwise_or_icmps_comm3(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = or i1 [[TMP1]], [[C1]]
|
||||
; CHECK-NEXT: ret i1 [[TMP2]]
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]
|
||||
; CHECK-NEXT: [[TMP4:%.*]] = or i1 [[TMP3]], [[C1]]
|
||||
; CHECK-NEXT: ret i1 [[TMP4]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = or i1 %c2, %c1
|
||||
%or2 = or i1 %c3, %or1
|
||||
ret i1 %or2
|
||||
}
|
||||
|
||||
define i1 @bitwise_or_logical_or_icmps(i8 %x, i8 %y) {
|
||||
define i1 @bitwise_or_logical_or_icmps(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @bitwise_or_logical_or_icmps(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp sgt i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp slt i8 [[X]], 0
|
||||
; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
|
||||
; CHECK-NEXT: [[OR1:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
|
||||
; CHECK-NEXT: [[OR2:%.*]] = or i1 [[OR1]], [[C3]]
|
||||
; CHECK-NEXT: ret i1 [[OR2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = select i1 %c1, i1 true, i1 %c2
|
||||
%or2 = or i1 %or1, %c3
|
||||
ret i1 %or2
|
||||
}
|
||||
|
||||
define i1 @bitwise_or_logical_or_icmps_comm1(i8 %x, i8 %y) {
|
||||
define i1 @bitwise_or_logical_or_icmps_comm1(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @bitwise_or_logical_or_icmps_comm1(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp sgt i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp slt i8 [[X]], 0
|
||||
; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
|
||||
; CHECK-NEXT: [[OR1:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
|
||||
; CHECK-NEXT: [[OR2:%.*]] = or i1 [[C3]], [[OR1]]
|
||||
; CHECK-NEXT: ret i1 [[OR2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = select i1 %c1, i1 true, i1 %c2
|
||||
%or2 = or i1 %c3, %or1
|
||||
ret i1 %or2
|
||||
}
|
||||
|
||||
define i1 @bitwise_or_logical_or_icmps_comm2(i8 %x, i8 %y) {
|
||||
define i1 @bitwise_or_logical_or_icmps_comm2(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @bitwise_or_logical_or_icmps_comm2(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp sgt i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp slt i8 [[X]], 0
|
||||
; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
|
||||
; CHECK-NEXT: [[OR1:%.*]] = select i1 [[C2]], i1 true, i1 [[C1]]
|
||||
; CHECK-NEXT: [[OR2:%.*]] = or i1 [[OR1]], [[C3]]
|
||||
; CHECK-NEXT: ret i1 [[OR2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = select i1 %c2, i1 true, i1 %c1
|
||||
%or2 = or i1 %or1, %c3
|
||||
ret i1 %or2
|
||||
}
|
||||
|
||||
define i1 @bitwise_or_logical_or_icmps_comm3(i8 %x, i8 %y) {
|
||||
define i1 @bitwise_or_logical_or_icmps_comm3(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @bitwise_or_logical_or_icmps_comm3(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp sgt i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp slt i8 [[X]], 0
|
||||
; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
|
||||
; CHECK-NEXT: [[OR1:%.*]] = select i1 [[C2]], i1 true, i1 [[C1]]
|
||||
; CHECK-NEXT: [[OR2:%.*]] = or i1 [[C3]], [[OR1]]
|
||||
; CHECK-NEXT: ret i1 [[OR2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = select i1 %c2, i1 true, i1 %c1
|
||||
%or2 = or i1 %c3, %or1
|
||||
ret i1 %or2
|
||||
}
|
||||
|
||||
define i1 @logical_or_bitwise_or_icmps(i8 %x, i8 %y) {
|
||||
define i1 @logical_or_bitwise_or_icmps(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @logical_or_bitwise_or_icmps(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = or i1 [[C1]], [[TMP1]]
|
||||
; CHECK-NEXT: ret i1 [[TMP2]]
|
||||
; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
|
||||
; CHECK-NEXT: [[OR1:%.*]] = or i1 [[C1]], [[C2]]
|
||||
; CHECK-NEXT: [[OR2:%.*]] = select i1 [[OR1]], i1 true, i1 [[C3]]
|
||||
; CHECK-NEXT: ret i1 [[OR2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = or i1 %c1, %c2
|
||||
%or2 = select i1 %or1, i1 true, i1 %c3
|
||||
ret i1 %or2
|
||||
}
|
||||
|
||||
define i1 @logical_or_bitwise_or_icmps_comm1(i8 %x, i8 %y) {
|
||||
define i1 @logical_or_bitwise_or_icmps_comm1(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @logical_or_bitwise_or_icmps_comm1(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp sgt i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp slt i8 [[X]], 0
|
||||
; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
|
||||
; CHECK-NEXT: [[OR1:%.*]] = or i1 [[C1]], [[C2]]
|
||||
; CHECK-NEXT: [[OR2:%.*]] = select i1 [[C3]], i1 true, i1 [[OR1]]
|
||||
; CHECK-NEXT: ret i1 [[OR2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = or i1 %c1, %c2
|
||||
%or2 = select i1 %c3, i1 true, i1 %or1
|
||||
ret i1 %or2
|
||||
}
|
||||
|
||||
define i1 @logical_or_bitwise_or_icmps_comm2(i8 %x, i8 %y) {
|
||||
define i1 @logical_or_bitwise_or_icmps_comm2(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @logical_or_bitwise_or_icmps_comm2(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = or i1 [[TMP1]], [[C1]]
|
||||
; CHECK-NEXT: ret i1 [[TMP2]]
|
||||
; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
|
||||
; CHECK-NEXT: [[OR1:%.*]] = or i1 [[C2]], [[C1]]
|
||||
; CHECK-NEXT: [[OR2:%.*]] = select i1 [[OR1]], i1 true, i1 [[C3]]
|
||||
; CHECK-NEXT: ret i1 [[OR2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = or i1 %c2, %c1
|
||||
%or2 = select i1 %or1, i1 true, i1 %c3
|
||||
ret i1 %or2
|
||||
}
|
||||
|
||||
define i1 @logical_or_bitwise_or_icmps_comm3(i8 %x, i8 %y) {
|
||||
define i1 @logical_or_bitwise_or_icmps_comm3(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @logical_or_bitwise_or_icmps_comm3(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp sgt i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp slt i8 [[X]], 0
|
||||
; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
|
||||
; CHECK-NEXT: [[OR1:%.*]] = or i1 [[C2]], [[C1]]
|
||||
; CHECK-NEXT: [[OR2:%.*]] = select i1 [[C3]], i1 true, i1 [[OR1]]
|
||||
; CHECK-NEXT: ret i1 [[OR2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = or i1 %c2, %c1
|
||||
%or2 = select i1 %c3, i1 true, i1 %or1
|
||||
ret i1 %or2
|
||||
}
|
||||
|
||||
define i1 @logical_or_logical_or_icmps(i8 %x, i8 %y) {
|
||||
define i1 @logical_or_logical_or_icmps(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @logical_or_logical_or_icmps(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp sgt i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp slt i8 [[X]], 0
|
||||
; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
|
||||
; CHECK-NEXT: [[OR1:%.*]] = select i1 [[C1]], i1 true, i1 [[C2]]
|
||||
; CHECK-NEXT: [[OR2:%.*]] = select i1 [[OR1]], i1 true, i1 [[C3]]
|
||||
; CHECK-NEXT: ret i1 [[OR2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = select i1 %c1, i1 true, i1 %c2
|
||||
%or2 = select i1 %or1, i1 true, i1 %c3
|
||||
ret i1 %or2
|
||||
}
|
||||
|
||||
define i1 @logical_or_logical_or_icmps_comm1(i8 %x, i8 %y) {
|
||||
define i1 @logical_or_logical_or_icmps_comm1(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @logical_or_logical_or_icmps_comm1(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp sgt i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp slt i8 [[X]], 0
|
||||
; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = select i1 [[C3]], i1 true, i1 [[C1]]
|
||||
; CHECK-NEXT: [[OR2:%.*]] = or i1 [[TMP1]], [[C2]]
|
||||
; CHECK-NEXT: [[OR2:%.*]] = select i1 [[TMP1]], i1 true, i1 [[C2]]
|
||||
; CHECK-NEXT: ret i1 [[OR2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = select i1 %c1, i1 true, i1 %c2
|
||||
%or2 = select i1 %c3, i1 true, i1 %or1
|
||||
ret i1 %or2
|
||||
}
|
||||
|
||||
define i1 @logical_or_logical_or_icmps_comm2(i8 %x, i8 %y) {
|
||||
define i1 @logical_or_logical_or_icmps_comm2(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @logical_or_logical_or_icmps_comm2(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp sgt i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp slt i8 [[X]], 0
|
||||
; CHECK-NEXT: [[X_M1:%.*]] = and i8 [[X:%.*]], 1
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[X_M2:%.*]] = and i8 [[Z_SHIFT]], [[X]]
|
||||
; CHECK-NEXT: [[C2:%.*]] = icmp eq i8 [[X_M1]], 0
|
||||
; CHECK-NEXT: [[C3:%.*]] = icmp eq i8 [[X_M2]], 0
|
||||
; CHECK-NEXT: [[OR1:%.*]] = select i1 [[C2]], i1 true, i1 [[C1]]
|
||||
; CHECK-NEXT: [[OR2:%.*]] = or i1 [[OR1]], [[C3]]
|
||||
; CHECK-NEXT: [[OR2:%.*]] = select i1 [[OR1]], i1 true, i1 [[C3]]
|
||||
; CHECK-NEXT: ret i1 [[OR2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = select i1 %c2, i1 true, i1 %c1
|
||||
%or2 = select i1 %or1, i1 true, i1 %c3
|
||||
ret i1 %or2
|
||||
}
|
||||
|
||||
define i1 @logical_or_logical_or_icmps_comm3(i8 %x, i8 %y) {
|
||||
define i1 @logical_or_logical_or_icmps_comm3(i8 %x, i8 %y, i8 %z) {
|
||||
; CHECK-LABEL: @logical_or_logical_or_icmps_comm3(
|
||||
; CHECK-NEXT: [[C1:%.*]] = icmp eq i8 [[Y:%.*]], 42
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i8 [[X:%.*]], 0
|
||||
; CHECK-NEXT: [[OR2:%.*]] = select i1 [[TMP1]], i1 true, i1 [[C1]]
|
||||
; CHECK-NEXT: [[Z_SHIFT:%.*]] = shl i8 1, [[Z:%.*]]
|
||||
; CHECK-NEXT: [[TMP1:%.*]] = or i8 [[Z_SHIFT]], 1
|
||||
; CHECK-NEXT: [[TMP2:%.*]] = and i8 [[TMP1]], [[X:%.*]]
|
||||
; CHECK-NEXT: [[TMP3:%.*]] = icmp ne i8 [[TMP2]], [[TMP1]]
|
||||
; CHECK-NEXT: [[OR2:%.*]] = select i1 [[TMP3]], i1 true, i1 [[C1]]
|
||||
; CHECK-NEXT: ret i1 [[OR2]]
|
||||
;
|
||||
%c1 = icmp eq i8 %y, 42
|
||||
%c2 = icmp sge i8 %x, 1
|
||||
%c3 = icmp sle i8 %x, -1
|
||||
%x.m1 = and i8 %x, 1
|
||||
%z.shift = shl i8 1, %z
|
||||
%x.m2 = and i8 %x, %z.shift
|
||||
%c2 = icmp eq i8 %x.m1, 0
|
||||
%c3 = icmp eq i8 %x.m2, 0
|
||||
%or1 = select i1 %c2, i1 true, i1 %c1
|
||||
%or2 = select i1 %c3, i1 true, i1 %or1
|
||||
ret i1 %or2
|
||||
|
|
|
|||
Loading…
Reference in New Issue