AMDGPU/GlobalISel: Add SReg_96 to SGPRRegBank

This commit is contained in:
Matt Arsenault 2020-07-26 11:04:37 -04:00
parent 389f009c57
commit 9731ef3ec5
1 changed files with 1 additions and 1 deletions

View File

@ -7,7 +7,7 @@
//===----------------------------------------------------------------------===//
def SGPRRegBank : RegisterBank<"SGPR",
[SReg_LO16, SReg_32, SReg_64, SReg_128, SReg_160, SReg_192, SReg_256, SReg_512, SReg_1024]
[SReg_LO16, SReg_32, SReg_64, SReg_96, SReg_128, SReg_160, SReg_192, SReg_256, SReg_512, SReg_1024]
>;
def VGPRRegBank : RegisterBank<"VGPR",