forked from OSchip/llvm-project
[GlobalISel] Combine `(x + y) - y -> x` and friends
This adds a combine that handles ``` (x + y) - y -> x (x + y) - x -> y x - (y + x) -> 0 - y x - (x + z) -> 0 - z ``` On AArch64, we get added benefit for `0 - y` because it can be selected to a `neg` instruction. Differential Revision: https://reviews.llvm.org/D135010
This commit is contained in:
Jessica Paquette
parent
a2efc29e99
commit
970cb99e0a
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@ -756,6 +756,13 @@ public:
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bool matchBuildVectorIdentityFold(MachineInstr &MI, Register &MatchInfo);
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bool matchTruncBuildVectorFold(MachineInstr &MI, Register &MatchInfo);
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/// Transform:
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/// (x + y) - y -> x
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/// (x + y) - x -> y
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/// x - (y + x) -> 0 - y
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/// x - (x + z) -> 0 - z
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bool matchSubAddSameReg(MachineInstr &MI, BuildFnTy &MatchInfo);
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/// \returns true if it is possible to simplify a select instruction \p MI
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/// to a min/max instruction of some sort.
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bool matchSimplifySelectToMinMax(MachineInstr &MI, BuildFnTy &MatchInfo);
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@ -950,6 +950,17 @@ def trunc_buildvector_fold : GICombineRule<
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[{ return Helper.matchTruncBuildVectorFold(*${op}, ${matchinfo}); }]),
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(apply [{ Helper.replaceSingleDefInstWithReg(*${op}, ${matchinfo}); }])>;
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// Transform:
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// (x + y) - y -> x
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// (x + y) - x -> y
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// x - (y + x) -> 0 - y
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// x - (x + z) -> 0 - z
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def sub_add_reg: GICombineRule <
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(defs root:$root, build_fn_matchinfo:$matchinfo),
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(match (wip_match_opcode G_SUB):$root,
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[{ return Helper.matchSubAddSameReg(*${root}, ${matchinfo}); }]),
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(apply [{ Helper.applyBuildFn(*${root}, ${matchinfo}); }])>;
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def select_to_minmax: GICombineRule<
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(defs root:$root, build_fn_matchinfo:$info),
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(match (wip_match_opcode G_SELECT):$root,
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@ -1019,7 +1030,8 @@ def all_combines : GICombineGroup<[trivial_combines, insert_vec_elt_combines,
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truncstore_merge, div_rem_to_divrem, funnel_shift_combines,
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form_bitfield_extract, constant_fold, fabs_fneg_fold,
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intdiv_combines, mulh_combines, redundant_neg_operands,
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and_or_disjoint_mask, fma_combines, fold_binop_into_select]>;
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and_or_disjoint_mask, fma_combines, fold_binop_into_select,
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sub_add_reg]>;
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// A combine group used to for prelegalizer combiners at -O0. The combines in
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// this group have been selected based on experiments to balance code size and
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@ -4825,6 +4825,50 @@ bool CombinerHelper::matchAddEToAddO(MachineInstr &MI, BuildFnTy &MatchInfo) {
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return true;
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}
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bool CombinerHelper::matchSubAddSameReg(MachineInstr &MI,
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BuildFnTy &MatchInfo) {
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assert(MI.getOpcode() == TargetOpcode::G_SUB);
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Register Dst = MI.getOperand(0).getReg();
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// (x + y) - z -> x (if y == z)
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// (x + y) - z -> y (if x == z)
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Register X, Y, Z;
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if (mi_match(Dst, MRI, m_GSub(m_GAdd(m_Reg(X), m_Reg(Y)), m_Reg(Z)))) {
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Register ReplaceReg;
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int64_t CstX, CstY;
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if (Y == Z || (mi_match(Y, MRI, m_ICstOrSplat(CstY)) &&
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mi_match(Z, MRI, m_SpecificICstOrSplat(CstY))))
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ReplaceReg = X;
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else if (X == Z || (mi_match(X, MRI, m_ICstOrSplat(CstX)) &&
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mi_match(Z, MRI, m_SpecificICstOrSplat(CstX))))
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ReplaceReg = Y;
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if (ReplaceReg) {
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MatchInfo = [=](MachineIRBuilder &B) { B.buildCopy(Dst, ReplaceReg); };
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return true;
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}
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}
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// x - (y + z) -> 0 - y (if x == z)
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// x - (y + z) -> 0 - z (if x == y)
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if (mi_match(Dst, MRI, m_GSub(m_Reg(X), m_GAdd(m_Reg(Y), m_Reg(Z))))) {
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Register ReplaceReg;
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int64_t CstX;
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if (X == Z || (mi_match(X, MRI, m_ICstOrSplat(CstX)) &&
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mi_match(Z, MRI, m_SpecificICstOrSplat(CstX))))
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ReplaceReg = Y;
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else if (X == Y || (mi_match(X, MRI, m_ICstOrSplat(CstX)) &&
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mi_match(Y, MRI, m_SpecificICstOrSplat(CstX))))
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ReplaceReg = Z;
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if (ReplaceReg) {
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MatchInfo = [=](MachineIRBuilder &B) {
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auto Zero = B.buildConstant(MRI.getType(Dst), 0);
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B.buildSub(Dst, Zero, ReplaceReg);
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};
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return true;
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}
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}
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return false;
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}
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MachineInstr *CombinerHelper::buildUDivUsingMul(MachineInstr &MI) {
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assert(MI.getOpcode() == TargetOpcode::G_UDIV);
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auto &UDiv = cast<GenericMachineInstr>(MI);
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@ -0,0 +1,364 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple aarch64 -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
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...
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---
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name: simplify_to_x
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; (x + y) - y -> x
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; CHECK-LABEL: name: simplify_to_x
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %x:_(s32) = COPY $w0
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; CHECK-NEXT: $w0 = COPY %x(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%x:_(s32) = COPY $w0
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%y:_(s32) = COPY $w1
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%add:_(s32) = G_ADD %x, %y
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%sub:_(s32) = G_SUB %add, %y
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$w0 = COPY %sub(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: simplify_to_y
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; (x + y) - x -> y
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; CHECK-LABEL: name: simplify_to_y
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %y:_(s32) = COPY $w1
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; CHECK-NEXT: $w0 = COPY %y(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%x:_(s32) = COPY $w0
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%y:_(s32) = COPY $w1
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%add:_(s32) = G_ADD %x, %y
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%sub:_(s32) = G_SUB %add, %x
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$w0 = COPY %sub(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: simplify_to_constant_x
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; (x + 1) - 1 -> x
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; CHECK-LABEL: name: simplify_to_constant_x
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %x:_(s32) = COPY $w0
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; CHECK-NEXT: $w0 = COPY %x(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%x:_(s32) = COPY $w0
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%y1:_(s32) = G_CONSTANT i32 1
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%y2:_(s32) = G_CONSTANT i32 1
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%add:_(s32) = G_ADD %x, %y1
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%sub:_(s32) = G_SUB %add, %y2
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$w0 = COPY %sub(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: simplify_to_constant_y
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; (x + y) - x -> y
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; CHECK-LABEL: name: simplify_to_constant_y
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %y:_(s32) = COPY $w1
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; CHECK-NEXT: $w0 = COPY %y(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%x1:_(s32) = G_CONSTANT i32 1
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%x2:_(s32) = G_CONSTANT i32 1
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%y:_(s32) = COPY $w1
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%add:_(s32) = G_ADD %x1, %y
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%sub:_(s32) = G_SUB %add, %x2
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$w0 = COPY %sub(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: vector_simplify_to_x
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $d0, $d1
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; (x + y) - y -> x
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; CHECK-LABEL: name: vector_simplify_to_x
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; CHECK: liveins: $d0, $d1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %x:_(<2 x s32>) = COPY $d0
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; CHECK-NEXT: $d0 = COPY %x(<2 x s32>)
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; CHECK-NEXT: RET_ReallyLR implicit $d0
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%x:_(<2 x s32>) = COPY $d0
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%y:_(<2 x s32>) = COPY $d1
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%add:_(<2 x s32>) = G_ADD %x, %y
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%sub:_(<2 x s32>) = G_SUB %add, %y
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$d0 = COPY %sub(<2 x s32>)
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RET_ReallyLR implicit $d0
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...
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---
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name: splat_simplify_to_x
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $d0, $d1
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; (x + 1) - 1 -> x
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; CHECK-LABEL: name: splat_simplify_to_x
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; CHECK: liveins: $d0, $d1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %x:_(<2 x s32>) = COPY $d0
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; CHECK-NEXT: $d0 = COPY %x(<2 x s32>)
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; CHECK-NEXT: RET_ReallyLR implicit $d0
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%x:_(<2 x s32>) = COPY $d0
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%cst:_(s32) = G_CONSTANT i32 1
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%y1:_(<2 x s32>) = G_BUILD_VECTOR %cst, %cst
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%y2:_(<2 x s32>) = G_BUILD_VECTOR %cst, %cst
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%add:_(<2 x s32>) = G_ADD %x, %y1
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%sub:_(<2 x s32>) = G_SUB %add, %y2
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$d0 = COPY %sub(<2 x s32>)
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RET_ReallyLR implicit $d0
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...
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---
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name: unique_registers_no_fold
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1, $w2
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; CHECK-LABEL: name: unique_registers_no_fold
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; CHECK: liveins: $w0, $w1, $w2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %x:_(s32) = COPY $w0
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; CHECK-NEXT: %y:_(s32) = COPY $w1
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; CHECK-NEXT: %z:_(s32) = COPY $w2
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; CHECK-NEXT: %add:_(s32) = G_ADD %y, %x
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; CHECK-NEXT: %sub:_(s32) = G_SUB %add, %z
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; CHECK-NEXT: $w0 = COPY %sub(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%x:_(s32) = COPY $w0
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%y:_(s32) = COPY $w1
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%z:_(s32) = COPY $w2
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%add:_(s32) = G_ADD %y, %x
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%sub:_(s32) = G_SUB %add, %z
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$w0 = COPY %sub(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: unique_constants_no_fold
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; (x + y) - x -> y
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; CHECK-LABEL: name: unique_constants_no_fold
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %x1:_(s32) = G_CONSTANT i32 1
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; CHECK-NEXT: %x2:_(s32) = G_CONSTANT i32 2
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; CHECK-NEXT: %y:_(s32) = COPY $w1
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; CHECK-NEXT: %add:_(s32) = G_ADD %x1, %y
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; CHECK-NEXT: %sub:_(s32) = G_SUB %add, %x2
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; CHECK-NEXT: $w0 = COPY %sub(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%x1:_(s32) = G_CONSTANT i32 1
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%x2:_(s32) = G_CONSTANT i32 2
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%y:_(s32) = COPY $w1
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%add:_(s32) = G_ADD %x1, %y
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%sub:_(s32) = G_SUB %add, %x2
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$w0 = COPY %sub(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: simplify_to_neg_y
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; x - (y + x) -> 0 - y
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; CHECK-LABEL: name: simplify_to_neg_y
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %y:_(s32) = COPY $w1
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: %sub:_(s32) = G_SUB [[C]], %y
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; CHECK-NEXT: $w0 = COPY %sub(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%x:_(s32) = COPY $w0
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%y:_(s32) = COPY $w1
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%add:_(s32) = G_ADD %x, %y
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%sub:_(s32) = G_SUB %x, %add
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$w0 = COPY %sub(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: simplify_to_neg_x
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; y - (y + x) -> 0 - x
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; CHECK-LABEL: name: simplify_to_neg_x
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %x:_(s32) = COPY $w0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: %sub:_(s32) = G_SUB [[C]], %x
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; CHECK-NEXT: $w0 = COPY %sub(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%x:_(s32) = COPY $w0
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%y:_(s32) = COPY $w1
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%add:_(s32) = G_ADD %x, %y
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%sub:_(s32) = G_SUB %y, %add
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$w0 = COPY %sub(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: simplify_to_neg_y_constant
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; x - (y + x) -> 0 - y
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; CHECK-LABEL: name: simplify_to_neg_y_constant
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %y:_(s32) = COPY $w1
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: %sub:_(s32) = G_SUB [[C]], %y
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; CHECK-NEXT: $w0 = COPY %sub(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%x1:_(s32) = G_CONSTANT i32 1
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%x2:_(s32) = G_CONSTANT i32 1
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%y:_(s32) = COPY $w1
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%add:_(s32) = G_ADD %x1, %y
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%sub:_(s32) = G_SUB %x2, %add
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$w0 = COPY %sub(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: simplify_to_neg_x_constant
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $w0, $w1
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; y - (y + x) -> 0 - x
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; CHECK-LABEL: name: simplify_to_neg_x_constant
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %x:_(s32) = COPY $w0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: %sub:_(s32) = G_SUB [[C]], %x
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; CHECK-NEXT: $w0 = COPY %sub(s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%x:_(s32) = COPY $w0
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%y1:_(s32) = G_CONSTANT i32 1
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%y2:_(s32) = G_CONSTANT i32 1
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%add:_(s32) = G_ADD %x, %y1
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%sub:_(s32) = G_SUB %y2, %add
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$w0 = COPY %sub(s32)
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RET_ReallyLR implicit $w0
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...
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---
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name: vector_simplify_to_neg_x
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $d0, $d1
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; y - (y + x) -> 0 - x
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; CHECK-LABEL: name: vector_simplify_to_neg_x
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; CHECK: liveins: $d0, $d1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %x:_(<2 x s32>) = COPY $d0
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
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; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
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; CHECK-NEXT: %sub:_(<2 x s32>) = G_SUB [[BUILD_VECTOR]], %x
|
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; CHECK-NEXT: $d0 = COPY %sub(<2 x s32>)
|
||||
; CHECK-NEXT: RET_ReallyLR implicit $d0
|
||||
%x:_(<2 x s32>) = COPY $d0
|
||||
%y:_(<2 x s32>) = COPY $d1
|
||||
%add:_(<2 x s32>) = G_ADD %x, %y
|
||||
%sub:_(<2 x s32>) = G_SUB %y, %add
|
||||
$d0 = COPY %sub(<2 x s32>)
|
||||
RET_ReallyLR implicit $d0
|
||||
...
|
||||
---
|
||||
name: vector_simplify_to_neg_y_constant
|
||||
tracksRegLiveness: true
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $d0, $d1
|
||||
; x - (y + x) -> 0 - y
|
||||
; CHECK-LABEL: name: vector_simplify_to_neg_y_constant
|
||||
; CHECK: liveins: $d0, $d1
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: %y:_(<2 x s32>) = COPY $d1
|
||||
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
||||
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[C]](s32), [[C]](s32)
|
||||
; CHECK-NEXT: %sub:_(<2 x s32>) = G_SUB [[BUILD_VECTOR]], %y
|
||||
; CHECK-NEXT: $d0 = COPY %sub(<2 x s32>)
|
||||
; CHECK-NEXT: RET_ReallyLR implicit $d0
|
||||
%cst:_(s32) = G_CONSTANT i32 1
|
||||
%x1:_(<2 x s32>) = G_BUILD_VECTOR %cst, %cst
|
||||
%x2:_(<2 x s32>) = G_BUILD_VECTOR %cst, %cst
|
||||
%y:_(<2 x s32>) = COPY $d1
|
||||
%add:_(<2 x s32>) = G_ADD %x1, %y
|
||||
%sub:_(<2 x s32>) = G_SUB %x2, %add
|
||||
$d0 = COPY %sub(<2 x s32>)
|
||||
RET_ReallyLR implicit $d0
|
||||
...
|
||||
---
|
||||
name: unique_registers_neg_no_fold
|
||||
tracksRegLiveness: true
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $w0, $w1, $w2
|
||||
; y - (y + x) -> 0 - x
|
||||
; CHECK-LABEL: name: unique_registers_neg_no_fold
|
||||
; CHECK: liveins: $w0, $w1, $w2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: %x:_(s32) = COPY $w0
|
||||
; CHECK-NEXT: %y:_(s32) = COPY $w1
|
||||
; CHECK-NEXT: %z:_(s32) = COPY $w2
|
||||
; CHECK-NEXT: %add:_(s32) = G_ADD %x, %y
|
||||
; CHECK-NEXT: %sub:_(s32) = G_SUB %z, %add
|
||||
; CHECK-NEXT: $w0 = COPY %sub(s32)
|
||||
; CHECK-NEXT: RET_ReallyLR implicit $w0
|
||||
%x:_(s32) = COPY $w0
|
||||
%y:_(s32) = COPY $w1
|
||||
%z:_(s32) = COPY $w2
|
||||
%add:_(s32) = G_ADD %x, %y
|
||||
%sub:_(s32) = G_SUB %z, %add
|
||||
$w0 = COPY %sub(s32)
|
||||
RET_ReallyLR implicit $w0
|
||||
...
|
||||
---
|
||||
name: wrong_constant_neg_no_fold
|
||||
tracksRegLiveness: true
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $w0, $w1
|
||||
; x - (y + x) -> 0 - y
|
||||
; CHECK-LABEL: name: wrong_constant_neg_no_fold
|
||||
; CHECK: liveins: $w0, $w1
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: %x1:_(s32) = G_CONSTANT i32 1
|
||||
; CHECK-NEXT: %x2:_(s32) = G_CONSTANT i32 2
|
||||
; CHECK-NEXT: %y:_(s32) = COPY $w1
|
||||
; CHECK-NEXT: %add:_(s32) = G_ADD %x1, %y
|
||||
; CHECK-NEXT: %sub:_(s32) = G_SUB %x2, %add
|
||||
; CHECK-NEXT: $w0 = COPY %sub(s32)
|
||||
; CHECK-NEXT: RET_ReallyLR implicit $w0
|
||||
%x1:_(s32) = G_CONSTANT i32 1
|
||||
%x2:_(s32) = G_CONSTANT i32 2
|
||||
%y:_(s32) = COPY $w1
|
||||
%add:_(s32) = G_ADD %x1, %y
|
||||
%sub:_(s32) = G_SUB %x2, %add
|
||||
$w0 = COPY %sub(s32)
|
||||
RET_ReallyLR implicit $w0
|
||||
Loading…
Reference in New Issue