From 96f3e7f22121764f4cc5490448bec72471fe50b4 Mon Sep 17 00:00:00 2001 From: Alex Bradbury Date: Mon, 3 Dec 2018 10:35:46 +0000 Subject: [PATCH] [RISCV] Fix test/MC/Disassembler/RISCV/invalid-instruction.txt after rL347988 The test for [0x00 0x00] failed due to the introduction of c.unimp. This particular test is unnecessary now that c.unimp was defined (and is tested in test/MC/RISCV/rv32c-valid.s). llvm-svn: 348117 --- llvm/test/MC/Disassembler/RISCV/invalid-instruction.txt | 4 ---- 1 file changed, 4 deletions(-) diff --git a/llvm/test/MC/Disassembler/RISCV/invalid-instruction.txt b/llvm/test/MC/Disassembler/RISCV/invalid-instruction.txt index 1bf033cbe3e6..79e73e243d18 100644 --- a/llvm/test/MC/Disassembler/RISCV/invalid-instruction.txt +++ b/llvm/test/MC/Disassembler/RISCV/invalid-instruction.txt @@ -4,10 +4,6 @@ # Test generated by a LLVM MC Disassembler Protocol Buffer Fuzzer # for the RISC-V assembly language. -# This should not decode as c.addi4spn with 0 imm when compression is enabled. -[0x00 0x00] -# CHECK: warning: invalid instruction encoding - # This should not decode as c.addi16sp with 0 imm when compression is enabled. [0x01 0x61] # CHECK: warning: invalid instruction encoding