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[RISCV] Fix test/MC/Disassembler/RISCV/invalid-instruction.txt after rL347988 

The test for [0x00 0x00] failed due to the introduction of c.unimp.

This particular test is unnecessary now that c.unimp was defined (and is 
tested in test/MC/RISCV/rv32c-valid.s).

llvm-svn: 348117
This commit is contained in:
Alex Bradbury 2018-12-03 10:35:46 +00:00
parent 5c1ec2e9cb
commit 96f3e7f221
1 changed files with 0 additions and 4 deletions
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4
llvm/test/MC/Disassembler/RISCV/invalid-instruction.txt
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@ -4,10 +4,6 @@
# Test generated by a LLVM MC Disassembler Protocol Buffer Fuzzer
# for the RISC-V assembly language.
# This should not decode as c.addi4spn with 0 imm when compression is enabled.
[0x00 0x00]
# CHECK: warning: invalid instruction encoding
# This should not decode as c.addi16sp with 0 imm when compression is enabled.
[0x01 0x61]
# CHECK: warning: invalid instruction encoding