forked from OSchip/llvm-project
parent
e5c1bda4d1
commit
96d828448f
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@ -91,7 +91,7 @@ public:
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unsigned getImmMinusOneOpValue(const MCInst &MI, unsigned Op) const {
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return MI.getOperand(Op).getImm() - 1;
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}
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unsigned getNEONVcvtImm32OpValue(const MCInst &MI, unsigned Op) const {
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return 64 - MI.getOperand(Op).getImm();
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}
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@ -154,7 +154,7 @@ unsigned ARMMCCodeEmitter::getMachineOpValue(const MCInst &MI,
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const MCOperand &MO) const {
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if (MO.isReg()) {
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unsigned regno = getARMRegisterNumbering(MO.getReg());
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// Q registers are encodes as 2x their register number.
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switch (MO.getReg()) {
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case ARM::Q0: case ARM::Q1: case ARM::Q2: case ARM::Q3:
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