forked from OSchip/llvm-project
[ARM] Set __ARM_FEATURE_SIMD32 for +dsp cores
ARM_FEATURE_DSP is already set for targets with the +dsp feature. In the backend, this target feature is also used to represent the availability of the of the instructions that the ACLE guard through the __ARM_FEATURE_SIMD32 macro. We don't have any cores that implement one and not the other, so set this macro for cores later than V6 or for Cortex-M cores that the target parser, or user, reports that the 'dsp' instructions are supported. Differential Revision: https://reviews.llvm.org/D51093 llvm-svn: 340911
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@ -661,7 +661,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
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}
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// ACLE 6.4.9 32-bit SIMD instructions
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if (ArchVersion >= 6 && (CPUProfile != "M" || CPUAttr == "7EM"))
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if (ArchVersion >= 6 || (CPUProfile == "M" && DSP))
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Builder.defineMacro("__ARM_FEATURE_SIMD32", "1");
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// ACLE 6.4.10 Hardware Integer Divide
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@ -174,10 +174,14 @@
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// CHECK-V7M: __ARM_FEATURE_SAT 1
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// CHECK-V7M: __ARM_FEATURE_UNALIGNED 1
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// RUN: %clang -target arm-none-linux-eabi -march=armv7e-m -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-V7EM
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// RUN: %clang -target arm-none-linux-eabi -march=armv7e-m -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP
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// RUN: %clang --target=arm-arm-none-eabi -mcpu=cortex-m4 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP
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// RUN: %clang --target=arm-arm-none-eabi -mcpu=cortex-m7 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP
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// RUN: %clang --target=arm-arm-none-eabi -mcpu=cortex-m33 -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP
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// RUN: %clang --target=arm-arm-none-eabi -march=armv8m.main+dsp -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-M-DSP
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// CHECK-V7EM: __ARM_FEATURE_DSP 1
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// CHECK-V7EM: __ARM_FEATURE_SIMD32 1
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// CHECK-M-DSP: __ARM_FEATURE_DSP 1
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// CHECK-M-DSP: __ARM_FEATURE_SIMD32 1
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// RUN: %clang -target arm-none-linux-eabi -march=armv8-a -x c -E -dM %s -o - | FileCheck %s -check-prefix CHECK-V8A
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