forked from OSchip/llvm-project
AArch64: Cleanup CCMP code; NFC
Cleanup CCMP pattern matching code in preparation for review/bugfix: - Rename `isConjunctionDisjunctionTree()` to `canEmitConjunction()` (it won't accept arbitrary disjunctions and is really about whether we can transform the subtree into a conjunction that we can emit). - Rename `emitConjunctionDisjunctionTree()` to `emitConjunction()` llvm-svn: 346203
This commit is contained in:
Matthias Braun
parent
c7b2e710b4
commit
96d12513a1
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@ -1521,7 +1521,7 @@ static SDValue emitComparison(SDValue LHS, SDValue RHS, ISD::CondCode CC,
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/// The CCMP/CCMN/FCCMP/FCCMPE instructions allow the conditional execution of
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/// a comparison. They set the NZCV flags to a predefined value if their
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/// predicate is false. This allows to express arbitrary conjunctions, for
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/// example "cmp 0 (and (setCA (cmp A)) (setCB (cmp B))))"
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/// example "cmp 0 (and (setCA (cmp A)) (setCB (cmp B)))"
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/// expressed as:
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/// cmp A
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/// ccmp B, inv(CB), CA
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@ -1591,14 +1591,12 @@ static SDValue emitConditionalComparison(SDValue LHS, SDValue RHS,
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return DAG.getNode(Opcode, DL, MVT_CC, LHS, RHS, NZCVOp, Condition, CCOp);
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}
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/// Returns true if @p Val is a tree of AND/OR/SETCC operations.
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/// CanPushNegate is set to true if we can push a negate operation through
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/// the tree in a was that we are left with AND operations and negate operations
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/// at the leafs only. i.e. "not (or (or x y) z)" can be changed to
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/// "and (and (not x) (not y)) (not z)"; "not (or (and x y) z)" cannot be
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/// brought into such a form.
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static bool isConjunctionDisjunctionTree(const SDValue Val, bool &CanNegate,
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unsigned Depth = 0) {
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/// Returns true if @p Val is a tree of AND/OR/SETCC operations that can be
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/// expressed as a conjunction. See \ref AArch64CCMP.
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/// \param CanNegate Set to true if we can also emit the negation of the
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/// tree as a conjunction.
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static bool canEmitConjunction(const SDValue Val, bool &CanNegate,
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unsigned Depth = 0) {
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if (!Val.hasOneUse())
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return false;
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unsigned Opcode = Val->getOpcode();
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@ -1615,10 +1613,10 @@ static bool isConjunctionDisjunctionTree(const SDValue Val, bool &CanNegate,
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SDValue O0 = Val->getOperand(0);
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SDValue O1 = Val->getOperand(1);
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bool CanNegateL;
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if (!isConjunctionDisjunctionTree(O0, CanNegateL, Depth+1))
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if (!canEmitConjunction(O0, CanNegateL, Depth+1))
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return false;
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bool CanNegateR;
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if (!isConjunctionDisjunctionTree(O1, CanNegateR, Depth+1))
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if (!canEmitConjunction(O1, CanNegateR, Depth+1))
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return false;
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if (Opcode == ISD::OR) {
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@ -1626,8 +1624,11 @@ static bool isConjunctionDisjunctionTree(const SDValue Val, bool &CanNegate,
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// we cannot do the transformation at all.
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if (!CanNegateL && !CanNegateR)
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return false;
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// We can however change a (not (or x y)) to (and (not x) (not y)) if we
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// can negate the x and y subtrees.
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// However if we can negate x and y, then we can change
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// (not (or x y))
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// into
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// (and (not x) (not y))
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// to eliminate the outer negation.
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CanNegate = CanNegateL && CanNegateR;
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} else {
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// If the operands are OR expressions then we finally need to negate their
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@ -1637,7 +1638,7 @@ static bool isConjunctionDisjunctionTree(const SDValue Val, bool &CanNegate,
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bool NeedsNegOutR = O1->getOpcode() == ISD::OR;
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if (NeedsNegOutL && NeedsNegOutR)
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return false;
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// We cannot negate an AND operation (it would become an OR),
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// We cannot negate an AND operation.
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CanNegate = false;
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}
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return true;
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@ -1655,7 +1656,7 @@ static bool isConjunctionDisjunctionTree(const SDValue Val, bool &CanNegate,
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/// effects pushed to the tree leafs; @p Predicate is an NZCV flag predicate
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/// for the comparisons in the current subtree; @p Depth limits the search
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/// depth to avoid stack overflow.
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static SDValue emitConjunctionDisjunctionTreeRec(SelectionDAG &DAG, SDValue Val,
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static SDValue emitConjunctionRec(SelectionDAG &DAG, SDValue Val,
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AArch64CC::CondCode &OutCC, bool Negate, SDValue CCOp,
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AArch64CC::CondCode Predicate) {
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// We're at a tree leaf, produce a conditional comparison operation.
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@ -1712,13 +1713,13 @@ static SDValue emitConjunctionDisjunctionTreeRec(SelectionDAG &DAG, SDValue Val,
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if (NegateOpsAndResult) {
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// See which side we can negate.
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bool CanNegateL;
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bool isValidL = isConjunctionDisjunctionTree(LHS, CanNegateL);
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bool isValidL = canEmitConjunction(LHS, CanNegateL);
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assert(isValidL && "Valid conjunction/disjunction tree");
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(void)isValidL;
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#ifndef NDEBUG
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bool CanNegateR;
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bool isValidR = isConjunctionDisjunctionTree(RHS, CanNegateR);
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bool isValidR = canEmitConjunction(RHS, CanNegateR);
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assert(isValidR && "Valid conjunction/disjunction tree");
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assert((CanNegateL || CanNegateR) && "Valid conjunction/disjunction tree");
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#endif
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@ -1740,12 +1741,12 @@ static SDValue emitConjunctionDisjunctionTreeRec(SelectionDAG &DAG, SDValue Val,
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// through if we are already in a PushNegate case, otherwise we can negate
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// the "flags to test" afterwards.
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AArch64CC::CondCode RHSCC;
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SDValue CmpR = emitConjunctionDisjunctionTreeRec(DAG, RHS, RHSCC, Negate,
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SDValue CmpR = emitConjunctionRec(DAG, RHS, RHSCC, Negate,
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CCOp, Predicate);
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if (NegateOpsAndResult && !Negate)
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RHSCC = AArch64CC::getInvertedCondCode(RHSCC);
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// Emit LHS. We may need to negate it.
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SDValue CmpL = emitConjunctionDisjunctionTreeRec(DAG, LHS, OutCC,
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SDValue CmpL = emitConjunctionRec(DAG, LHS, OutCC,
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NegateOpsAndResult, CmpR,
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RHSCC);
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// If we transformed an OR to and AND then we have to negate the result
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@ -1755,17 +1756,17 @@ static SDValue emitConjunctionDisjunctionTreeRec(SelectionDAG &DAG, SDValue Val,
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return CmpL;
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}
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/// Emit conjunction or disjunction tree with the CMP/FCMP followed by a chain
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/// of CCMP/CFCMP ops. See @ref AArch64CCMP.
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/// \see emitConjunctionDisjunctionTreeRec().
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static SDValue emitConjunctionDisjunctionTree(SelectionDAG &DAG, SDValue Val,
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AArch64CC::CondCode &OutCC) {
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bool CanNegate;
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if (!isConjunctionDisjunctionTree(Val, CanNegate))
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/// Emit expression as a conjunction (a series of CCMP/CFCMP ops).
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/// In some cases this is even possible with OR operations in the expression.
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/// See \ref AArch64CCMP.
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/// \see emitConjunctionRec().
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static SDValue emitConjunction(SelectionDAG &DAG, SDValue Val,
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AArch64CC::CondCode &OutCC) {
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bool DummyCanNegate;
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if (!canEmitConjunction(Val, DummyCanNegate))
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return SDValue();
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return emitConjunctionDisjunctionTreeRec(DAG, Val, OutCC, false, SDValue(),
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AArch64CC::AL);
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return emitConjunctionRec(DAG, Val, OutCC, false, SDValue(), AArch64CC::AL);
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}
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/// @}
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@ -1922,7 +1923,7 @@ static SDValue getAArch64Cmp(SDValue LHS, SDValue RHS, ISD::CondCode CC,
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}
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if (!Cmp && (RHSC->isNullValue() || RHSC->isOne())) {
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if ((Cmp = emitConjunctionDisjunctionTree(DAG, LHS, AArch64CC))) {
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if ((Cmp = emitConjunction(DAG, LHS, AArch64CC))) {
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if ((CC == ISD::SETNE) ^ RHSC->isNullValue())
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AArch64CC = AArch64CC::getInvertedCondCode(AArch64CC);
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}
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